2025-06-28  H.J. Lu  <hjl.tools@gmail.com>

	PR debug/120849
	* print-tree.cc (debug): New.
	* print-tree.h (debug): Likewise.

2025-06-28  Georg-Johann Lay  <avr@gjlay.de>

	PR target/120856
	* config/avr/avr.cc (avr_hard_regno_mode_ok) [-mno-lra]: Deny
	hard regs >= 4 bytes that overlap Y.

2025-06-28  Jan Hubicka  <hubicka@ucw.cz>
	    Kugan Vivekanandarajah   <kvivekananda@nvidia.com>

	* auto-profile.cc (get_original_name): Only strip suffixes introduced
	after auto-fdo annotation.
	(string_table::get_index_by_decl):  Simplify.
	(string_table::add_name): New member function.
	(string_table::read): Micro-optimize allocation.
	(function_instance::get_function_instance_by_decl): Dump reasons
	for failure; try to compensate lost discriminators.
	(function_instance::merge): Simplify sanity check; do not check
	for realized flag; fix merging of targets.
	(function_instance::offline_if_in_set): Simplify.
	(function_instance::dump): Sanity check that names are consistent.
	(autofdo_source_profile::offline_external_functions): Also handle
	stripping suffixes.
	(walk_block): Move up in source.
	(autofdo_source_profile::offline_unrealized_inlines): Also compute
	realized functions.
	(autofdo_source_profile::get_function_instance_by_name_index): Simplify.
	(autofdo_source_profile::add_function_instance): Simplify.
	(autofdo_source_profile::read): Do not strip suffxies; error on duplicates.
	(mark_realized_functions): Remove.
	(auto_profile): Do not call mark_realized_functions.
	* passes.def: Move auto_profile_offline before free_lang_data.

2025-06-27  Eric Botcazou  <ebotcazou@adacore.com>

	* gimple-fold.cc (fold_const_aggregate_ref_1) <COMPONENT_REF>:
	Bail out immediately if the reference has reverse storage order.
	* tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Likewise.

2025-06-27  Jakub Jelinek  <jakub@redhat.com>

	PR c++/120777
	* gimple-fold.cc (gimple_get_virt_method_for_vtable): Revert
	2018-09-18 changes.

2025-06-27  Nathaniel Shead  <nathanieloshead@gmail.com>

	PR c++/98735
	PR c++/118904
	* tree.cc (struct identifier_hash): New type.
	(struct identifier_count_traits): New traits.
	(internal_label_nums): New hash map.
	(generate_internal_label): New function.
	(prefix_for_internal_label): New function.
	* tree.h (IDENTIFIER_INTERNAL_P): New macro.
	(generate_internal_label): Declare.
	(prefix_for_internal_label): Declare.
	* ubsan.cc (ubsan_ids): Remove.
	(ubsan_type_descriptor): Use generate_internal_label.
	(ubsan_create_data): Likewise.

2025-06-27  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (function_instance::set_name,
	function_instance::set_realized, function_instnace::realized_p,
	function_instance::set_in_worklist,
	function_instance::clear_in_worklist,
	function_instance::in_worklist_p): New member functions.
	(function_instance::in_worklist, function_instance::realized_):
	new.
	(get_relative_location_for_locus): Break out from ....
	(get_relative_location_for_stmt): ... here.
	(function_instance::~function_instance): Sanity check that
	removed function is not in worklist.
	(function_instance::merge): Do not offline realized instances.
	(function_instance::offline): Make private; add duplicate functions
	to worklist rather then merging immediately.
	(function_instance::offline_if_in_set):  Cleanup.
	(function_instance::remove_external_functions): Likewise.
	(function_instance::offline_if_not_realized): New member function.
	(autofdo_source_profile::offline_external_functions): Handle delayed
	functions.
	(autofdo_source_profile::offline_unrealized_inlines): New member function.
	(walk_block): New function.
	(mark_realized_functions): New function.
	(afdo_annotate_cfg): Fix dump.
	(auto_profile): Mark realized functions and offline rest; do not compute
	fn summary.

2025-06-27  Georg-Johann Lay  <avr@gjlay.de>

	PR target/113934
	* config/avr/avr.opt (-mlra): Turn on per default.

2025-06-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120808
	* tree-vect-slp-patterns.cc (vect_match_expression_p):
	Take a code_helper and also match calls.
	(addsub_pattern::recognize): Handle .FMA/.FMS pairs
	in addition to PLUS/MINUS.
	(addsub_pattern::build): Adjust.

2025-06-27  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (vect_chooses_same_modes_p): New
	overload.
	* tree-vect-stmts.cc (vect_chooses_same_modes_p): Likewise.
	* tree-vect-loop.cc (vect_analyze_loop): Prune epilogue
	analysis further when not using partial vectors.

2025-06-27  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_analyze_loop): Consider AVX512
	style masking when computing supports_partial_vectors.

2025-06-27  Tamar Christina  <tamar.christina@arm.com>

	* doc/extend.texi: Fix typo in unsed attribute docs.

2025-06-27  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120830
	* config/i386/i386-features.cc (ix86_get_vector_cse_mode): Handle
	vector broadcast source.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (elimination_2sp_occurred_p): Rename
	from...
	(elimination_fp2sp_occured_p): ... this.  Adjust all uses.
	(lra_eliminate_regs_1): Don't require a from-frame-pointer
	elimination to set it.
	(update_reg_eliminate): Likewise to test it.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (lra_eliminate_regs_1): Adjust autoinc
	addresses that are MEMs.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (lra_update_fp2sp_elimination): Reorder
	and regroup related statements.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (lra_update_fp2sp_elimination):
	Avoid sp offsets in further fp2sp eliminations...
	(update_reg_eliminate): ... and restore to_rtx before assert
	checking.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (lra_update_fp2sp_elimination):
	Compute complete live ranges and recompute slots' live ranges
	if needed.
	* lra-lives.cc (lra_reset_live_range_list): New.
	(lra_complete_live_ranges): New.
	* lra-spills.cc (assign_spill_hard_regs): Reject empty live
	ranges.
	(add_pseudo_to_slot): Likewise.
	(lra_recompute_slots_live_ranges): New.
	* lra-int.h (lra_reset_live_range_list): Declare.
	(lra_complete_live_ranges): Declare.
	(lra_recompute_slots_live_ranges): Declare.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* genoutput.cc (scan_operands): Make MATCH_SCRATCHes eliminable.

2025-06-27  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	* lra-eliminations.cc (lra_update_fp2sp_elimination):
	Inactivate the unused fp2sp elimination right away.

2025-06-26  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.md (reg move splitter): New splitter for 64-bit
	register moves into two 32-bit moves.
	(const_int move splitter): New splitter for 64-bit constant
	integer moves into two 32-bit moves.

2025-06-26  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.h (diagnostic_context::set_permissive_option): New.
	(diagnostic_context::set_fatal_errors): New.
	(diagnostic_context::set_internal_error_callback): New.
	(diagnostic_context::set_adjust_diagnostic_info_callback): New.
	(diagnostic_context::inhibit_notes): New.
	(diagnostic_context::m_opt_permissive): Make private.
	(diagnostic_context::m_fatal_errors): Likewise.
	(diagnostic_context::m_internal_error): Likewise.
	(diagnostic_context::m_adjust_diagnostic_info): Likewise.
	(diagnostic_context::m_inhibit_notes_p): Likewise.
	(diagnostic_inhibit_notes): Delete.
	* opts.cc (common_handle_option): Use
	diagnostic_context::set_fatal_errors.
	* toplev.cc (internal_error_function): Use
	diagnostic_context::set_internal_error_callback.
	(general_init): Likewise.
	(process_options): Use diagnostic_context::inhibit_notes.

2025-06-26  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/120809
	* diagnostic-format-html.cc
	(html_builder::maybe_make_state_diagram): Bulletproof against the
	SVG generation failing.
	* xml.cc (xml::printer::push_element): Assert that the ptr is
	nonnull.
	(xml::printer::append): Likewise.

2025-06-26  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-output-spec.cc (sarif_scheme_handler::make_sink):
	Split out creation of sarif_generation_options and
	sarif_serialization_format into...
	(sarif_scheme_handler::make_sarif_gen_opts): ...this...
	(sarif_scheme_handler::make_sarif_serialization_object): ...and
	this.

2025-06-26  Paul-Antoine Arras  <parras@baylibre.com>

	PR target/120828
	* config/riscv/riscv-v.cc (prepare_ternary_operands): Handle the
	vector-scalar case.

2025-06-26  Uros Bizjak  <ubizjak@gmail.com>

	PR target/120719
	* config/i386/i386.md (crc_rev<SWI124:mode>si4): New expander.

2025-06-26  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.md: Fix build issue.

2025-06-26  Martin Jambor  <mjambor@suse.cz>

	* lto-ltrans-cache.h (class ltrans_file_cache): Remove member prefix.
	* lto-ltrans-cache.cc (ltrans_file_cache::ltrans_file_cache): Do
	not initialize member prefix.

2025-06-26  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.md: Add comment and reorder include
	files.

2025-06-26  Martin Jambor  <mjambor@suse.cz>

	* tree-vect-stmts.cc (supportable_indirect_convert_operation):
	Remove an unused shadowed variable.

2025-06-26  Martin Jambor  <mjambor@suse.cz>

	* tree-vect-slp.cc (cond_expr_maps): Remove.

2025-06-26  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (function_instance::merge): Add TODO.
	(autofdo_source_profile::offline_external_functions):
	Do not use range for on the worklist.
	* timevar.def (TV_IPA_AUTOFDO_OFFLINE): New timevar.

2025-06-26  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (name_index_set, name_index_map): New types.
	(dump_afdo_loc): New function.
	(dump_inline_stack): Simplify.
	(function_instance::merge): Merge recursively inlined functions;
	offline if necessary; collect new fnctions.
	(function_instance::offline): New member function.
	(function_instance::offline_if_in_set): New member function.
	(function_instance::remove_external_functions): New member function.
	(function_instance::dump): New member function.
	(function_instance::debug): New member function.
	(function_instance::dump_inline_stack): New member function.
	(function_instance::find_icall_target_map): Use removed_icall_target.
	(function_instance::remove_icall_target): Only mark icall target removed.
	(autofdo_source_profile::offline_external_functions): New function.
	(function_instance::read_function_instance): Record inlined_to pointers;
	use -1 for unknown head counts.
	(autofdo_source_profile::get_function_instance_by_name_index): New
	function.
	(autofdo_source_profile::add_function_instance): New member function.
	(autofdo_source_profile::read): Do not leak memory; fix formatting.
	(read_profile): Fix formatting.
	(afdo_annotate_cfg): LIkewise.
	(class pass_ipa_auto_profile_offline): New pass.
	(make_pass_ipa_auto_profile_offline): New function.
	* passes.def (pass_ipa_auto_profile_offline): Add
	* tree-pass.h (make_pass_ipa_auto_profile): Declare

2025-06-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120819
	* config/i386/i386-features.cc (ix86_broadcast_inner): Also handle
	all 1s float vector constant.

2025-06-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120816
	* config/i386/i386-features.cc (remove_redundant_vector_load):
	Handle REG_EH_REGION note in DEF_INSN.

2025-06-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/119628
	* config/i386/i386-expand.cc (ix86_expand_call): Call
	ix86_type_no_callee_saved_registers_p instead of looking up
	no_callee_saved_registers attribute.
	* config/i386/i386-options.cc (ix86_set_func_type): Look up
	preserve_none attribute.  Check preserve_none attribute for
	interrupt attribute.  Don't check no_caller_saved_registers nor
	no_callee_saved_registers conflicts here.
	(ix86_set_func_type): Check no_callee_saved_registers before
	checking no_caller_saved_registers attribute.
	(ix86_set_current_function): Allow SSE with
	no_caller_saved_registers attribute.
	(ix86_handle_call_saved_registers_attribute): Check preserve_none,
	no_callee_saved_registers and no_caller_saved_registers conflicts.
	(ix86_gnu_attributes): Add preserve_none attribute.
	* config/i386/i386-protos.h (ix86_type_no_callee_saved_registers_p):
	New.
	* config/i386/i386.cc
	(x86_64_preserve_none_int_parameter_registers): New.
	(ix86_using_red_zone): Don't use red-zone when there are no
	caller-saved registers with SSE.
	(ix86_type_no_callee_saved_registers_p): New.
	(ix86_function_ok_for_sibcall): Also check TYPE_PRESERVE_NONE
	and call ix86_type_no_callee_saved_registers_p instead of looking
	up no_callee_saved_registers attribute.
	(ix86_comp_type_attributes): Call
	ix86_type_no_callee_saved_registers_p instead of looking up
	no_callee_saved_registers attribute.  Return 0 if preserve_none
	attribute doesn't match in 64-bit mode.
	(ix86_function_arg_regno_p): For cfun with TYPE_PRESERVE_NONE,
	use x86_64_preserve_none_int_parameter_registers.
	(init_cumulative_args): Set preserve_none_abi.
	(function_arg_64): Use x86_64_preserve_none_int_parameter_registers
	with preserve_none attribute.
	(setup_incoming_varargs_64): Use
	x86_64_preserve_none_int_parameter_registers with preserve_none
	attribute.
	(ix86_save_reg): Treat TYPE_PRESERVE_NONE like
	TYPE_NO_CALLEE_SAVED_REGISTERS.
	(ix86_nsaved_sseregs): Allow saving XMM registers for
	no_caller_saved_registers attribute.
	(ix86_compute_frame_layout): Likewise.
	(x86_this_parameter): Use
	x86_64_preserve_none_int_parameter_registers with preserve_none
	attribute.
	* config/i386/i386.h (ix86_args): Add preserve_none_abi.
	(call_saved_registers_type): Add TYPE_PRESERVE_NONE.
	(machine_function): Change call_saved_registers to 3 bits.
	* doc/extend.texi: Add preserve_none attribute.  Update
	no_caller_saved_registers attribute to remove -mgeneral-regs-only
	restriction.

2025-06-25  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386-features.cc (ix86_place_single_vector_set):
	Add debug dump.
	(replace_vector_const): Likewise.
	(remove_redundant_vector_load): Likewise.

2025-06-25  Luis Silva  <luiss@synopsys.com>

	* config/arc/arc.md (<su_optab>mulvsi4): New define_expand.
	(<su_optab>mulsi3_Vcmp): New define_insn.

2025-06-25  Luis Silva  <luiss@synopsys.com>

	* config/arc/arc.cc (arc_select_cc_mode): Handle multiplication
	results compared against zero, selecting CC_Zmode.
	* config/arc/arc.md (*mulsi3_cmp0): New define_insn.
	(*mulsi3_cmp0_noout): New define_insn.

2025-06-25  Shahab Vahedi  <shahab@synopsys.com>

	* config/arc/arc.md (subsi3_v, subvsi4, subsi3_c): New patterns.

2025-06-25  Shahab Vahedi  <shahab@synopsys.com>

	* config/arc/arc-modes.def (CC_V): New mode.
	* config/arc/arc-protos.h (arc_gen_unlikely_cbranch): New
	function declaration.
	* config/arc/arc.cc (arc_gen_unlikely_cbranch): New
	function.
	(get_arc_condition_code): Handle new mode.
	* config/arc/arc.md (addvsi3_v, addvsi4, addsi3_c, uaddvsi4): New
	patterns.
	* config/arc/predicates.md (proper_comparison_operator): Handel
	the new V_mode.
	(equality_comparison_operator): Likewise.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* diagnostic-path-output.cc (path_label::get_effects): Mark as
	final override.
	* diagnostic-format-html.cc
	(html_output_format::after_diagnostic): Likewise.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* gimple-range-op.cc
	(gimple_range_op_handler::maybe_builtin_call): Use
	CFN_BUILT_IN_ISINF instead of BUILT_IN_ISINF.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* value-relation.h (class dom_oracle): Mark member function
	next_relation as override.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* tree-ssa-propagate.h (class substitute_and_fold_engine): Mark
	member functions value_of_expr and range_of_expr as override.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* range-op-mixed.h (class operator_plus): Mark member function
	overflow_free_p as final override.
	(class operator_minus): Likewise.
	(class operator_mult): Likewise.
	* range-op-ptr.cc (class pointer_plus_operator): Mark member
	function lhs_op1_relation as final override.
	* range-op.cc (class operator_div::): Mark member functions
	op2_range and update_bitmask as final override.
	(class operator_logical_and): Mark member functions fold_range,
	op1_range and op2_range as final override.  Remove unnecessary
	virtual.
	(class operator_logical_or): Likewise.
	(class operator_logical_not): Mark member functions fold_range and
	op1_range as final override.  Remove unnecessary virtual.
	formatting easier.
	(class operator_absu): Mark member functions wi_fold as final
	override.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* gimple-ssa-sccopy.cc (class pass_sccopy): Mark member functions
	gate and execute as final override.

2025-06-25  Martin Jambor  <mjambor@suse.cz>

	* avoid-store-forwarding.cc (class
	pass_rtl_avoid_store_forwarding): Mark member function gate as
	final override.

2025-06-25  Andrew MacLeod  <amacleod@redhat.com>

	* value-relation.cc (relation_to_code): Remove.

2025-06-25  Andrew MacLeod  <amacleod@redhat.com>

	* value-range.cc (frange::verify_range): Constify.
	(irange::verify_range): Constify.
	* value-range.h (vrange::verify_range): New.
	(irange::verify_range): Make public.
	(prange::verify_range): Make public.
	(prange::verify_range): Make public.
	(value_range::verify_range): New.

2025-06-25  Andrew MacLeod  <amacleod@redhat.com>

	* value-range.cc (irange::get_bitmask): Return original mask if
	result is unknown.
	(assert_snap_result): New.
	(test_irange_snap_bounds): New.
	(range_tests_misc): Call test_irange_snap_bounds.

2025-06-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/109892
	* tree-vect-loop.cc (check_reduction_path): Handle fma.
	(vectorizable_reduction): Apply FOLD_LEFT_REDUCTION code
	generation constraints.

2025-06-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120808
	* tree-vectorizer.h (compatible_calls_p): Add flag to
	indicate a FMA/FMS pair is allowed.
	* tree-vect-slp.cc (compatible_calls_p): Likewise.
	(vect_build_slp_tree_1): Allow mixed .FMA/.FMS as two-operator.
	(vect_build_slp_tree_2): Handle calls in two-operator SLP build.
	* tree-vect-slp-patterns.cc (compatible_complex_nodes_p):
	Adjust.

2025-06-25  Alfie Richards  <alfie.richards@arm.com>

	* tree-ssa-loop-ivopts.cc (constant_multiple_of): Change
	tree_to_aff_combination to tree_to_aff_combination_expand and add
	parameter to take ivopts_data.
	(get_computation_aff_1): Change parameters and calls to include
	ivopts_data.
	(get_computation_aff): Ditto.
	(get_computation_at) Ditto.:
	(get_debug_computation_at) Ditto.:
	(get_computation_cost) Ditto.:
	(rewrite_use_nonlinear_expr) Ditto.:
	(rewrite_use_address) Ditto.:
	(rewrite_use_compare) Ditto.:
	(remove_unused_ivs) Ditto.:

2025-06-25  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/120745
	* rtl-ssa/changes.cc (process_uses_of_deleted_def): Rewrite to
	handle deletions of non-degenerate phis.

2025-06-25  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120815
	* common/config/i386/i386-common.cc (processor_alias_table):
	Replace CPU_SLM/PTA_NEHALEM with CPU_HASWELL/PTA_HASWELL for
	PROCESSOR_INTEL.
	* config/i386/i386-options.cc (processor_cost_table): Replace
	intel_cost with alderlake_cost.
	* config/i386/x86-tune-costs.h (intel_cost): Removed.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Treat
	PROCESSOR_INTEL like PROCESSOR_ALDERLAKE.
	(ix86_adjust_cost): Likewise.
	* doc/invoke.texi: Update -mtune=intel for Diamond Rapids and
	Clearwater Forest.

2025-06-25  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.h (PTA_ALDERLAKE): Use PTA_GOLDMONT_PLUS
	as base to remove PTA_CLDEMOTE.
	(PTA_SIERRAFOREST): Add PTA_CLDEMOTE since PTA_ALDERLAKE
	does not include that anymore.
	* doc/invoke.texi: Update texi file.

2025-06-25  Jiawei  <jiawei@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: New Profiles.

2025-06-25  Jan Hubicka  <hubicka@ucw.cz>

	* common.opt: (fauto-profile-inlining): New
	* doc/invoke.texi (-fauto-profile-inlining): Document.
	* ipa-inline.cc (inline_functions_by_afdo): Check
	flag_auto_profile.
	(early_inliner): Also do inline_functions_by_afdo with
	!flag_early_inlining.

2025-06-25  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc: Update toplevel comment.
	(early_inline): Remove.
	(auto_profile): Don't do early inlining.

2025-06-24  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-opts.h (TARGET_GLC_NAME): Fix and extend the
	description in the comment.
	* config/gcn/gcn.cc (print_operand): Extend the comment about
	'G' and 'g'.
	* config/gcn/gcn.md: Use 'glc' instead of %G where appropriate.

2025-06-24  Paul-Antoine Arras  <parras@baylibre.com>

	PR target/119100
	* config/riscv/autovec-opt.md (*<optab>_vf_<mode>): Handle both add and
	acc FMA variants.
	* config/riscv/vector.md (*pred_mul_<optab><mode>_scalar_undef): New.

2025-06-24  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md
	(@pro_epilogue_adjust_stack_add_nocc<mode>): Add type attribute.
	(pro_epilogue_adjust_stack_add_nocc peephole2 pattern):
	Convert pro_epilogue_adjust_stack_add_nocc variant to
	pro_epilogue_adjust_stack_add when FLAGS_REG is dead.

2025-06-24  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_load): Remove non-SLP
	paths and propagate out ncopies == 1.

2025-06-24  Marc Poulhiès  <poulhies@adacore.com>

	* diagnostic-state-to-dot.cc (get_color_for_dynalloc_state):
	Rename argument dynalloc_state to dynalloc_st.
	(add_title_tr): Rename argument style to styl.
	(on_xml_node): Rename local variable dynalloc_state to dynalloc_st.

2025-06-24  Yuao Ma  <c8ef@outlook.com>

	* tree-call-cdce.cc (edom_only_function): Remove atan.

2025-06-24  Juergen Christ  <jchrist@linux.ibm.com>

	* config/s390/vector.md (VF): Don't restrict modes.
	(VEC_SET_SINGLEFLOAT): Ditto.

2025-06-24  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64.cc (aarch64_override_options_internal): Set
	value of parameter based on option.
	* config/aarch64/aarch64.opt (autovec-preference): New.
	* doc/invoke.texi (autovec-preference): Document it.

2025-06-24  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64.opt (max-vectorization): New.
	* config/aarch64/aarch64.cc (aarch64_override_options_internal): Save
	and restore option.
	Implement it through vect-scalar-cost-multiplier.
	(aarch64_attributes): Default to off.
	* common/config/aarch64/aarch64-common.cc (aarch64_handle_option):
	Initialize option.
	* doc/extend.texi (max-vectorization): Document attribute.
	* doc/invoke.texi (max-vectorization): Document flag.

2025-06-24  hongtao.liu  <hongtao.liu@intel.com>

	PR target/115842
	* tree-ssa-loop-ivopts.cc (determine_group_iv_cost_address):
	Don't recalculate inv_expr when group-candidate cost
	calucalution.

2025-06-24  Tamar Christina  <tamar.christina@arm.com>

	* doc/extend.texi: Document pragma unroll interaction with vectorizer.
	* tree-vectorizer.h (LOOP_VINFO_USER_UNROLL): New.
	(class _loop_vec_info): Add user_unroll.
	* tree-vect-loop.cc (vect_analyze_loop_1): Set
	suggested_unroll_factor and retry.
	(_loop_vec_info::_loop_vec_info): Initialize user_unroll.
	(vect_transform_loop): Clear the loop->unroll value if the pragma was
	used.

2025-06-24  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-loop-manip.cc (vect_gen_vector_loop_niters,
	vect_gen_vector_loop_niters_mult_vf): Remove uses of log_vf.

2025-06-24  H.J. Lu  <hjl.tools@gmail.com>

	PR target/92080
	* config/i386/i386-expand.cc (ix86_expand_call): Set
	recursive_function to true for recursive call.
	* config/i386/i386-features.cc (ix86_place_single_vector_set):
	Add an argument for inner scalar, default to nullptr.  Set the
	source from inner scalar if not nullptr.
	(ix86_get_vector_load_mode): Renamed to ...
	(ix86_get_vector_cse_mode): This.  Add an argument for scalar mode
	and handle integer and float scalar modes.
	(replace_vector_const): Add an argument for scalar mode and pass
	it to ix86_get_vector_load_mode.
	(x86_cse_kind): New.
	(redundant_load): Likewise.
	(ix86_broadcast_inner): Likewise.
	(remove_redundant_vector_load): Also support const0_rtx and
	constm1_rtx broadcasts.  Handle vector broadcasts from constant
	and variable scalars.
	* config/i386/i386.h (machine_function): Add recursive_function.

2025-06-24  H.J. Lu  <hjl.tools@gmail.com>

	PR target/70308
	PR target/101366
	PR target/102294
	PR target/108585
	PR target/118276
	PR target/119596
	PR target/119703
	PR target/119704
	* config/i386/x86-tune-costs.h (generic_memcpy): Updated.
	(generic_memset): Likewise.
	(generic_cost): Change CLEAR_RATIO to 10.

2025-06-24  Jan Hubicka  <hubicka@ucw.cz>

	* tree-inline.cc (expand_call_inline): Preserve discriminator.

2025-06-24  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (afdo_set_bb_count): Dump also 0 count stmts.
	(afdo_annotate_cfg): Fix conditional for block having non-zero static
	profile.

2025-06-24  Lili Cui  <lili.cui@intel.com>

	PR target/120741
	* config/i386/i386.cc (ix86_expand_prologue):
	Remove 1 assertion.

2025-06-24  Jeff Law  <jlaw@ventanamicro.com>

	PR target/118241
	* config/riscv/predicates.md: Fix comment typo in recent change.

2025-06-23  Sam James  <sam@gentoo.org>
	    Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/120795
	* ext-dce.cc (ext_dce_try_optimize_insn): Enable rescan in
	remove_reg_equal_equiv_notes call.

2025-06-23  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	PR testsuite/116163
	PR sarif-replay/120792
	* Makefile.in (OBJS-libcommon): Add diagnostic-output-spec.o.
	* diagnostic-format-html.cc (html_builder::html_builder): Ensure
	title is non-empty.
	* diagnostic-output-spec.cc: New file, taken from material in
	opts-diagnostic.cc.
	* diagnostic-output-spec.h: New file.
	* diagnostic.cc (diagnostic_context::set_main_input_filename):
	New.
	* diagnostic.h (diagnostic_context::set_main_input_filename): New
	decl.
	* doc/libgdiagnostics/topics/compatibility.rst
	(LIBGDIAGNOSTICS_ABI_2): New.
	* doc/libgdiagnostics/topics/diagnostic-manager.rst
	(diagnostic_manager_add_sink_from_spec): New.
	(diagnostic_manager_set_analysis_target): New.
	* libgdiagnostics++.h (manager::add_sink_from_spec): New.
	(manager::set_analysis_target): New.
	* libgdiagnostics.cc: Include "diagnostic-output-spec.h".
	(struct spec_context): New.
	(diagnostic_manager_add_sink_from_spec): New.
	(diagnostic_manager_set_analysis_target): New.
	* libgdiagnostics.h
	(LIBDIAGNOSTICS_HAVE_diagnostic_manager_add_sink_from_spec): New
	define.
	(diagnostic_manager_add_sink_from_spec): New decl.
	(LIBDIAGNOSTICS_HAVE_diagnostic_manager_set_analysis_target): New
	define.
	(diagnostic_manager_set_analysis_target): New decl.
	* libgdiagnostics.map (LIBGDIAGNOSTICS_ABI_2): New.
	* libsarifreplay.cc (sarif_replayer::handle_artifact_obj): Looks
	for "analysisTarget" in roles and call set_analysis_target using
	the artifact if found.
	* opts-diagnostic.cc: Refactor, moving material to
	diagnostic-output-spec.cc.
	(struct opt_spec_context): New.
	(handle_OPT_fdiagnostics_add_output_): Use opt_spec_context.
	(handle_OPT_fdiagnostics_set_output_): Likewise.
	* sarif-replay.cc: Define INCLUDE_STRING.
	(struct options): Add m_extra_output_specs.
	(usage_msg): Add -fdiagnostics-add-output=SCHEME.
	(str_starts_with): New.
	(parse_options): Add -fdiagnostics-add-output=SCHEME.
	(main): Likewise.
	* selftest-run-tests.cc (selftest::run_tests): Call
	diagnostic_output_spec_cc_tests rather than
	opts_diagnostic_cc_tests.
	* selftest.h (selftest::diagnostic_output_spec_cc_tests):
	Replace...
	(selftest::opts_diagnostic_cc_tests): ...this.

2025-06-23  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* Makefile.in (ANALYZER_OBJS): Add
	analyzer/ana-state-to-diagnostic-state.o.
	(OBJS): Move graphviz.o to...
	(OBJS-libcommon): ...here.  Add diagnostic-state-to-dot.o and pex.o.
	* diagnostic-format-html.cc: Include "diagnostic-state.h" and
	"graphviz.h".
	(html_generation_options::html_generation_options): Initialize the
	new flags.
	(HTML_SCRIPT): Add function "get_any_state_diagram".  Use it
	when changing current focus id to update the visibility of the
	pertinent diagram, if any.
	(print_pre_source): New.
	(html_builder::maybe_make_state_diagram): New.
	(html_path_label_writer::html_path_label_writer): Add "path" param.
	Initialize m_path and m_curr_event_id.
	(html_path_label_writer::begin_label): Store current event id.
	(html_path_label_writer::end_label): Attempt to make a state
	diagram and add it if successful.
	(html_path_label_writer::get_element_id): New.
	(html_path_label_writer::m_path): New field.
	(html_path_label_writer::m_curr_event_id): New field.
	(html_builder::make_element_for_diagnostic): Pass path to label
	writer.
	* diagnostic-format-html.h
	(html_generation_options::m_show_state_diagrams): New field.
	(html_generation_options::m_show_state_diagram_xml): New field.
	(html_generation_options::m_show_state_diagram_dot_src): New field.
	* diagnostic-format-sarif.cc: Include "xml.h".
	(populate_thread_flow_location_object): If requested, attempt to
	generate xml state and add it to the proeprty bag as
	"gcc/diagnostic_event/xml_state" in xml source form.
	(sarif_generation_options::sarif_generation_options): Initialize
	m_xml_state.
	* diagnostic-format-sarif.h
	(sarif_generation_options::m_xml_state): New field.
	* diagnostic-path.cc: Define INCLUDE_MAP.  Include "xml.h".
	(diagnostic_event::maybe_make_xml_state): New.
	* diagnostic-path.h (class xml::document): New forward decl.
	(diagnostic_event::maybe_make_xml_state): New vfunc decl.
	* diagnostic-state-to-dot.cc: New file.
	* diagnostic-state.h: New file.
	* digraph.cc: Define INCLUDE_STRING and INCLUDE_VECTOR.
	* doc/analyzer.texi: Document state diagrams in html output.
	(__analyzer_dump_dot): New.
	(__analyzer_dump_xml): New.
	* doc/invoke.texi (sarif): Add "xml-state" key.
	(experimental-html): Add keys "show-state-diagrams",
	"show-state-diagrams-dot-src" and "show-state-diagrams-xml".
	* graphviz.cc: Define INCLUDE_MAP, INCLUDE_STRING, and
	INCLUDE_VECTOR.  Include "xml.h", "xml-printer.h", "pex.h" and
	"selftest.h".
	(graphviz_out::graphviz_out): Extract...
	(dot::writer::writer): ...this.
	(graphviz_out::write_indent): Convert to...
	(dot::writer::write_indent): ...this.
	(graphviz_out::print): Use get_pp.
	(graphviz_out::println): Likewise.
	(graphviz_out::begin_tr): Likewise.
	(graphviz_out::end_tr): Likewise.
	(graphviz_out::begin_td): Likewise.
	(graphviz_out::end_td): Likewise.
	(graphviz_out::begin_trtd): Likewise.
	(graphviz_out::end_tdtr): Likewise.
	(dot::ast_node::dump): New.
	(dot::id::id): New.
	(dot::id::print): New.
	(dot::id::is_identifier_p): New.
	(dot::kv_pair::print): New.
	(dot::attr_list::print): New.
	(dot::stmt_list::print): New.
	(dot::stmt_list::add_edge): New.
	(dot::stmt_list::add_attr): New.
	(dot::graph::print): New.
	(dot::stmt_with_attr_list::set_label): New.
	(dot::node_stmt::print): New.
	(dot::attr_stmt::print): New.
	(dot::kv_stmt::print): New.
	(dot::node_id::print): New.
	(dot::port::print): New.
	(dot::edge_stmt::print): New.
	(dot::subgraph::print): New.
	(dot::make_svg_document_buffer_from_graph): New.
	(dot::make_svg_from_graph): New.
	(selftest:test_ids): New.
	(selftest:test_trivial_graph): New.
	(selftest:test_layout_example): New.
	(selftest:graphviz_cc_tests): New.
	* graphviz.h (xml::node): New forward decl.
	(class graphviz_out): Split out into...
	(class dot::writer): ...this new class
	(struct dot::ast_node): New.
	(struct dot::id): New.
	(struct dot::kv_pair): New.
	(struct dot::attr_list): New.
	(struct dot::stmt_list): New.
	(struct dot::graph): New.
	(struct dot::stmt): New.
	(struct dot::stmt_with_attr_list): New.
	(struct dot::node_stmt): New.
	(struct dot::attr_stmt): New.
	(struct dot::kv_stmt): New.
	(enum class dot::compass_pt): New.
	(struct dot::port): New.
	(struct dot::node_id): New.
	(struct dot::edge_stmt): New.
	(struct dot::subgraph): New.
	(dot::make_svg_from_graph): New.
	* opts-diagnostic.cc (sarif_scheme_handler::make_sink): Add
	"xml-state" flag.
	(html_scheme_handler::make_sink): Add flags "show-state-diagrams",
	"show-state-diagram-dot-src", and "show-state-diagram-xml".
	* pex.cc: New file.
	* pex.h: New file.
	* selftest-run-tests.cc (selftest::run_tests): Call
	graphviz_cc_tests.
	* selftest.h (selftest::graphviz_cc_tests): New decl.
	* xml.cc (xml::node_with_children::add_comment): New.
	(xml::node_with_children::find_child_element): New.
	(xml::element::get_attr): New.
	(xml::comment::write_as_xml): New.
	(selftest::test_printer): Add coverage of find_child_element and
	get_attr.
	(selftest::test_comment): New.
	(selftest::xml_cc_tests): Call test_comment.
	* xml.h: New forward decls.
	(xml::node::dyn_cast_text): Use nullptr.
	(xml::node::dyn_cast_element): New vfunc.
	(xml::node_with_children::add_comment): New decl.
	(xml::node_with_children::find_child_element): New decl.
	(xml::element::dyn_cast_element): New vfunc impl.
	(xml::element::get_attr): New decl.
	(struct xml::comment): New xml::node subclass.

2025-06-23  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc (html_token_printer::print_tokens):
	Handle pp_token::kind::event_id.
	(selftest::test_token_printer): Add coverage of printing an event
	id.

2025-06-23  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
	new case US_PLUS.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op us_plus.

2025-06-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120608
	* tree-tailcall.cc (empty_eh_cleanup): Ignore .ASAN_MARK (POISON)
	internal calls for the cfun->has_musttail case and diag_musttail.
	(find_tail_calls): Likewise.

2025-06-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120608
	* cfgexpand.cc: Include rtl-iter.h.
	(expand_gimple_tailcall): Add ASAN_EPILOG_SEQ argument, if non-NULL
	and expand_gimple_stmt emitted a tail call, emit a copy of that
	insn sequence before the call sequence.
	(expand_gimple_basic_block): Remove DISABLE_TAIL_CALLS argument, add
	ASAN_EPILOG_SEQ argument.  Disable tail call flag only on non-musttail
	calls if that flag is set, pass it to expand_gimple_tailcall.
	(pass_expand::execute): Pass VAR_RET_SEQ directly as last
	expand_gimple_basic_block argument rather than its comparison with
	NULL.

2025-06-23  Pengfei Li  <Pengfei.Li2@arm.com>

	* tree-vect-data-refs.cc (vect_peeling_supportable): Return new
	enum values to indicate if combined peeling and versioning can
	potentially support vectorization.
	(vect_enhance_data_refs_alignment): Support combined peeling and
	versioning in vectorization analysis.
	* tree-vect-loop-manip.cc (vect_create_cond_for_align_checks):
	Add a new type of runtime check for mutually aligned DRs.
	* tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Set
	default value of allow_mutual_alignment in the initializer list.
	* tree-vectorizer.h (enum peeling_support): Define type of
	peeling support for function vect_peeling_supportable.
	(LOOP_VINFO_ALLOW_MUTUAL_ALIGNMENT): New access macro.

2025-06-23  Mikael Morin  <morin-mikael@orange.fr>

	* match.pd (`-(-X)`, `~(~X)`, `conj(conj(X))`): Add a
	NON_LVALUE_EXPR wrapper to the simplification of doubled unary
	operators NEGATE_EXPR, BIT_NOT_EXPR and CONJ_EXPR.

2025-06-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120729
	* gimple-predicate-analysis.h (uninit_analysis::prune_phi_opnds):
	Add argument of work budget remaining.
	* gimple-predicate-analysis.cc (uninit_analysis::prune_phi_opnds):
	Likewise.  Maintain and honor it throughout the recursion.
	* params.opt (uninit-max-prune-work): New.
	* doc/invoke.texi (uninit-max-prune-work): Document.

2025-06-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/120721
	* function.cc (instantiate_virtual_regs_in_insn): Use force_subreg
	instead of simplify_gen_subreg when instantiating an rvalue SUBREG.

2025-06-23  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120728
	* config/i386/i386.cc (ix86_get_ssemov): Use vmovdqu16/vmovdqu8
	only with EVEX register operands.

2025-06-23  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386-options.cc (processor_cost_table): Add a
	PROCESSOR_XXX comment to each entry.

2025-06-22  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/119830
	* config/riscv/riscv.cc (riscv_build_integer_1): Make arithmetic in bclr case
	clean for 32 bit hosts.

2025-06-22  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/120550
	* ext-dce.cc (ext_dce_try_optimize_insn): Drop REG_EQUAL/REG_EQUIV
	notes on modified insns.

2025-06-22  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.h (TARGET_DEPBITS): New macro.
	* config/xtensa/xtensa.md (insvsi): New insn pattern.

2025-06-22  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_zero_call_used_regs):
	New prototype and function.
	(TARGET_ZERO_CALL_USED_REGS): Define macro.

2025-06-22  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (update_count_by_afdo_count): Make static;
	add variant accepting profile_count.
	(afdo_find_equiv_class): Use update_count_by_afdo_count.
	(afdo_propagate_edge): Likewise.
	(afdo_propagate): Likewise.
	(afdo_calculate_branch_prob): Fix handling of all_known.
	(afdo_annotate_cfg): Annotate by 0 where both afdo and static
	profile agrees.

2025-06-22  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (afdo_set_bb_count): Dump inline stacks
	and reasons when lookup failed.
	(afdo_set_bb_count): Record info about BBs with zero AFDO count.
	(afdo_annotate_cfg): Set profile to global0_afdo if there are
	no samples in profile.

2025-06-22  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-profile.cc (ipa_profile): Use widest_int to avoid
	possible overflows.

2025-06-22  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (autofdo::afdo_count_scale): New.
	(autofdo_source_profile::update_inlined_ind_target): Scale
	counts.
	(autofdo_source_profile::read): Set scale and dump
	statistics.
	(afdo_indirect_call): Scale.
	(afdo_set_bb_count): Scale.
	(afdo_find_equiv_class): Fix dumps.
	(afdo_annotate_cfg): Scale.

2025-06-22  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.cc (cgraph_node::make_profile_global0): Support
	GUESSED_GLOBAL0_AFDO
	* ipa-cp.cc (update_profiling_info): Use
	GUESSED_GLOBAL0_AFDO.
	* profile-count.cc (profile_probability::dump): Use
	quality ().
	(profile_probability::stream_in): Use m_adjusted_quality.
	(profile_probability::stream_out): Use m_adjusted_quality.
	(profile_count::combine_with_ipa_count): Use quality ().
	(profile_probability::sqrt): Likewise.
	* profile-count.h (enum profile_quality): Add
	GUESSED_GLOBAL0_AFDO; reoder GUESSED_GLOBAL0_ADJUSTED and
	GUESSED_GLOBAL0.
	(profile_probability): Add min_quality; replase m_quality
	by m_adjused_quality; add set_quality; update all users
	of quality.
	(profile_count): Set n_bits to 60; make m_quality 4 bits;
	update uses of quality.
	(profile_count::afdo_zero, profile_count::globa0afdo): New.

2025-06-21  Jan Hubicka  <hubicka@ucw.cz>

	* tree-inline.cc (copy_cfg_body): Fix profile of split functions.

2025-06-21  Jeff Law  <jlaw@ventanamicro.com>

	PR target/118241
	* config/riscv/predicates.md (prefetch_operand): New predicate.
	* config/riscv/constraints.md (Q): New constraint.
	* config/riscv/riscv.md (prefetch): Use new predicate and constraint.
	(riscv_prefetchi_<mode>): Similarly.

2025-06-21  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120746
	* value-range.cc (irange::snap): Use int type instead of uint.

2025-06-21  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (dump_inline_stack): New function.
	(get_inline_stack_in_node): New function.
	(get_relative_location_for_stmt): Add FN parameter.
	(has_indirect_call): Remove.
	(function_instance::find_icall_target_map): Add FN parameter.
	(function_instance::remove_icall_target): New function.
	(function_instance::read_function_instance): Set sum_max.
	(autofdo_source_profile::get_count_info): Add NODE parameter.
	(autofdo_source_profile::update_inlined_ind_target): Add NODE parameter.
	(autofdo_source_profile::remove_icall_target): New function.
	(afdo_indirect_call): Add INDIRECT_EDGE parameter; dump reason
	for failure; do not check for recursion; do not inline call.
	(afdo_vpt): Add INDIRECT_EDGE parameter.
	(afdo_set_bb_count): Do not take PROMOTED set.
	(afdo_vpt_for_early_inline): Remove.
	(afdo_annotate_cfg): Do not take PROMOTED set.
	(auto_profile): Do not call afdo_vpt_for_early_inline.
	(afdo_callsite_hot_enough_for_early_inline): Dump count.
	(remove_afdo_speculative_target): New function.
	* auto-profile.h (afdo_vpt_for_early_inline): Declare.
	(remove_afdo_speculative_target): Declare.
	* ipa-inline.cc (inline_functions_by_afdo): Do VPT.
	(early_inliner): Redirecct edges if inlining happened.
	* tree-inline.cc (expand_call_inline): Add sanity check.

2025-06-21  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (get_inline_stack): Add fn parameter.
	* ipa-inline.cc (want_early_inline_function_p): Do not care
	about AFDO.
	(inline_functions_by_afdo): New function.
	(early_inliner): Use it.

2025-06-21  Pan Li  <pan2.li@intel.com>

	PR target/120652
	* config/riscv/autovec.md: Add immediate_operand for
	select_vl operand 2.

2025-06-20  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/120701
	* value-range.cc (irange::verify_range): Verify range pairs are
	sorted properly.
	(irange::snap): Check for over/underflow properly.

2025-06-20  Andrew Stubbs  <ams@baylibre.com>

	PR target/120722
	* config/gcn/gcn.cc (gcn_hard_regno_mode_ok): Allow SImode in VCC_HI.

2025-06-20  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/120634
	* prime-paths.cc (struct auto_vec_vec): Add constructor from
	vec.
	(test_split_components): Use auto_vec_vec.
	(test_scc_internal_prime_paths): Ditto.
	(test_scc_entry_exit_paths): Ditto.
	(test_complete_prime_paths): Ditto.
	(test_entry_prime_paths): Ditto.
	(test_singleton_path): Ditto.

2025-06-20  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/120634
	* prime-paths.cc (trie::paths): Use auto_vec.

2025-06-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120654
	* vr-values.cc (range_fits_type_p): Check for undefined_p ()
	before accessing type ().

2025-06-20  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120708
	* config/i386/i386-expand.cc (ix86_expand_set_or_cpymem): Use
	MOVE_MAX to get the widest vector mode in vector loop.

2025-06-20  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.cc (or1k_noce_conversion_profitable_p): New
	function.
	(or1k_is_cmov_insn): New function.
	(TARGET_NOCE_CONVERSION_PROFITABLE_P): Define macro.
	* config/or1k/or1k.md (cbranchsi4): Convert to insn_and_split.
	(cbranch<mode>4): Convert to insn_and_split.

2025-06-20  Stafford Horne  <shorne@gmail.com>

	PR target/120587
	* config/or1k/or1k.md (zero_extendbisi2_sr_f): New expand.
	(extendbisi2_sr_f): New expand.
	* config/or1k/predicates.md (sr_f_reg_operand): New predicate.

2025-06-20  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
	new case UMIN.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op umin.

2025-06-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/120689
	* function.cc (assign_parm_setup_block): Align parm to at least
	word alignment even on !STRICT_ALIGNMENT targets, as long as
	BITS_PER_WORD is not larger than MAX_SUPPORTED_STACK_ALIGNMENT.

2025-06-19  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120427
	* config/i386/i386.md (*mov<mode>_and): Changed to
	define_insn_and_split.  Split it to "mov $0,mem" if not -Oz.
	(*mov<mode>_or): Changed to define_insn_and_split.  Split it
	to "mov $-1,mem" if not -Oz.
	(peephole2): Don't transform "mov $-1,reg" to "push $-1; pop reg"
	for -Oz since it will be transformed to "or $-1,reg".

2025-06-19  Georg-Johann Lay  <avr@gjlay.de>

	PR other/115893
	* doc/install.texi (Prerequisites): Note that Texinfo older
	than v7.1 may throw incorrect build warnings, cf.
	https://lists.nongnu.org/archive/html/help-texinfo/2023-11/msg00004.html

2025-06-19  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* config/riscv/riscv-cores.def (RISCV_TUNE): Add "generic" tune.
	* config/riscv/riscv.cc: Add generic_tune_info.
	* config/riscv/riscv.h (RISCV_TUNE_STRING_DEFAULT): Change default tune.

2025-06-19  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120631
	* dfp.cc (decimal_real_to_integer): Use result multiplication not just
	when precision > 128 and dn.exponent > 19, but when precision > 64
	and dn.exponent > 0.

2025-06-19  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.cc (riscv_legitimize_move): Use
	riscv_2x_xlen_mode_p.
	(riscv_binary_cost): Ditto.
	(riscv_hard_regno_mode_ok): Ditto.

2025-06-19  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.cc (riscv_cost_model): Add cost model for
	zilsd.

2025-06-19  Lili Cui  <lili.cui@intel.com>

	PR target/120697
	* config/i386/i386.cc (ix86_expand_prologue):
	Remove 3 assertions and associated code.

2025-06-18  Dimitar Dimitrov  <dimitar@dinux.eu>
	    Richard Sandiford  <richard.sandiford@arm.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/119966
	* emit-rtl.cc (validate_subreg): Call simplify_subreg_regno
	instead of checking info.representable_p..
	* rtl.h (simplify_subreg_regno): Add new argument
	allow_stack_regs.
	* rtlanal.cc (simplify_subreg_regno): Do not reject
	stack-related registers if allow_stack_regs is true.

2025-06-18  Andrew MacLeod  <amacleod@redhat.com>

	* value-range.cc (irange::intersect_bitmask): Always update the
	stored mask to reflect the current calculated mask.

2025-06-18  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/119039
	* value-range.cc (irange::contains_p): Call wide_int version of
	contains_p for singleton ranges.
	(irange::intersect): If either range is a singleton, use
	contains_p.

2025-06-18  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/119039
	* vr-values.cc (simplify_using_ranges::legacy_fold_cond): Remove.
	(simplify_using_ranges::simplify_switch_using_ranges): Adjust.

2025-06-18  Richard Biener  <rguenther@suse.de>

	* tree-cfg.cc (dump_function_to_file): Use flags, not dump_flags.

2025-06-18  Jan Beulich  <jbeulich@suse.com>

	* doc/gcov.texi: Drop blank after @anchor.

2025-06-18  Jan Beulich  <jbeulich@suse.com>

	* doc/extend.texi: Fill first argument of @xref{}.

2025-06-18  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120631
	* real.cc (decimal_from_integer): Add digits argument, if larger than
	256, use XALLOCAVEC allocated buffer.
	(real_from_integer): Pass val_in's precision divided by 3 to
	decimal_from_integer.
	* dfp.cc (decimal_real_to_integer): For precision > 128 if finite
	and exponent is large, decrease exponent and multiply resulting
	wide_int by powers of 10^19.

2025-06-18  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
	new case SMIN.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op smin.

2025-06-18  Lili Cui  <lili.cui@intel.com>
	    Michael Matz  <matz@suse.de>

	* config/i386/i386-protos.h (ix86_get_separate_components):
	New function.
	(ix86_components_for_bb): Likewise.
	(ix86_disqualify_components): Likewise.
	(ix86_emit_prologue_components): Likewise.
	(ix86_emit_epilogue_components): Likewise.
	(ix86_set_handled_components): Likewise.
	* config/i386/i386.cc (save_regs_using_push_pop):
	Split from ix86_compute_frame_layout.
	(ix86_compute_frame_layout):
	Use save_regs_using_push_pop.
	(pro_epilogue_adjust_stack):
	Use gen_pro_epilogue_adjust_stack_add_nocc.
	(ix86_expand_prologue): Add some assertions and adjust
	the stack frame at the beginning of the prolog for shrink
	wrapping separate.
	(ix86_emit_save_regs_using_mov):
	Skip registers that are wrapped separately.
	(ix86_emit_restore_regs_using_mov): Likewise.
	(ix86_expand_epilogue): Add some assertions and set
	restore_regs_via_mov to true for shrink wrapping separate.
	(ix86_get_separate_components): New function.
	(ix86_components_for_bb): Likewise.
	(ix86_disqualify_components): Likewise.
	(ix86_emit_prologue_components): Likewise.
	(ix86_emit_epilogue_components): Likewise.
	(ix86_set_handled_components): Likewise.
	(TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
	(TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
	(TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
	(TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
	(TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
	(TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
	* config/i386/i386.h (struct machine_function):Add
	reg_is_wrapped_separately array for register wrapping
	information.
	* config/i386/i386.md
	(@pro_epilogue_adjust_stack_add_nocc<mode>): New.

2025-06-18  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/120661
	* value-range.cc (irange::snap): New.
	(irange::snap_subranges): New.
	(irange::set_range_from_bitmask): Call snap_subranges.
	* value-range.h (snap, snap_subranges): New prototypes.

2025-06-17  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (afdo_indirect_call): Compute speculative edge
	probability.
	(add_scale): Break out from ...
	(scale_bbs): Break out from ...
	(afdo_adjust_guessed_profile): ... here; use componet array instead of
	current_component hash_map; handle components with only 0 profile;
	be more agressive on finding scales along the boundary.

2025-06-17  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.cc (cgraph_node::apply_scale): Special case scaling
	to profile_count::zero ().
	(cgraph_node::verify_node): Add extra compatibility check.

2025-06-17  Umesh Kalappa  <ukalappa.mips@gmail.com>

	* config/riscv/sync.md (lrsc_atomic_exchange<mode>): Use scratch
	register for loop control rather than lr output.

2025-06-17  Jason Merrill  <jason@redhat.com>

	* diagnostic.h (diagnostic_option_classifier): Friend
	diagnostic_context.
	(diagnostic_context::get_classification_history): New.

2025-06-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/120677
	* gimple-crc-optimization.cc (crc_optimization::optimize_crc_loop):
	Insert before gsi_after_labels instead of gsi_start_bb.  Use
	gimple_bb (output_crc) instead of output_crc->bb.  Formatting fix.

2025-06-17  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113027
	* config/aarch64/aarch64-protos.h (aarch64_decompose_vec_struct_index):
	Declare.
	* config/aarch64/aarch64.cc (aarch64_decompose_vec_struct_index): New
	function.
	* config/aarch64/iterators.md (VEL, Vel): Add Advanced SIMD
	structure modes.
	* config/aarch64/aarch64-simd.md (vec_set<VSTRUCT_QD:mode>)
	(vec_extract<VSTRUCT_QD:mode>): New patterns.

2025-06-17  Tobias Burnus  <tburnus@baylibre.com>

	* omp-offload.cc (omp_discover_declare_target_tgt_fn_r): Also
	walk external functions that are declare inline (and have a
	DECL_SAVED_TREE).

2025-06-16  Spencer Abson  <spencer.abson@arm.com>

	* config/aarch64/aarch64-protos.h (aarch64_sve_valid_pred_p):
	Declare helper for aarch64_predicate_operand.
	(aarch64_sve_packed_pred): Declare helper for new expanders.
	(aarch64_sve_fp_pred): Likewise.
	* config/aarch64/aarch64-sve.md (<optab><mode><v_int_equiv>2):
	Extend into...
	(<optab><SVE_HSF:mode><SVE_HSDI:mode>2): New expander for converting
	vectors of HF,SF to vectors of HI,SI,DI.
	(<optab><VNx2DF_ONLY:mode><SVE_2SDI:mode>2): New expander for converting
	vectors of SI,DI to vectors of DF.
	(*aarch64_sve_<optab>_nontrunc<SVE_PARTIAL_F:mode><SVE_HSDI:mode>):
	New pattern to match those we've added here.
	(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): Extend
	into...
	(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><SVE_SI:mode>): Match both
	VNx2SI<-VNx2DF and VNx4SI<-VNx4DF.
	(<optab><v_int_equiv><mode>2): Extend into...
	(<optab><SVE_HSDI:mode><SVE_F:mode>2): New expander for converting vectors
	of HI,SI,DI to vectors of HF,SF,DF.
	(*aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_PARTIAL_F:mode>): New
	pattern to match those we've added here.
	(trunc<SVE_SDF:mode><SVE_PARTIAL_HSF:mode>2): New expander to handle
	narrowing ('truncating') FP<-FP conversions.
	(*aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_PARTIAL_HSF:mode>): New
	pattern to handle those we've added here.
	(extend<SVE_PARTIAL_HSF:mode><SVE_SDF:mode>2): New expander to handle
	widening ('extending') FP<-FP conversions.
	(*aarch64_sve_<optab>_nontrunc<SVE_PARTIAL_HSF:mode><SVE_SDF:mode>): New
	pattern to handle those we've added here.
	* config/aarch64/aarch64.cc (aarch64_sve_packed_pred): New function.
	(aarch64_sve_fp_pred): Likewise.
	(aarch64_sve_valid_pred_p): Likewise.
	* config/aarch64/iterators.md (SVE_PARTIAL_HSF): New mode iterator.
	(SVE_HSF): Likewise.
	(SVE_SDF): Likewise.
	(SVE_SI): Likewise.
	(SVE_2SDI) Likewise.
	(self_mask):  Extend to all integer/FP vector modes.
	(narrower_mask): Likewise (excluding QI).
	* config/aarch64/predicates.md (aarch64_predicate_operand): New special
	predicate to handle narrower predicate modes.

2025-06-16  Spencer Abson  <spencer.abson@arm.com>

	* config/aarch64/aarch64-sve.md: Replace uses of SVE_FULL_F_BF
	with SVE_FULL_F_B16B16.
	Replace use of SVE_F with SVE_F_BF.
	* config/aarch64/iterators.md (SVE_PARTIAL_F): New iterator for
	partial SVE FP modes.
	(SVE_FULL_F_BF): Rename to SVE_FULL_F_B16B16.
	(SVE_PARTIAL_F_B16B16): New iterator (BF16 included) for partial
	SVE FP modes.
	(SVE_F_B16B16): New iterator for all SVE FP modes.
	(SVE_BF): New iterator for all SVE BF16 modes.
	(SVE_F): Redefine to exclude BF16 modes.
	(SVE_F_BF): New iterator to replace the previous SVE_F.
	(VPRED): Describe the VPRED mapping for partial vector modes.
	(b): Cover partial FP modes.
	(is_bf16): Likewise.

2025-06-16  Jason Merrill  <jason@redhat.com>

	* doc/invoke.texi: Document -Wsfinae-incomplete.

2025-06-16  Matthieu Longo  <matthieu.longo@arm.com>
	    Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config.in: Regenerate.
	* config/aarch64/aarch64-elf-metadata.h
	(class aeabi_subsection): New class for BAs.
	* config/aarch64/aarch64-protos.h
	(aarch64_pacret_enabled): New function.
	* config/aarch64/aarch64.cc
	(HAVE_AS_AEABI_BUILD_ATTRIBUTES): New definition.
	(aarch64_file_end_indicate_exec_stack): Emit BAss.
	(aarch64_pacret_enabled): New function.
	(aarch64_start_file): Indent.
	* configure: Regenerate.
	* configure.ac: New configure check for BAs support in binutils.

2025-06-16  Matthieu Longo  <matthieu.longo@arm.com>

	* Makefile.in: Add missing declaration of BACKEND_H.
	* config.gcc: Add aarch64-elf-metadata.o to extra_objs.
	* config/aarch64/aarch64-elf-metadata.h: New file
	* config/aarch64/aarch64-elf-metadata.cc: New file.
	* config/aarch64/aarch64.cc
	(GNU_PROPERTY_AARCH64_FEATURE_1_AND): Removed.
	(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): Likewise.
	(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): Likewise.
	(GNU_PROPERTY_AARCH64_FEATURE_1_GCS): Likewise.
	(aarch64_file_end_indicate_exec_stack): Move GNU properties code to
	aarch64-elf-metadata.cc
	* config/aarch64/t-aarch64: Declare target aarch64-elf-metadata.o

2025-06-16  Matthieu Longo  <matthieu.longo@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_file_end_indicate_exec_stack): Emit assembly comments.

2025-06-16  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (edge_set): Remove unused typedef.
	(is_bb_annotated): Sanity check that annotated BBs has
	quality AFDO and non-anntoated non-AFDO.  Exceptions are
	zeros.
	(set_bb_annotated): Verify that BB set annotated has
	AFDO profile.
	(afdo_set_bb_count): Do not return true for 0 counts.
	(afdo_find_equiv_class): Fix formating;
	do not combine profile of annoated and non-annotated BBs.
	(afdo_propagate_edge): Fix variable names; dump info
	about changes; do not change non-annoated BB profiles;
	if all flow out of BB was decided on, annotate remaining
	edges with 0.
	(afdo_propagate): Dump info about copied BB counts
	and number of iteraitons used.
	(cmp): New function.
	(afdo_adjust_guessed_profile): New function.
	(afdo_calculate_branch_prob): Do not initialize loop
	optimizer here; call afdo_adjust_guessed_profile.
	(afdo_annotate_cfg): Initialize profile here;
	anotate entry/exit blocks only of profile is non-0.
	* profile-count.h: (profile_count::force_guessed): New.
	* tree-cfg.cc (gimple_verify_flow_info): Fix typo.

2025-06-16  Jiawei  <jiawei@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: Add b-ext and supm.

2025-06-16  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/predicates.md (reload_operand):
	Remove.
	* config/xtensa/xtensa.md:
	Remove the peephole2 pattern that was previously added.

2025-06-16  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md:
	Remove the peephole2 pattern that was previously added.

2025-06-16  Jiawei  <jiawei@iscas.ac.cn>

	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Handle
	more logical simplifications.

2025-06-15  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
	case UMAX.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op umax.

2025-06-14  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2025-06-14  Georg-Johann Lay  <avr@gjlay.de>

	PR rtl-optimization/120423
	PR rtl-optimization/116389
	* config/avr/avr.md [-mno-lra]: Add pre-reload split to transform
	(left shift of) a paradoxical subreg to a (left shift of) zero-extend.

2025-06-13  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120629
	* cfgexpand.cc (expand_split_edge): New function.
	(expand_gimple_cond, construct_init_block): Use it.

2025-06-13  Spencer Abson  <spencer.abson@arm.com>

	PR target/118150
	* config/aarch64/aarch64-sve.md (*one_cmpl<mode>3_cc): New
	combiner pattern.
	(*one_cmpl<mode>3_ptest): Likewise.

2025-06-13  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120629
	* cfgexpand.cc (construct_init_block): If first_block isn't BB_RTL,
	has any PHI nodes and false_edge->dest_idx before redirection is
	different from make_single_succ_edge result's dest_idx, swap the
	latter with the former last pred edge and their dest_idx members.

2025-06-13  Kito Cheng  <kito.cheng@sifive.com>

	* gcc.cc (driver::set_up_specs): Use gcc_exec_prefix to
	read the spec file rather than standard_exec_prefix.

2025-06-13  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120589
	* config/mcore/mcore.cc (mcore_mark_dllimport): Don't use
	gen_rtx_MEM.

2025-06-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/120638
	* tree-ssa-math-opts.cc (pass_cse_reciprocals::execute): Call
	reset_flow_sensitive_info on arg1.

2025-06-12  Stafford Horne  <shorne@gmail.com>

	PR target/120587
	* config/or1k/or1k.cc (or1k_can_change_mode_class): Allow
	changing flags mode from BI to SI to allow for paradoxical
	subregs.

2025-06-12  Uros Bizjak  <ubizjak@gmail.com>

	PR target/120604
	* config/i386/i386-expand.cc (ix86_expand_int_movcc): Make sure
	we can represent the difference between two 64-bit DImode
	immediate values in 64-bit HOST_WIDE_INT.

2025-06-12  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120629
	* cfgexpand.cc (expand_gimple_cond): If dest bb isn't BB_RTL,
	has any PHI nodes and false_edge->dest_idx before redirection is
	different from make_single_succ_edge result's dest_idx, swap the
	latter with the former last pred edge and their dest_idx members.

2025-06-12  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
	case SMAX.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op smax.

2025-06-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/120624
	* config/aarch64/aarch64.md (SME_STATE_REGNUM): Expand on comments.
	* config/aarch64/aarch64-sme.md (aarch64_restore_za): Also set
	SME_STATE_REGNUM

2025-06-12  Alfie Richards  <alfie.richards@arm.com>

	* cgraph.cc (cgraph_node::record_function_versions): Refactor and
	rename to...
	(cgraph_node::add_function_version): new function.
	* cgraph.h (cgraph_node::record_function_versions): Refactor and
	rename to...
	(cgraph_node::add_function_version): new function.
	* config/aarch64/aarch64.cc (aarch64_get_function_versions_dispatcher):
	Remove reordering.
	* config/i386/i386-features.cc (ix86_get_function_versions_dispatcher):
	Remove reordering.
	* config/riscv/riscv.cc (riscv_get_function_versions_dispatcher):
	Remove reordering.
	* config/rs6000/rs6000.cc (rs6000_get_function_versions_dispatcher):
	Remove reordering.

2025-06-12  Alfie Richards  <alfie.richards@arm.com>

	* attribs.cc (is_function_default_version): Add target_version logic.

2025-06-12  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Set 4 for SRF,
	6 for GRR, GNR, CWF, DMR, ARL, PTL.

2025-06-11  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc: Include "selftest-xml.h".
	(html_builder::make_element_for_diagnostic): Move...
	(class html_token_printer): ...from local to the function
	to the global namespace.
	(struct selftest::token_printer_test): New.
	(selftest::test_token_printer): New.
	(selftest::test_simple_log): Simplify using ASSERT_XML_PRINT_EQ.
	(selftest::test_metadata): Likewise.
	(selftest::diagnostic_format_html_cc_tests): Run the new test.
	* selftest-xml.h: New file.
	* xml.cc: Include "selftest-xml.h".
	(selftest::assert_xml_print_eq): New.
	(selftest::test_no_dtd): Simplify using ASSERT_XML_PRINT_EQ.
	(selftest::test_printer): Likewise.
	(selftest::test_attribute_ordering): Likewise.

2025-06-11  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/riscv.cc (struct riscv_tune_param): Add tune
	param.
	(riscv_sched_can_speculate_insn): Implement.
	(TARGET_SCHED_CAN_SPECULATE_INSN): Ditto.

2025-06-11  Uros Bizjak  <ubizjak@gmail.com>

	PR target/120604
	* config/i386/i386-expand.cc (ix86_expand_int_movcc): Cast operands of
	signed 64-bit HOST_WIDE_INT subtractions to (unsigned HOST_WIDE_INT).

2025-06-11  Paul-Antoine Arras  <parras@baylibre.com>

	PR target/119100
	* config/riscv/autovec-opt.md (*<optab>_vf_<mode>): Only handle vfmadd
	and vfmsub.
	(*vfnmsub_<mode>): New pattern.
	(*vfnmadd_<mode>): New pattern.
	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add cost model for
	NEG and VEC_DUPLICATE.

2025-06-11  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120434
	* gimple-range-fold.cc: Include rtl.h.
	(fold_using_range::range_of_range_op): Handle bb ending with
	GIMPLE_COND during RTL expansion where there is only one succ
	edge instead of two.

2025-06-11  Jakub Jelinek  <jakub@redhat.com>

	* internal-fn.cc (expand_POPCOUNT): Use
	expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE) instead of
	expand_normal (lhs).

2025-06-11  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc: Include "diagnostic-path.h" and
	"diagnostic-client-data-hooks.h".
	(html_builder::m_logical_loc_mgr): New field.
	(html_builder::m_cur_nesting_levels): New field.
	(html_builder::m_last_logical_location): New field.
	(html_builder::m_last_location): New field.
	(html_builder::m_last_expanded_location): New field.
	(HTML_STYLE): Add "white-space: pre;" to .source and .annotation.
	Add "gcc-quoted-text" CSS class.
	(html_builder::html_builder): Initialize the new fields.  If CSS
	is enabled, add CDN links to PatternFly 3 stylesheets.
	(html_builder::add_stylesheet): New.
	(html_builder::on_report_diagnostic): Add "alert" param to
	make_element_for_diagnostic, setting it by default, but unsetting
	it for nested diagnostics below the top level.  Use
	add_at_nesting_level for nested diagnostics.
	(add_nesting_level_attr): New.
	(html_builder::add_at_nesting_level): New.
	(get_pf_class_for_alert_div): New.
	(get_pf_class_for_alert_icon): New.
	(get_label_for_logical_location_kind): New.
	(add_labelled_value): New.
	(html_builder::make_element_for_diagnostic): Add leading comment.
	Add "alert" param.  Drop class="gcc-diagnostic" from <div> tag,
	instead adding the class for a PatternFly 3 alert if "alert" is
	true, and adding a <span> with an alert icon, both according to
	the diagnostic severity.  Add a severity prefix to the message for
	alerts.  Add any metadata/option text as suffixes to the message.
	Show any logical location.  Show any physical location.  Don't
	show the locus if the last location is unchanged within the
	diagnostic_group.  Wrap any execution path element in a
	<div id="execution-path"> and add a label to it.  Wrap any
	generated patch in a <div id="suggested-fix"> and add a label
	to it.
	(selftest::test_simple_log): Update expected HTML.

2025-06-11  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path-output.cc: Use xml::printer::add_text_from_pp.
	* diagnostic-show-locus.cc: Likewise.
	* xml-printer.h (xml::printer::add_text_from_pp): New decl.
	* xml.cc (xml::node_with_children::add_text_from_pp): New.
	(xml::printer::add_text_from_pp): New.
	* xml.h (xml::node_with_children::add_text_from_pp): New decl.

2025-06-11  David Malcolm  <dmalcolm@redhat.com>

	PR other/120610
	* diagnostic-format-html.cc (html_builder::html_builder): Update
	for new param of xml::printer::pop_tag.
	(html_path_label_writer::end_label): Likewise.
	(html_builder::make_element_for_diagnostic::html_token_printer):
	Give the instance its own xml::printer.  Update for new param of
	xml::printer::pop_tag.
	(html_builder::make_element_for_diagnostic): Give the instance its
	own xml::printer.
	(html_builder::make_metadata_element): Update for new param of
	xml::printer::pop_tag.
	(html_builder::flush_to_file): Likewise.
	* diagnostic-path-output.cc (begin_html_stack_frame): Likewise.
	(begin_html_stack_frame): Likewise.
	(end_html_stack_frame): Likewise.
	(print_path_summary_as_html): Likewise.
	* diagnostic-show-locus.cc
	(struct to_text::auto_check_tag_nesting): New.
	(struct to_html:: auto_check_tag_nesting): New.
	(to_text::pop_html_tag): Change param to const char *.
	(to_html::pop_html_tag): Likewise; rename param to
	"expected_name".
	(default_diagnostic_start_span_fn<to_html>): Update for new param
	of xml::printer::pop_tag.
	(layout_printer<to_html>::end_label): Likewise.
	(layout_printer<Sink>::print_trailing_fixits): Add RAII sentinel
	to check tag nesting for the HTML case.  Delete stray popping
	of "td" in the presence of fix-it hints.
	(layout_printer<Sink>::print_line): Add RAII sentinel
	to check tag nesting for the HTML case.
	(diagnostic_source_print_policy::print_as_html): Likewise.
	(layout_printer<Sink>::print): Likewise.
	* xml-printer.h (xml::printer::printer): Add optional
	"check_popped_tags" param.
	(xml::printer::pop_tag): Add "expected_name" param.
	(xml::printer::get_num_open_tags): New accessor.
	(xml::printer::dump): New decl.
	(xml::printer::m_check_popped_tags): New field.
	(class xml::auto_check_tag_nesting): New.
	(class xml::auto_print_element): Update for new param of pop_tag.
	* xml.cc: Move pragma pop so that the pragma also covers
	xml::printer's member functions, "dump" in particular.
	(xml::printer::printer): Add param "check_popped_tags".
	(xml::printer::pop_tag): Add param "expected_name" and use it to assert
	that the popped tag is as expected.  Assert that we have a tag to
	pop.
	(xml::printer::dump): New.
	(selftest::test_printer): Update for new param of pop_tag.
	(selftest::test_attribute_ordering): Likewise.

2025-06-11  David Malcolm  <dmalcolm@redhat.com>

	* gimple-ssa-warn-access.cc
	(pass_waccess::maybe_check_dealloc_call): Add missing
	auto_diagnostic_group to nest the "returned from %qD"
	note within the warning.

2025-06-10  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.cc (cgraph_node::make_profile_local): New member function.
	(cgraph_node::make_profile_global0): New member function.
	(cgraph_node::apply_scale): Do not call adjust_for_ipa_scalling.
	(cgraph_node::scale_profile_to): New member function.
	* cgraph.h (cgraph_node::make_profile_local,
	cgraph_node::make_profile_global0, cgraph_node::scale_profile_to):
	Declare.
	* ipa-cp.cc (lenient_count_portion_handling): Fix logic dropping count
	to local.
	(update_counts_for_self_gen_clones): Use scale_profile_to.
	(update_profiling_info): Use make_profile_local, make_profile_global0
	and scale_profile_to.
	(update_specialized_profile): Likewise.
	* ipa-inline-transform.cc (clone_inlined_nodes): Call
	adjust_for_ipa_scalling.

2025-06-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120434
	* expr.cc (expand_expr_real_2) <CASE_CONVERT>: If get_range_pos_neg
	at -O2 for scalar integer extension suggests the most significant
	bit of op0 is not set, try both unsigned and signed conversion and
	choose the cheaper one.  If both are the same cost, choose one
	based on TYPE_UNSIGNED (TREE_TYPE (treeop0)).

2025-06-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120434
	* config/i386/i386.md (*bsr_rex64_2): Rename to ...
	(*bsr_rex64<u>_2): ... this.  Use any_extend instead of sign_extend.
	(*bsr_2): Rename to ...
	(*bsr<u>_2): ... this.  Use any_extend instead of sign_extend.
	(bsr splitters after those): Use any_extend instead of sign_extend.

2025-06-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120434
	* cfgrtl.h (update_bb_for_insn_chain): Declare.
	* cfgrtl.cc (update_bb_for_insn_chain): No longer static.
	* cfgexpand.h (expand_remove_edge): Declare.
	* cfgexpand.cc: Include "gimple-range.h".
	(head_end_for_bb): New variable.
	(label_rtx_for_bb): Drop ATTRIBUTE_UNUSED from bb argument.
	Use head_end_for_bb if possible for non-BB_RTL bbs.
	(expand_remove_edge): New function.
	(maybe_cleanup_end_of_block): Use it instead of remove_edge.
	(expand_gimple_cond): Don't clear EDGE_TRUE_VALUE and
	EDGE_FALSE_VALUE just yet.  Use head_end_for_bb elts instead
	of BB_END and update_bb_for_insn_chain instead of update_bb_for_insn.
	(expand_gimple_tailcall): Use expand_remove_edge instead of
	remove_edge.  Use head_end_for_bb elts instead of BB_END and
	update_bb_for_insn_chain instead of update_bb_for_insn.
	(expand_gimple_basic_block): Don't change bb to BB_RTL here, instead
	use head_end_for_bb elts instead of BB_HEAD and BB_END.  Use
	update_bb_for_insn_chain instead of update_bb_for_insn.
	(pass_expand::execute): Enable ranger before expand_gimple_basic_block
	calls and create head_end_for_bb vector.  Disable ranger after
	those calls, turn still non-BB_RTL blocks into BB_RTL and set their
	BB_HEAD and BB_END from head_end_for_bb elts, and clear EDGE_TRUE_VALUE
	and EDGE_FALSE_VALUE flags on edges.  Release head_end_for_bb
	vector.
	* tree-outof-ssa.cc (expand_phi_nodes): Don't clear phi nodes here.
	* tree.h (get_range_pos_neg): Add gimple * argument defaulted to NULL.
	* tree.cc (get_range_pos_neg): Add stmt argument.  Use
	get_range_query (cfun) instead of get_global_range_query () and pass
	stmt as third argument to range_of_expr.
	* expr.cc (expand_expr_divmod): Pass currently_expanding_gimple_stmt
	to get_range_pos_neg.
	(expand_expr_real_1) <case SSA_NAME>: Change internal fn handling
	to avoid temporarily overwriting gimple_call_lhs of ifn, instead
	temporarily overwrite SSA_NAME_VAR of its lhs.
	(maybe_optimize_pow2p_mod_cmp): Pass currently_expanding_gimple_stmt
	to get_range_pos_neg.
	(maybe_optimize_mod_cmp): Likewise.
	* internal-fn.cc (get_min_precision): Likewise.  Use
	get_range_query (cfun) instead of get_global_range_query () and pass
	currently_expanding_gimple_stmt as third argument to range_of_expr.
	Pass g to get_range_pos_neg.
	(expand_addsub_overflow): Pass currently_expanding_gimple_stmt
	to get_range_pos_neg.
	(expand_mul_overflow): Likewise.
	(expand_arith_overflow): Pass stmt to get_range_pos_neg.
	* gimple-range-edge.cc: Include rtl.h.
	(gimple_outgoing_range_stmt_p): Return NULL for BB_RTL bbs.
	(gimple_outgoing_range::calc_switch_range): If default_edge is NULL,
	assert currently_expanding_to_rtl and return before trying to
	set range on that edge.
	* builtins.cc (expand_builtin_strnlen): Use get_range_query (cfun)
	instead of get_global_range_query () and pass
	currently_expanding_gimple_stmt as third argument to range_of_expr.
	(determine_block_size): Likewise.
	* gimple-range.cc (gimple_ranger::range_on_exit): Set s to NULL
	instead of last_nondebug_stmt for BB_RTL bbs.
	* stmt.cc: Include cfgexpand.h.
	(expand_case): Use expand_remove_edge instead of remove_edge.

2025-06-10  Andrew MacLeod  <amacleod@redhat.com>

	* value-range.cc (irange::set_range_from_bitmask): When the bitmask
	result is a singleton, check if it is contained in the range.

2025-06-10  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-devices.def: Add gfx942, gfx950 and gfx9-4-generic.
	* config/gcn/gcn-opts.h (TARGET_CDNA3, TARGET_CDNA3_PLUS,
	TARGET_GLC_NAME, TARGET_TARGET_SC_CACHE): Define.
	(TARGET_ARCHITECTED_FLAT_SCRATCH): Use also for CDNA3.
	* config/gcn/gcn.h (gcn_isa): Add ISA_CDNA3 to the enum.
	* config/gcn/gcn.cc (print_operand): Update 'g' to use
	TARGET_GLC_NAME; add 'G' to print TARGET_GLC_NAME unconditionally.
	* config/gcn/gcn-valu.md (scatter, gather): Use TARGET_GLC_NAME.
	* config/gcn/gcn.md: Use %G<num> instead of glc; use 'buffer_inv sc1'
	for TARGET_TARGET_SC_CACHE.
	* doc/invoke.texi (march): Add gfx942, gfx950 and gfx9-4-generic.
	* doc/install.texi (amdgcn*-*-*): Add gfx942, gfx950 and gfx9-4-generic.
	* config/gcn/gcn-tables.opt: Regenerate.

2025-06-10  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md (lui-constraint<X:mode>and_to_or): Do not use
	the RTL template for split code.  Emit it directly taking care to avoid
	emitting a constant load that needed synthesis.  Fix formatting.

2025-06-10  Kito Cheng  <kito.cheng@sifive.com>

	* doc/riscv-ext.texi: Regen.

2025-06-10  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_vec_dup): Add new
	case UMOD.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op umod.

2025-06-09  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (maybe_get_sarif_kind): Update for
	conversion of enum logical_location_kind to enum class.
	* diagnostic.cc (logical_location_manager::function_p): Likewise.
	* libgdiagnostics.cc (html-output/missing-semicolon.py::get_kind):
	Likewise.
	* logical-location.h (enum logical_location_kind): Convert to...
	(enum class logical_location_kind): ...this.
	* selftest-logical-location.cc
	(test_logical_location_manager::item_from_funcname): Update for
	conversion of enum logical_location_kind to enum class.
	* tree-logical-location.cc
	(tree_logical_location_manager::get_kind): Likewise.

2025-06-09  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.cc (cgraph_node::apply_scale): New member function.
	* cgraph.h (struct cgraph_node): declare.
	* ipa-cp.cc (update_counts_for_self_gen_clones):
	Use cgraph_node::apply_scale.
	(update_profiling_info): Do not overwrite local
	profile when dropping to 0 global profile.
	(update_specialized_profile): Likewise.
	* ipa-inline-transform.cc (update_noncloned_counts): Remove.
	(can_remove_node_now_p_1): Fix formating.
	(clone_inlined_nodes): Use cgraph_node::apply_scale.
	* profile-count.cc (profile_count::dump): Do not ICE
	when count is not compatible with entry block count.
	* tree-cfg.cc (gimple_verify_flow_info): Check
	compatibility of count and entry block count.

2025-06-09  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc (html_builder::m_title_element): New
	field.
	(html_builder::html_builder): Initialize it.  Don't add
	placeholder text.
	(html_builder::set_main_input_filename): New.
	(html_output_format::set_main_input_filename): New.
	(test_html_diagnostic_context::test_html_diagnostic_context): Call
	set_main_input_filename on the new sink.
	(seldtest::test_simple_log): Update expected <title> text.
	* diagnostic-format-json.cc (diagnostic_output_format_init_json):
	Return a reference to the new sink.
	(diagnostic_output_format_init_json_stderr): Likewise.
	(diagnostic_output_format_init_json_file): Likewise.
	* diagnostic-format-sarif.cc (sarif_builder::sarif_builder): Drop
	"main_input_filename_" param, and move adding an artifact for it
	with diagnostic_artifact_role::analysis_target to...
	(sarif_builder::set_main_input_filename): ...this new function.
	(sarif_output_format::set_main_input_filename): New.
	(sarif_output_format::sarif_output_format): Drop
	"main_input_filename_" param.
	(sarif_stream_output_format::sarif_stream_output_format):
	Likewise.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif): Return a reference to *FMT.
	(diagnostic_output_format_init_sarif_stderr): Return a refererence
	to the new sink.  Drop "main_input_filename_" param.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(make_sarif_sink): Drop "main_input_filename_" param.
	(selftest::test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Likewise.  Call set_main_input_filename on the new format.
	(selftest::test_sarif_diagnostic_context::buffered_output_format::buffered_output_format):
	Drop "main_input_filename_" param.
	(selftest::test_make_location_object): Likewise.
	* diagnostic-format-sarif.h
	(diagnostic_output_format_init_sarif_stderr): Return a refererence
	to the new sink.  Drop "main_input_filename_" param.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(make_sarif_sink): Drop "main_input_filename_" param.
	* diagnostic-format.h
	(diagnostic_output_format::set_main_input_filename): New vfunc.
	(diagnostic_output_format_init_json_stderr): Return a refererence
	to the new sink.
	(diagnostic_output_format_init_json_file): Likewise.
	* diagnostic.cc (diagnostic_output_format_init): Likewise.  Call
	set_main_input_filename on the new sink.
	* libgdiagnostics.cc (sarif_sink::sarif_sink): Update for above
	changes.
	* opts-diagnostic.cc (sarif_scheme_handler::make_sink): Likewise.
	(handle_OPT_fdiagnostics_add_output_): Likewise.
	(handle_OPT_fdiagnostics_set_output_): Likewise.

2025-06-09  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_noce_conversion_profitable_p): Relax
	condition for adjustments due to copies from promoted SUBREGs.

2025-06-09  Tamar Christina  <tamar.christina@arm.com>

	* doc/extend.texi (outline-atomics): Document the inverse -mno flag.

2025-06-09  Tamar Christina  <tamar.christina@arm.com>

	* params.opt (vect-scalar-cost-multiplier): New.
	* tree-vect-loop.cc (vect_estimate_min_profitable_iters): Use it.
	* doc/invoke.texi (vect-scalar-cost-multiplier): Document it.

2025-06-09  liuhongt  <hongtao.liu@intel.com>

	PR target/103750
	* config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
	maskload.
	* config/i386/sse.md (*<avx512>_load<mode>mask_and15): New
	define_insn_and_split.
	(*<avx512>_load<mode>mask_and3): Ditto.

2025-06-09  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_vec_dup): Add new
	case MOD.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op mod.

2025-06-08  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* auto-profile.cc (function_instance::merge): Fix typo.

2025-06-08  Vineet Gupta  <vineetg@rivosinc.com>

	PR target/120203
	* config/riscv/riscv.cc (CFUN_IN_CALL): New macro.
	(struct mode_switching_info): Add new field.
	(riscv_frm_adjust_mode_after_call): Remove.
	(riscv_frm_mode_needed): Track call_insn.

2025-06-08  Vineet Gupta  <vineetg@rivosinc.com>

	PR target/119164
	* config/riscv/riscv.cc (riscv_emit_frm_mode_set): check
	STATIC_FRM_P for transition to DYN.

2025-06-08  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Delete.
	(riscv_frm_mode_needed): Remove call riscv_frm_emit_after_bb_end.

2025-06-08  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.cc (riscv_dynamic_frm_mode_p): Remove.
	(riscv_mode_confluence): Ditto.
	(TARGET_MODE_CONFLUENCE): Ditto.

2025-06-08  Vineet Gupta  <vineetg@rivosinc.com>

	* emit-rtl.cc (next_nonnote_nondebug_insn): Update comments.

2025-06-08  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (cond_if_else_store_replacement): Move
	definitin of else_vdef to right before the usage. Reformat
	slightly.

2025-06-08  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/120533
	* tree-ssa-phiopt.cc (cond_if_else_store_replacement_limited): New function.
	(pass_phiopt::execute):	Call cond_if_else_store_replacement_limited
	for diamand case.

2025-06-08  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (single_trailing_store_in_bb): Add vphi argument.
	Check for single use of the vdef of the store instead of a loop
	and check vdef's single use statement is the same as vphi.
	(cond_if_else_store_replacement): Update call to single_trailing_store_in_bb.

2025-06-08  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (cond_if_else_store_replacement): Use get_virtual_phi
	instead of inlining it.

2025-06-08  Co-authored-by: Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_expand_conditional_move): Use
	riscv_extend_comparands to extend sub-word comparison arguments.

2025-06-08  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (printx, print_operand):
	Add two instruction operand format codes 'U' and 'V',
	whose represent scale factors of 0 to 15th positive/negative
	power of two.
	* config/xtensa/xtensa.md (c_enum "unspec"):
	Add UNSPEC_CEIL and UNSPEC_FLOOR.
	(int_iterator ANY_ROUND, int_attr m_round):
	New integer iterator and its attribute.
	(fix<s_fix>_truncsfsi2, *fix<s_fix>_truncsfsi2_2x,
	*fix<s_fix>_truncsfsi2_scaled, float<s_float>sisf2,
	*float<s_float>sisf2_scaled):
	Use output templates with the operand formats added above,
	instead of individual output statements.
	(l<m_round>sfsi2, *l<m_round>sfsi2_2x, *l<m_round>sfsi2_scaled):
	New insn patterns.

2025-06-07  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_expand_conditional_move): Use
	riscv_extend_comparands to extend sub-word comparison arguments.

2025-06-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/120572
	* doc/invoke.texi (Wmusttail-local-addr,
	Wno-maybe-musttail-local-addr): Fix opindex.
	* common.opt.urls: Regenerate.

2025-06-06  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-html.cc (struct html_doctypedecl): New.
	(html_builder::html_builder): Use it to populate the document's
	m_doctypedecl.
	* xml.cc (xml::document::write_as_xml): Replace hardcoded HTML DTD
	with use of m_doctypedecl field.
	(selftest::test_no_dtd): New.
	(selftest::xml_cc_tests): New.
	* xml.h (struct doctypedecl): New decl.

2025-06-06  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add xml.o.
	* diagnostic-format-html.cc (namespace xml): Move implementation
	to xml.cc
	(selftest::test_printer): Likewise.
	(selftest::test_attribute_ordering): Likewise.
	(selftest::diagnostic_format_html_cc_tests): Don't call the moved
	tests here; they will be called from xml_cc_tests in xml.cc.
	* selftest-run-tests.cc (selftest::run_tests): Call xml_cc_tests.
	* selftest.h (selftest::xml_cc_tests): New decl.
	* xml.cc: New file, based on material from
	diagnostic-format-html.cc.

2025-06-06  David Malcolm  <dmalcolm@redhat.com>

	* selftest.h: Fix the sorting of the various *_cc_tests decls.

2025-06-06  David Malcolm  <dmalcolm@redhat.com>

	* text-art/widget.cc (selftest::test_empty_wrapper_widget): New.
	(selftest::text_art_widget_cc_tests): Call it.
	* text-art/widget.h (text_art::wrapper_widget::calc_req_size):
	Gracefully handle m_child being null.
	(text_art::wrapper_widget::update_child_alloc_rects): Likewise.
	(text_art::wrapper_widget::paint_to_canvas): Likewise.

2025-06-06  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (cond_if_else_store_replacement_1): Add vphi argument.
	Manually update the vphi and new_stmt vdef/lhs.
	(cond_if_else_store_replacement): Update call to cond_if_else_store_replacement_1.

2025-06-06  Tobias Burnus  <tburnus@baylibre.com>
	    Sandra Loosemore  <sloosemore@baylibre.com>

	* gimple-fold.cc (gimple_fold_builtin_omp_get_initial_device,
	gimple_fold_builtin_omp_get_num_devices): New.
	(gimple_fold_builtin): Call them.
	* omp-builtins.def (BUILT_IN_OMP_GET_INITIAL_DEVICE): Add
	(BUILT_IN_OMP_GET_NUM_DEVICES): Make uservisible + pure.

2025-06-06  Tobias Burnus  <tburnus@baylibre.com>

	* builtins.def (DEF_GOACC_BUILTIN_COMPILER, DEF_GOMP_BUILTIN_COMPILER):
	Set NONANSI_P = false to enable those also with -fno-nonansi-builtins.

2025-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (get_group_load_store_type): Remove
	non-SLP path.
	(get_load_store_type): Likewise.

2025-06-06  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_vec_dup): Add new
	case UDIV.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op divu.

2025-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_store): Remove non-SLP
	paths.

2025-06-06  Richard Biener  <rguenther@suse.de>

	* gimple-fold.h (create_tmp_reg_or_ssa_name): Remove.
	* gimple-fold.cc (create_tmp_reg_or_ssa_name): Likewise.
	(gimple_fold_builtin_memory_op): Use make_ssa_name.
	(gimple_fold_builtin_strchr): Likewise.
	(gimple_fold_builtin_strcat): Likewise.
	(gimple_load_first_char): Likewise.
	(gimple_fold_builtin_string_compare): Likewise.
	(gimple_build): Likewise.
	* tree-inline.cc (copy_bb): Likewise.
	* config/rs6000/rs6000-builtin.cc (fold_build_vec_cmp): Likewise.
	(rs6000_gimple_fold_mma_builtin): Likewise.
	(rs6000_gimple_fold_builtin): Likewise.

2025-06-06  Eric Botcazou  <ebotcazou@adacore.com>

	* expr.cc (store_constructor) <ARRAY_TYPE>: Perform the arithmetics
	on offsets in (unsigned) sizetype.

2025-06-06  Jan Hubicka  <hubicka@ucw.cz>

	* coverage.cc (coverage_init): Return early when in LTO

2025-06-06  Jan Hubicka  <hubicka@ucw.cz>

	* profile-count.cc (profile_count::to_sreal_scale): Special case 0 of autofdo.
	(profile_count::combine_with_ipa_count): If outer function has GLOBAL0 profile
	but innter counter has non-zero profile, force it to be 0.

2025-06-06  Jiawei  <jiawei@iscas.ac.cn>
	    Jiawei Chen  <jiawei@iscas.ac.cn>
	    Yangyu Chen  <cyy@cyyself.name>
	    Tang Haojin  <tanghaojin@outlook.com>

	* config/riscv/riscv-cores.def (RISCV_TUNE): New cpu tune.
	(RISCV_CORE): New cpu.
	* doc/invoke.texi: Ditto.

2025-06-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120032
	* tree-ssa-forwprop.cc (simplify_count_zeroes): When we cannot use
	the IFN to determine the result at zero use a conditional move
	to reproduce the correct result from the table-based
	algorithm.

2025-06-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120032
	* match.pd (clz_table_index): New match.
	* tree-ssa-forwprop.cc (check_table_array): Rename from
	check_ctz_array.  Split out actual verification to a functor.
	(check_table_string): Rename from check_ctz_string and likewise.
	(check_table): Rename from check_ctz_table and adjust.
	(gimple_clz_table_index): Declare.
	(simplify_count_zeroes): Rename from simplify_count_trailing_zeroes.
	Extend to cover CLZ.
	(pass_forwprop::execute): Adjust.

2025-06-06  Richard Biener  <rguenther@suse.de>

	* tree-ssa-forwprop.cc (simplify_count_trailing_zeroes):
	Use ranger instead of tree_expr_nonzero_p.

2025-06-06  Richard Biener  <rguenther@suse.de>

	* tree-ssa-forwprop.cc (optimize_count_trailing_zeroes):
	Inline into ...
	(simplify_count_trailing_zeroes): ... this function.
	Split out ...
	(check_ctz_table): ... a wrapper for CONSTRUCTOR vs. STRING_CST
	handling.

2025-06-05  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_expand_conditional_move): Avoid
	zicond in some cases involving sign bit tests.
	* config/riscv/riscv.md: Split a splat of the sign bit feeding a
	masking off high bits into a pair of right shifts.

2025-06-05  Uros Bizjak  <ubizjak@gmail.com>

	PR target/120553
	* config/i386/i386.md (mov<mode>cc): Use "general_operand"
	predicate for operands 2 and 3 for all modes.

2025-06-05  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Update a link to c99status.html.
	* doc/standards.texi: Likewise.

2025-06-05  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-ccp.cc (insert_clobber_before_stack_restore): Update the virtual
	op on the inserted clobber and the stack restore function.
	(do_ssa_ccp): Don't add TODO_update_ssa to the todo.

2025-06-05  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-sve-builtins.cc: Include value-range.h and tree-ssanames.h
	(gimple_folder::convert_and_fold): Use make_ssa_name
	instead of create_tmp_var for the temporary. Add comment about callback argument.

2025-06-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/120231
	* range-op.cc (range_op_table::range_op_table): Register op_cast
	also for FLOAT_EXPR and FIX_TRUNC_EXPR.
	(RO_III): Adjust comment.
	(range_op_handler::op1_range): Handle RO_IFI rather than RO_IFF.
	Don't handle RO_FII.
	(range_operator::op1_range): Remove overload with
	irange &, tree, const frange &, const frange &, relation_trio
	and frange &, tree, const irange &, const irange &, relation_trio
	arguments.  Add overload with
	irange &, tree, const frange &, const irange &, relation_trio
	arguments.
	* range-op-mixed.h (operator_cast::op1_range): Remove overload with
	irange &, tree, const frange &, const frange &, relation_trio
	and frange &, tree, const irange &, const irange &, relation_trio
	arguments.  Add overload with
	irange &, tree, const frange &, const irange &, relation_trio and
	frange &, tree, const irange &, const frange &, relation_trio
	arguments.
	* range-op.h (range_operator::op1_cast): Remove overload with
	irange &, tree, const frange &, const frange &, relation_trio
	and frange &, tree, const irange &, const irange &, relation_trio
	arguments.  Add overload with
	irange &, tree, const frange &, const irange &, relation_trio
	arguments.
	* range-op-float.cc (operator_cast::fold_range): Implement
	float to int and int to float casts.
	(operator_cast::op1_range): Remove overload with
	irange &, tree, const frange &, const frange &, relation_trio
	and frange &, tree, const irange &, const irange &, relation_trio
	arguments.  Add overload with
	irange &, tree, const frange &, const irange &, relation_trio and
	frange &, tree, const irange &, const frange &, relation_trio
	arguments and implement reverse op of float to int and int to float
	cast there.

2025-06-05  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (afdo_calculate_branch_prob): Fix typo
	in previous patch.

2025-06-05  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc: Remove structured binding
	from the code.

2025-06-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120547
	* real.cc (real_from_integer): Remove maxbitlen variable, use
	len instead of that.  When shifting right, or in 1 if any of the
	shifted away bits are non-zero.  Formatting fix.

2025-06-05  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (update_count_by_afdo_count): Fix handling
	of GUESSED_LOCAL.
	(afdo_calculate_branch_prob): Preserve static profile for
	probabilities 0 and 1.

2025-06-05  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md: Leverage vdup_v and v_vdup
	binary op for different patterns.
	* config/riscv/vector-iterators.md: Add vdup_v and v_vdup
	binary op iterators.

2025-06-05  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/zicond.md: Add new splitters to select
	1, -1 or -1, 1 based on a sign bit test.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

2025-06-05  Eric Botcazou  <ebotcazou@adacore.com>

	* tree-vect-data-refs.cc (vect_can_force_dr_alignment_p): Return
	false if the variable has no symtab node.

2025-06-05  Spencer Abson  <spencer.abson@arm.com>

	* tree-eh.cc (operation_could_trap_helper_p): Cover FIX_TRUNC
	expressions explicitly.

2025-06-05  Tobias Burnus  <tburnus@baylibre.com>

	* config.gcc (--with-{arch,tune}): Use .def file to validate gcn
	processor names.
	* doc/install.texi (amdgcn*-*-*): Update list of devices supported
	by --with-arch/--with-tune.

2025-06-05  Hongyu Wang  <hongyu.wang@intel.com>

	PR middle-end/112824
	* tree-sra.cc (sra_get_max_scalarization_size): Use MOVE_MAX
	instead of UNITS_PER_WORD to define max_scalarization_size.

2025-06-05  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/sse.md
	(avx512f_movddup512<mask_name>): Change sselog1 to ssemov.
	(avx_movddup256<mask_name>): Ditto.
	(*vec_dupv2di): Change alternative 4's type attribute from sselog1
	to ssemov.

2025-06-05  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: Update declaration.

2025-06-04  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* auto-profile.cc (autofdo_source_profile::read): Dump message
	while merging profile.
	* pass_manager.h (get_pass_auto_profile): New.

2025-06-04  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/120518
	* omp-general.cc (omp_device_num_check): Look inside a
	CLEANUP_POINT_EXPR when trying to optimize special cases.

2025-06-04  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/mkoffload.cc (process): Use an 'auto_vec' for
	'file_idx'.

2025-06-04  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/14295
	PR tree-optimization/108358
	PR tree-optimization/114169
	* tree-ssa-forwprop.cc (optimize_agr_copyprop): New function.
	(pass_forwprop::execute): Call optimize_agr_copyprop for load/store statements.

2025-06-04  Pengfei Li  <Pengfei.Li2@arm.com>

	* match.pd: Add folding rule for vector average.
	* tree-ssa-ccp.cc (get_default_value): Reject vector types.
	(evaluate_stmt): Reject vector types.
	* tree-ssanames.cc (get_nonzero_bits_1): Extend to handle
	uniform vectors.

2025-06-04  Xi Ruoyao  <xry111@xry111.site>

	PR rtl-optimization/120050
	* ext-dce.cc (ext_dce_process_uses): Break early if a SUBREG in
	rhs is promoted and the truncation from the inner mode to the
	outer mode is not a noop when handling SETs.

2025-06-04  Jakub Jelinek  <jakub@redhat.com>

	* range-op-float.cc (range_operator::fold_range,
	range_operator::op1_range, range_operator::op2_range,
	range_operator::lhs_op1_relation, range_operator::lhs_op2_relation,
	operator_equal::op1_range, foperator_unordered_gt::op1_range): Fix
	up parameter indentation.
	* range-op.cc (range_operator::fold_range, range_operator::op1_range,
	range_operator::op1_op2_relation_effect,
	range_operator::update_bitmask, plus_minus_ranges,
	operator_bitwise_and::lhs_op1_relation): Likewise.

2025-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/120231
	* range-op-mixed.h (operator_cast::fold_range): Add overload
	with 3 {,const} frange & operands.  Change parameter names and
	add final override keywords for float <-> integer cast overloads.
	(operator_cast::op1_range): Likewise.
	* range-op-float.cc (operator_cast::fold_range): New overload
	with 3 {,const} frange & operands.
	(operator_cast::op1_range): Likewise.

2025-06-04  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* config/riscv/riscv-ext.def: Imply zicsr.

2025-06-04  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension defs.
	* config/riscv/riscv-ext.opt: Ditto.
	* doc/riscv-ext.texi: Ditto.

2025-06-04  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/120447
	* emit-rtl.cc (validate_subreg): Restrict ordered_p test
	between osize and regsize to cases where the inner value
	occupies multiple blocks.

2025-06-04  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Rename
	the args to scalar2vr.
	(riscv_rtx_costs): Leverage above func to avoid code dup.

2025-06-04  H.J. Lu  <hjl.tools@gmail.com>

	PR debug/120525
	* var-tracking.cc (prepare_call_arguments): Use MEM_EXPR only
	if MEM_P is true.

2025-06-04  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension defs.
	* config/riscv/riscv-ext.opt: Ditto.
	* doc/riscv-ext.texi: Ditto.

2025-06-04  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/i386.md (define_peephole2): Define some new peephole2 for
	APX NDD.

2025-06-04  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/i386.md: Add 4 new peephole2 by swap the original
	peephole2's operands' order to support new pattern.

2025-06-04  H.J. Lu  <hjl.tools@gmail.com>

	PR other/120494
	* calls.cc (expand_call): Always add REG_CALL_DECL note.
	(emit_library_call_value_1): Likewise.

2025-06-03  Richard Biener  <rguenther@suse.de>

	* gimple-fold.cc (create_tmp_reg_or_ssa_name): Always
	create a SSA name.

2025-06-03  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_vec_dup): Add new
	case for DIV op.
	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add new func
	to get the cost of vector binary.
	(riscv_rtx_costs): Add div rtx match and leverage above wrap to
	get cost.
	* config/riscv/vector-iterators.md: Add new op div to no_shift_vx_op.

2025-06-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120517
	* tree-vect-data-refs.cc (vect_analyze_data_ref_accesses):
	Fix math in dataref group split.

2025-06-03  Paul-Antoine Arras  <parras@baylibre.com>

	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost): Replace
	FR2VR with get_fr2vr_cost ().
	* config/riscv/riscv.cc (riscv_register_move_cost): Likewise.
	(riscv_builtin_vectorization_cost): Likewise.

2025-06-03  Paul-Antoine Arras  <parras@baylibre.com>

	PR target/119100
	* config/riscv/autovec-opt.md (*<optab>_vf_<mode>): Add new pattern to
	combine vec_duplicate + vfm{add,sub}.vv into vfm{add,sub}.vf.
	* config/riscv/riscv-opts.h (FPR2VR_COST_UNPROVIDED): Define.
	* config/riscv/riscv-protos.h (get_fr2vr_cost): Declare function.
	* config/riscv/riscv.cc (riscv_rtx_costs): Add cost model for MULT with
	VEC_DUPLICATE.
	(get_fr2vr_cost): New function.
	* config/riscv/riscv.opt: Add new option --param=fpr2vr-cost.

2025-06-03  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/120451
	* tree-switch-conversion.cc (switch_conversion::build_one_array): Mark
	the newly created decl as mergable.

2025-06-02  Alexandre Oliva  <oliva@adacore.com>

	PR rtl-optimization/120424
	PR middle-end/118939
	* lra-spills.cc (spill_pseudos): Update insn regno info.
	* lra-eliminations.cc (update_reg_eliminate): Recognize
	disabling of active elimination regardless of
	prev_can_eliminate.

2025-06-02  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension defs.
	* config/riscv/riscv-ext.opt: Ditto.
	* doc/riscv-ext.texi: Ditto.

2025-06-02  Stafford Horne  <shorne@gmail.com>

	* config/or1k/predicates.md (call_insn_operand): Add condition
	to not allow symbol_ref operands with TARGET_CMODEL_LARGE.
	* config/or1k/or1k.opt: Document new -mcmodel=large
	implications.
	* doc/invoke.texi: Likewise.

2025-06-02  Christophe Lyon  <christophe.lyon@linaro.org>

	* doc/sourcebuild.texi (tls_link): Add documentation.

2025-06-02  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/t-riscv: Adjust build rule for gen-riscv-ext-opt
	and gen-riscv-ext-texi.

2025-06-02  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Use
	range-based-for-loop.
	* config/riscv/riscv-subset.h (riscv_subset_list::iterator):
	New.
	(riscv_subset_list::const_iterator): New.

2025-06-01  H.J. Lu  <hjl.tools@gmail.com>

	PR other/120493
	* final.cc (call_from_call_insn): Change the argument type to
	const rtx_call_insn *.
	(get_call_rtx_from): New.
	* rtl.h (is_a_helper <const rtx_call_insn *>::test): New.
	(get_call_rtx_from): Moved to the final.cc section.
	* rtlanal.cc (get_call_rtx_from): Removed.

2025-06-01  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (optimize_vector_load): Set the vuse manually
	on the new load statements. Also remove forward declaration since
	the definition is before the first use.
	(pass_forwprop::execute): Likewise for complex loads.
	(pass_data_forwprop): Remove TODO_update_ssa.

2025-06-01  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec.md: Fix line too long for sorts
	of pattern.

2025-06-01  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc: Remove include of reload.h.

2025-06-01  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (movsf_internal):
	Remove destination side constraint modifier '^' in the third
	alternative.

2025-06-01  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc
	(xtensa_ira_change_pseudo_allocno_class):
	New prototype and function.
	(TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Define macro.
	(xtensa_register_move_cost):
	Change between integer and FP register move cost to a value
	based on actual behavior, i.e. 2, the default and the same as
	the move cost between integer registers.

2025-05-31  Andrew Pinski  <quic_apinski@quicinc.com>

	* function.h (struct function): Remove last_verified.
	* gimple-harden-conditionals.cc (pass_data_harden_compares): Remove
	TODO_verify_il.
	(pass_data_harden_conditional_branches): Likewise.
	* gimple-harden-control-flow.cc (pass_harden_control_flow_redundancy::execute):
	Don't return TODO_verify_il.
	* ipa-strub.cc (pass_data_ipa_strub): Remove TODO_verify_il.
	* passes.cc (TODO_verify_il): Define.
	(execute_function_todo): Don't use or set last_verified.
	(clear_last_verified): Remove.
	(execute_one_ipa_transform_pass): Update comment before execute_todo.
	Assert that none of the todos have TODO_verify_il set on it.
	(execute_one_pass): Don't call clear_last_verified on all functions.
	Assert that none of the todos have TODO_verify_il set on it.
	* tree-inline.cc (initialize_cfun): Don't copy last_verified.
	* tree-pass.h (TODO_verify_all): Remove.
	* tree-vrp.cc (pass_data_early_vrp): Remove TODO_verify_all.
	(pass_data_fast_vrp): Likewise.

2025-05-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120357
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Create
	the conditional reduction induction IV increment before the
	main IV exit.

2025-05-31  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/120389
	* doc/gm2.texi (-fm2-strict-type-reason): Document new flag.

2025-05-30  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc (HTML_STYLE): Add ".highlight-a" and
	".highlight-b".
	(html_builder::make_element_for_diagnostic): Handle begin_color
	and end_color.
	* diagnostic-show-locus.cc (to_html::to_html): Add "richloc"
	param and use it to initialize m_richloc.
	(to_html::colorize_text_for_range_idx): Drop.
	(to_html::get_location_range_by_idx): New.
	(to_html::get_highlight_color_for_range_idx): New.
	(to_html::m_richloc): New field.
	(print_html_span_start): Update for new param of to_html ctor.
	(line_printer::m_was_in_range_p): New field.
	(line_printer::m_last_range_idx): New field.
	(layout_printer<Sink>::print_source_line): Use set_in_range
	and set_outside_range rather than colorization calls.
	(layout_printer<Sink>::set_in_range): New.
	(layout_printer<Sink>::set_outside_range): New.
	(layout_printer<Sink>::print_annotation_line): Use set_in_range
	and set_outside_range rather than colorization calls.
	(layout_printer<to_text>::begin_label): Convert param from label
	to state_idx.  Add "is_label_text" param and use it to guard logic
	for turning off colorization within paths.
	(layout_printer<to_html>::begin_label): Likewise.  Push <span>
	for any highlight color.
	(layout_printer<to_text>::end_label): Likewise.
	(layout_printer<to_text>::end_label): Likewise, popping the
	<span>.
	(layout_printer<Sink>::print_any_labels): Convert begin/end_label
	calls to pass in state_idx rather than label.  Use begin/end_label
	rather than colorization calls.
	(layout_printer<Sink>::layout_printer): Likewise.
	(layout_printer<Sink>::layout_printer): Initialize new fields.
	(diagnostic_source_print_policy::print_as_html): Update for new
	param of to_html ctor.

2025-05-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* passes.cc (execute_all_ipa_transforms): Fix typo in
	commenet.

2025-05-30  Joseph Myers  <josmyers@redhat.com>

	* doc/standards.texi (C Language): Document library facilities
	provided in terms of headers not declaring functions with external
	linkage, not in terms of headers required of freestanding
	implementations.
	* doc/sourcebuild.texi (Subdirectories, Headers): Likewise.
	* doc/trouble.texi (Standard Libraries): Likewise.

2025-05-30  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec.md (avg<v_double_trunc>3_ceil): Add insn
	expand to leverage vaadd with rnu directly.

2025-05-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120341
	* tree-ssa-loop-im.cc (can_sm_ref_p): STRING_CSTs are readonly.
	* tree-ssa-phiopt.cc (cond_store_replacement): Likewise.

2025-05-30  Thomas Schwinge  <tschwinge@baylibre.com>
	    Richard Biener  <rguenther@suse.de>

	PR middle-end/119835
	* tree-nrv.cc (pass_nrv::execute): Defuse 'RESULT_DECL' check.

2025-05-30  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-show-locus.cc (colorizer::m_current_named_color): New
	field.
	(colorizer::set_named_color): Use it to consolidate repeated calls
	to the same color.

2025-05-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120457
	* tree-vect-slp.cc (vect_lower_load_permutations): Implement
	the same heuristics as load vectorization for single-element
	interleaving that spans multiple vectors.

2025-05-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/120347
	* rtlanal.cc (rtx_properties::try_to_add_src): Don't drop the
	IN_MEM_LOAD and IN_MEM_STORE flags for autoinc registers.
	* rtl-ssa/changes.cc (recog_level2): Check whether an
	RTX_AUTOINCed register also appears outside of an address.

2025-05-30  Julian Brown  <julian@codesourcery.com>
	    Tobias Burnus  <tburnus@baylibre.com>

	* gimplify.cc (gimplify_omp_ctx): Add IMPLICIT_MAPPERS field.
	(new_omp_context): Initialise IMPLICIT_MAPPERS hash map.
	(delete_omp_context): Delete IMPLICIT_MAPPERS hash map.
	(instantiate_mapper_info): New structs.
	(remap_mapper_decl_1, omp_mapper_copy_decl, omp_instantiate_mapper,
	omp_instantiate_implicit_mappers): New functions.
	(gimplify_scan_omp_clauses): Handle MAPPER_BINDING clauses.
	(gimplify_adjust_omp_clauses): Instantiate implicit declared mappers.
	(gimplify_omp_declare_mapper): New function.
	(gimplify_expr): Call above function.
	* langhooks-def.h (lhd_omp_mapper_lookup,
	lhd_omp_extract_mapper_directive, lhd_omp_map_array_section): Add
	prototypes.
	(LANG_HOOKS_OMP_FINISH_MAPPER_CLAUSES,
	LANG_HOOKS_OMP_MAPPER_LOOKUP, LANG_HOOKS_OMP_EXTRACT_MAPPER_DIRECTIVE,
	LANG_HOOKS_OMP_MAP_ARRAY_SECTION): Define macros.
	(LANG_HOOK_DECLS): Add above macros.
	* langhooks.cc (lhd_omp_mapper_lookup,
	lhd_omp_extract_mapper_directive, lhd_omp_map_array_section): New
	dummy functions.
	* langhooks.h (lang_hooks_for_decls): Add OMP_FINISH_MAPPER_CLAUSES,
	OMP_MAPPER_LOOKUP, OMP_EXTRACT_MAPPER_DIRECTIVE, OMP_MAP_ARRAY_SECTION
	hooks.
	* omp-general.h (omp_name_type<T>): Add templatized struct, hash type
	traits (for omp_name_type<tree> specialization).
	(omp_mapper_list<T>): Add struct.
	* tree-core.h (omp_clause_code): Add OMP_CLAUSE__MAPPER_BINDING_.
	* tree-pretty-print.cc (dump_omp_clause): Support GOMP_MAP_UNSET,
	GOMP_MAP_PUSH_MAPPER_NAME, GOMP_MAP_POP_MAPPER_NAME artificial mapping
	clauses.  Support OMP_CLAUSE__MAPPER_BINDING_ and OMP_DECLARE_MAPPER.
	* tree.cc (omp_clause_num_ops, omp_clause_code_name): Add
	OMP_CLAUSE__MAPPER_BINDING_.
	* tree.def (OMP_DECLARE_MAPPER): New tree code.
	* tree.h (OMP_DECLARE_MAPPER_ID, OMP_DECLARE_MAPPER_DECL,
	OMP_DECLARE_MAPPER_CLAUSES): New defines.
	(OMP_CLAUSE__MAPPER_BINDING__ID, OMP_CLAUSE__MAPPER_BINDING__DECL,
	OMP_CLAUSE__MAPPER_BINDING__MAPPER): New defines.

2025-05-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-ssa-sccopy.cc (scc_copy_prop::replace_scc_by_value): Return true
	if something was done.
	(scc_copy_prop::propagate): Return true if something was changed.
	(pass_sccopy::execute): Return TODO_cleanup_cfg if a prop happened.

2025-05-30  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* auto-profile.cc (function_instance::merge): New.
	(autofdo_source_profile::read): Call merge.

2025-05-29  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* config/aarch64/gcc-auto-profile: Make script executable.

2025-05-29  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Adds
	statistics when the statement changed.

2025-05-29  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Change check
	from NULL/non-ssa name to default name.

2025-05-29  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-html.cc (HTML_STYLE): Fix PatternFly URL in
	comment.

2025-05-29  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-html.cc
	(html_builder::make_element_for_diagnostic::html_token_printer):
	Reimplement in terms of xml::printer.
	(html_builder::make_element_for_diagnostic): Create an
	xml::printer and use it with the html_token_printer.

2025-05-29  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-html.cc (html_builder::make_metadata_element):
	Gracefully handle the case where "url" is null.

2025-05-29  David Malcolm  <dmalcolm@redhat.com>

	* pretty-print.cc (pretty_printer::pretty_printer): Use "nullptr"
	rather than "NULL".  Remove explicit delete of
	m_format_postprocessor.
	* pretty-print.h (format_postprocessor::clone): Use unique_ptr.
	(pretty_printer::set_format_postprocessor): New.
	(pretty_printer::m_format_postprocessor): Use unique_ptr.
	(pp_format_postprocessor): Update for use of unique_ptr, removing
	reference from return type.

2025-05-29  Martin Jambor  <mjambor@suse.cz>

	PR ipa/120295
	* ipa-prop.cc (update_jump_functions_after_inlining): Do not
	combine pass-through jump functions with type-casts changing
	signedness.

2025-05-29  Martin Jambor  <mjambor@suse.cz>

	* ipa-prop.cc (ipa_dump_jump_function): Fix whitespace when
	dumping IPA VRs.

2025-05-29  Pranav Gorantla  <Pranav.Gorantla@amd.com>

	* config/i386/i386-expand.cc (emit_reduc_half): Use shuffles to
	generate reduc half for V4SI, similar modes.
	* config/i386/i386.h (TARGET_SSE_REDUCTION_PREFER_PSHUF): New Macro.
	* config/i386/x86-tune.def (X86_TUNE_SSE_REDUCTION_PREFER_PSHUF):
	New tuning.

2025-05-29  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/120464
	* ggc-page.cc (struct ggc_globals): Fix up comment formatting.
	(find_free_list): Likewise.
	(alloc_page): For defined(USING_MALLOC_PAGE_GROUPS) use
	free_list->free_pages instead of G.free_pages.
	(do_release_pages): Add n1 and n2 arguments, make them used.
	Move defined(USING_MALLOC_PAGE_GROUPS) page group freeing to
	release_pages and dumping of statistics as well.  Formatting fixes.
	(release_pages): Adjust do_release_pages caller, move here
	defined(USING_MALLOC_PAGE_GROUPS) page group freeing and dumping
	of statistics.
	(ggc_handle_finalizers): Fix up comment formatting and typo.

2025-05-29  Jerry Zhang Jian  <jerry.zhangjian@sifive.com>

	* config/riscv/riscv-ext.def: New extensions
	* config/riscv/riscv-ext.opt: Auto re-generated
	* doc/riscv-ext.texi: Auto re-generated

2025-05-29  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
	new case for MULT op.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op mult to no_shift_vx_ops.

2025-05-28  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119298
	* config/i386/x86-tune-costs.h (struct processor_costs): Set addss cost
	back to 2.

2025-05-28  Robin Dapp  <rdapp.gcc@gmail.com>

	* tree-vect-stmts.cc (vectorizable_load): Remove non-SLP paths.

2025-05-28  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/120436
	* config/riscv/riscv-vector-builtins-shapes.cc (struct vset_def):
	Avoid division by zero.
	(struct vget_def): Ditto.
	* config/riscv/riscv-vector-builtins.h (struct function_group_info):
	Use required_extensions_specified instead of duplicating code.

2025-05-28  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec.md (avg<v_double_trunc>3_floor): Add insn
	expand to leverage vaadd directly.

2025-05-28  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.cc (cgraph_edge::maybe_hot_p): For auto-fdo turn 0
	to non-zero.
	* ipa-cp.cc (cs_interesting_for_ipcp_p): Do not trust
	auto-fdo 0.
	* profile-count.cc (profile_count::adjust_for_ipa_scaling): Likewise.
	(profile_count::from_gcov_type): Fix formating.

2025-05-28  Jan Hubicka  <hubicka@ucw.cz>

	* predict.cc (rebuild_frequencies): look harder for presence
	of profile feedback.

2025-05-28  Yuta Mukai  <mukai.yuta@fujitsu.com>

	* config/aarch64/aarch64-cores.def (fujitsu-monaka): Update ISA
	features.

2025-05-28  Jan Hubicka  <hubicka@ucw.cz>

	* predict.cc (set_even_probabilities): Set quality to guessed.

2025-05-28  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (update_count_by_afdo_count): New function.
	(afdo_set_bb_count): Add debug output; only set count if it is
	non-zero.
	(afdo_find_equiv_class): Add debug output.
	(afdo_calculate_branch_prob): Fix formating.
	(afdo_annotate_cfg): Add debug output; do not erase static
	profile if autofdo profile is all 0.

2025-05-28  Haochen Jiang  <haochen.jiang@intel.com>

	* doc/extend.texi (C Extensions): Add missing menu items.

2025-05-28  liuhongt  <hongtao.liu@intel.com>

	PR tree-optimization/119181
	* tree-vect-data-refs.cc (vect_analyze_data_ref_accesses):
	Split datarefs when there's a gap bigger than
	MAX_BITSIZE_MODE_ANY_MODE.

2025-05-27  Jason Merrill  <jason@redhat.com>

	PR c++/120400
	* fold-const.cc (simple_operand_p): False for vars with
	DECL_VALUE_EXPR.

2025-05-27  Alejandro Colomar  <alx@kernel.org>

	PR c/117025
	* Makefile.in (USER_H): Add <stdcountof.h>.
	* ginclude/stdcountof.h: New file.

2025-05-27  Alejandro Colomar  <alx@kernel.org>
	    Martin Uecker  <uecker@tugraz.at>

	PR c/117025
	* doc/extend.texi: Document _Countof operator.

2025-05-27  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/gcc-auto-profile: regenerate.

2025-05-27  Jan Hubicka  <hubicka@ucw.cz>

	* auto-profile.cc (function_instance::mark_annotated): Remove.
	(function_instance::total_annotated_count): Remove.
	(autofdo_source_profile::mark_annotated): Remove.
	(afdo_set_bb_count): Do not mark annotated locations.
	(afdo_annotate_cfg): Likewise.

2025-05-27  Eric Botcazou  <ebotcazou@adacore.com>

	* ipa-sra.cc (scan_expr_access): Also disqualify storage order
	barriers from splitting.
	* tree.h (storage_order_barrier_p): Also return false if the
	operand of the VIEW_CONVERT_EXPR has reverse storage order.

2025-05-27  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc: Define INCLUDE_STRING.
	Include "xml.h", "xml-printer.h", and "json.h".
	(html_generation_options::html_generation_options): New.
	(namespace xml): Move decls to xml.h and convert from using
	label_text to std::string.
	(xml::text::write_as_xml): Reimplement indentation so it is done
	by this node, rather than the parent.
	(xml::node_with_children::add_text): Convert from label_text to
	std::string.  Consolidate runs of text into a single node.
	(xml::document::write_as_xml): Reimplement indentation.
	(xml::element::write_as_xml): Reimplement indentation so it is
	done by this node, rather than the parent.  Convert from
	label_text to std::string.  Update attribute-printing to new
	representation to preserve insertion order.
	(xml::element::set_attr): Convert from label_text to std::string.
	Record insertion order.
	(xml::raw::write_as_xml): New.
	(xml::printer::printer): New.
	(xml::printer::push_tag): New.
	(xml::printer::push_tag_with_class): New.
	(xml::printer::pop_tag): New.
	(xml::printer::set_attr): New.
	(xml::printer::add_text): New.
	(xml::printer::add_raw): New.
	(xml::printer::push_element): New.
	(xml::printer::append): New.
	(xml::printer::get_insertion_point): New.
	(html_builder::add_focus_id): New.
	(html_builder::m_html_gen_opts): New field.
	(html_builder::m_head_element): New field.
	(html_builder::m_next_diag_id): New field.
	(html_builder::m_ui_focus_ids): New field.
	(make_div): Convert from label_text to std::string.
	(make_span): Likewise.
	(HTML_STYLE): New.
	(HTML_SCRIPT): New.
	(html_builder::html_builder): Fix indentation.  Add
	"html_gen_opts" param.  Initialize new fields.  Reimplement
	using xml::printer.  Optionally add style and script tags.
	(class html_path_label_writer): New.
	(html_builder::make_element_for_diagnostic): Convert from
	label_text to std::string. Set "id" on "gcc-diagnostic" and
	"gcc-message" <div> elements; add the latter to the focus ids.
	Use diagnostic_context::maybe_show_locus_as_html rather than
	html_builder::make_element_for_source.  Use print_path_as_html
	rather than html_builder::make_element_for_path.
	(html_builder::make_element_for_source): Drop.
	(html_builder::make_element_for_path): Drop.
	(html_builder::make_element_for_patch): Convert from label_text to
	std::string.
	(html_builder::make_metadata_element): Likewise.  Use
	xml::printer.
	(html_builder::make_element_for_metadata): Convert from label_text
	to std::string.
	(html_builder::emit_diagram): Expand comment.
	(html_builder::flush_to_file): Write out initializer for
	"focus_ids" into javascript.
	(html_output_format::html_output_format): Add param
	"html_gen_opts" and use it to initialize m_builder.
	(html_file_output_format::html_file_output_format): Likewise, to
	initialize base class.
	(make_html_sink): Likewise, to pass to ctor.
	(selftest::test_html_diagnostic_context::test_html_diagnostic_context):
	Set up html_generation_options.
	(selftest::html_buffered_output_format::html_buffered_output_format):
	Add html_gen_opts param.
	(selftest::test_simple_log): Add id attributes to expected text
	for "gcc-diagnostic" and "gcc-message" elements.  Update
	whitespace for indentation fixes.
	(selftest::test_metadata): Update whitespace for indentation
	fixes.
	(selftest::test_printer): New selftest.
	(selftest::test_attribute_ordering): New selftest.
	(selftest::diagnostic_format_html_cc_tests): Call the new
	selftests.
	* diagnostic-format-html.h (struct html_generation_options): New.
	(make_html_sink): Add "html_gen_opts" param.
	(print_path_as_html): New decl.
	* diagnostic-path-output.cc: Define INCLUDE_MAP.  Add includes of
	"diagnostic-format-html.h", "xml.h", and "xml-printer.h".
	(path_print_policy::path_print_policy): Add ctor.
	(path_print_policy::get_diagram_theme): Fix whitespace.
	(struct stack_frame): New.
	(begin_html_stack_frame): New function.
	(end_html_stack_frame): New function.
	(emit_svg_arrow): New function.
	(event_range::print): Rename to...
	(event_range::print_as_text): ...this.  Update call to
	diagnostic_start_span.
	(event_range::print_as_html): New, based on the above, but ported
	from pretty_printer to xml::printer.
	(thread_event_printer::print_swimlane_for_event_range): Rename
	to...
	(thread_event_printer::print_swimlane_for_event_range_as_text):
	...this.  Update for renaming of event_range::print to
	event_range::print_as_text.
	(thread_event_printer::print_swimlane_for_event_range_as_html):
	New.
	(print_path_summary_as_text): Update for "_as_text" renaming.
	(print_path_summary_as_html): New.
	(print_path_as_html): New.
	* diagnostic-show-locus.cc: Add defines of INCLUDE_MAP and
	INCLUDE_STRING.  Add includes of "xml.h" and "xml-printer.h".
	(struct char_display_policy): Replace "m_print_cb" with
	"m_print_text_cb" and "m_print_html_cb".
	(struct to_text): New.
	(struct to_html): New.
	(get_printer): New.
	(default_diagnostic_start_span_fn<to_text>): New.
	(default_diagnostic_start_span_fn<to_html>): New.
	(class layout): Update "friend class layout_printer;" for
	template.
	(enum class margin_kind): New.
	(class layout_printer): Convert into a template.
	(layout_printer::m_pp): Replace field with...
	(layout_printer::m_sink): ...this.
	(layout_printer::m_colorizer): Drop field in favor of a pointer
	in the "to_text" sink.
	(default_print_decoded_ch): Convert into a template.
	(escape_as_bytes_print): Likewise.
	(escape_as_unicode_print): Likewise.
	(make_char_policy): Update to use both text and html callbacks.
	(layout_printer::print_gap_in_line_numbering): Replace with...
	(layout_printer<to_text>::print_gap_in_line_numbering): ...this
	(layout_printer<to_html>::print_gap_in_line_numbering): ...and
	this.
	(layout_printer::print_source_line): Convert to template, using
	m_sink.
	(layout_printer::print_leftmost_column): Likewise.
	(layout_printer::start_annotation_line): Likewise.
	(layout_printer<to_text>::end_line): New.
	(layout_printer<to_html>::end_line): New.
	(layout_printer::print_annotation_line): Convert to template,
	using m_sink.
	(class line_label): Add field m_original_range_idx.
	(layout_printer<to_text>::begin_label): New.
	(layout_printer<to_html>::begin_label): New.
	(layout_printer<to_text>::end_label): New.
	(layout_printer<to_html>::end_label): New.
	(layout_printer::print_any_labels): Convert to template, using
	m_sink.
	(layout_printer::print_leading_fixits): Likewise.
	(layout_printer::print_trailing_fixits): Likewise.
	(layout_printer::print_newline): Drop.
	(layout_printer::move_to_column): Convert to template, using
	m_sink.
	(layout_printer::show_ruler): Likewise.
	(layout_printer::print_line): Likewise.
	(layout_printer::print_any_right_to_left_edge_lines): Likewise.
	(layout_printer::layout_printer): Likewise.
	(diagnostic_context::maybe_show_locus_as_html): New.
	(diagnostic_source_print_policy::diagnostic_source_print_policy):
	Update for split of start_span_cb into text vs html variants.
	(diagnostic_source_print_policy::print): Update for use of
	templates; use to_text.
	(diagnostic_source_print_policy::print_as_html): New.
	(layout_printer::print): Convert to template, using m_sink.
	(selftest::make_element_for_locus): New.
	(selftest::make_raw_html_for_locus): New.
	(selftest::test_layout_x_offset_display_utf8): Update for use of
	templates.
	(selftest::test_layout_x_offset_display_tab): Likewise.
	(selftest::test_one_liner_caret_and_range): Add test coverage of
	HTML output.
	(selftest::test_one_liner_labels): Likewise.
	* diagnostic.cc (diagnostic_context::initialize): Update for split
	of start_span_cb into text vs html variants.
	(default_diagnostic_start_span_fn): Move to
	diagnostic-show-locus.cc, converting to template.
	* diagnostic.h (class xml::printer): New forward decl.
	(diagnostic_start_span_fn): Replace typedef with "using",
	converting to a template.
	(struct to_text): New forward decl.
	(struct to_html): New forward decl.
	(get_printer): New decl.
	(diagnostic_location_print_policy::print_text_span_start): New
	decl.
	(diagnostic_location_print_policy::print_html_span_start): New
	decl.
	(class html_label_writer): New.
	(diagnostic_source_print_policy::print_as_html): New decl.
	(diagnostic_source_print_policy::get_start_span_fn): Replace
	with...
	(diagnostic_source_print_policy::get_text_start_span_fn): ...this
	(diagnostic_source_print_policy::get_html_start_span_fn): ...and
	this
	(diagnostic_source_print_policy::m_start_span_cb): Replace with...
	(diagnostic_source_print_policy::m_text_start_span_cb): ...this
	(diagnostic_source_print_policy::m_html_start_span_cb): ...and
	this.
	(diagnostic_context::maybe_show_locus_as_html): New decl.
	(diagnostic_context::m_text_callbacks::m_start_span): Replace
	with...
	(diagnostic_context::m_text_callbacks::m_text_start_span): ...this
	(diagnostic_context::m_text_callbacks::m_html_start_span): ...and
	this.
	(diagnostic_start_span): Update for template change.
	(diagnostic_show_locus_as_html): New inline function.
	(default_diagnostic_start_span_fn): Convert to template.
	* doc/invoke.texi (experimental-html): Add "css" and "javascript"
	keys.
	* opts-diagnostic.cc (html_scheme_handler::make_sink): Likewise.
	* selftest-diagnostic.cc
	(selftest::test_diagnostic_context::start_span_cb): Update for
	template changes.
	* selftest-diagnostic.h
	(selftest::test_diagnostic_context::start_span_cb): Likewise.
	* xml-printer.h: New file.
	* xml.h: New file, based on material in diagnostic-format-html.cc,
	but using std::string rather than label_text.
	(xml::element::m_key_insertion_order): New field.
	(struct xml::raw): New.

2025-05-27  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add diagnostic-path-output.o.
	* diagnostic-path-output.cc: New file, taken from material in
	diagnostic-path.cc.
	* diagnostic-path.cc: Drop includes of
	"diagnostic-macro-unwinding.h", "intl.h", "gcc-rich-location.h",
	"diagnostic-color.h", "diagnostic-event-id.h",
	"diagnostic-label-effects.h", "pretty-print-markup.h",
	"selftest.h", "selftest-diagnostic.h",
	"selftest-diagnostic-path.h", "text-art/theme.h", and
	"diagnostic-format-text.h".
	(class path_print_policy): Move to diagnostic-path-output.cc.
	(class path_label): Likewise.
	(can_consolidate_events): Likewise.
	(class per_thread_summary): Likewise.
	(struct event_range): Likewise.
	(struct path_summary): Likewise.
	(per_thread_summary::interprocedural_p): Likewise.
	(path_summary::path_summary): Likewise.
	(write_indent): Likewise.
	(base_indent): Likewise.
	(per_frame_indent): Likewise.
	(class thread_event_printer): Likewise.
	(print_path_summary_as_text): Likewise.
	(class element_event_desc): Likewise.
	(diagnostic_text_output_format::print_path): Likewise.
	(selftest::path_events_have_column_data_p): Likewise.
	(selftest::test_empty_path): Likewise.
	(selftest::test_intraprocedural_path): Likewise.
	(selftest::test_interprocedural_path_1): Likewise.
	(selftest::test_interprocedural_path_2): Likewise.
	(selftest::test_recursion): Likewise.
	(class selftest::control_flow_test): Likewise.
	(selftest::test_control_flow_1): Likewise.
	(selftest::test_control_flow_2): Likewise.
	(selftest::test_control_flow_3): Likewise.
	(selftest::assert_cfg_edge_path_streq): Likewise.
	(ASSERT_CFG_EDGE_PATH_STREQ): Likewise.
	(selftest::test_control_flow_4): Likewise.
	(selftest::test_control_flow_5): Likewise.
	(selftest::test_control_flow_6): Likewise.
	(selftest::control_flow_tests): Likewise.
	(selftest::diagnostic_path_cc_tests): Likewise, renaming
	accordingly.
	* selftest-run-tests.cc (selftest::run_tests): Update for
	move of path-printing selftests.
	* selftest.h (selftest::diagnostic_path_cc_tests): Replace decl
	with...
	(selftest::diagnostic_path_output_cc_tests): ...this.

2025-05-27  Juergen Christ  <jchrist@linux.ibm.com>

	* config/s390/vector.md(*vec_extract<mode>): Fix mnemonic.

2025-05-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/117965
	* tree-ssa-phiprop.cc (phivn_valid_p): Remove.
	(propagate_with_phi): Pass in virtual PHI node from BB,
	rewrite load motion validity check to require the same
	virtual use along all paths.

2025-05-27  Konstantinos Eleftheriou  <konstantinos.eleftheriou@vrull.eu>

	PR rtl-optimization/119884
	* avoid-store-forwarding.cc (process_store_forwarding):
	Use `lowpart_subreg` for the base register initialization
	and remove redundant stores from the store/load sequence.

2025-05-27  Konstantinos Eleftheriou  <konstantinos.eleftheriou@vrull.eu>

	* sbitmap.cc (bitmap_any_bit_in_range_p):
	Call and return the result of `bitmap_bit_in_range_p` with the
	`any_inverted` parameter set to false.
	(bitmap_bit_in_range_p): New function.
	(bitmap_all_bits_in_range_p): New function.
	* sbitmap.h (bitmap_all_bits_in_range_p): New function.

2025-05-27  Konstantinos Eleftheriou  <konstantinos.eleftheriou@vrull.eu>

	* sbitmap.cc (bitmap_bit_in_range_p): Renamed the function.
	(bitmap_any_bit_in_range_p): New function name.
	(bitmap_bit_in_range_p_checking): Renamed the function.
	(bitmap_any_bit_in_range_p_checking): New function name.
	(test_set_range): Updated function calls to use the new name.
	(test_bit_in_range): Likewise.
	* sbitmap.h (bitmap_bit_in_range_p): Renamed the function.
	(bitmap_any_bit_in_range_p): New function name.
	* tree-ssa-dse.cc (live_bytes_read):
	Updated function call to use the new name.

2025-05-27  Co-authored-by: Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (andi+bclr splits): Simplified from
	prior define_insn_and_splits.
	* config/riscv/riscv.cc (synthesize_and): Add support for andi+bclr
	sequences.

2025-05-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
	new case for XOR op.
	(expand_vx_binary_vec_vec_dup): Diito.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op or to no_shift_vx_ops.

2025-05-27  Juergen Christ  <jchrist@linux.ibm.com>

	* config/s390/vector.md (VF): New mode iterator.
	(VEC_SET_NONFLOAT): New mode iterator.
	(VEC_SET_SINGLEFLOAT): New mode iterator.
	(*vec_set<mode>): Split pattern in two.
	(*vec_setv2df): Extract special handling for V2DF mode.
	(*vec_extract<mode>): Split pattern in two.

2025-05-27  Jonathan Wakely  <jwakely@redhat.com>

	* doc/extend.texi (Common Variable Attributes): Fix typo in
	description of nonstring.

2025-05-27  Kito Cheng  <kito.cheng@sifive.com>

	* gcc.cc (find_multilib_os_dir_by_multilib_dir): New.
	(set_multilib_dir): Fix multilib_os_dir and multiarch_dir
	if multilib_os_dir is not set.

2025-05-27  xuli  <xuli1@eswincomputing.com>

	* match.pd: add singned vector SAT_ADD IMM form1 matching.

2025-05-27  xuli  <xuli1@eswincomputing.com>

	* match.pd: Add signed scalar SAT_ADD IMM form1 with IMM=-1 matching.
	* tree-ssa-math-opts.cc (match_unsigned_saturation_add): Adapt function name.
	(match_saturation_add_with_assign): Match signed and unsigned SAT_ADD with assign.
	(math_opts_dom_walker::after_dom_children): Match imm=-1 signed SAT_ADD with NOP_EXPR case.

2025-05-26  Jason Merrill  <jason@redhat.com>

	* doc/invoke.texi: Move C++ -fdump-lang to C++ section.
	Add -fdump-lang-tinst.

2025-05-26  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* config/aarch64/gcc-auto-profile: New file.

2025-05-26  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.cc: Remove include of reload.h .

2025-05-26  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* ipa-split.cc (pass_feedback_split_functions::clone): New.
	* passes.def: Enable pass_feedback_split_functions for
	pass_ipa_auto_profile.

2025-05-25  Michael J. Eager  <eager@eagercon.com>

	PR target/86772
	Tracking CVE-2017-5753
	* config/microblaze/microblaze.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE):
	Define to speculation_save_value_not_needed

2025-05-25  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_builtin_vectorization_cost):
	use sse_op instead of addss to cost vinsertti128 and vinsertti64x4;
	compute correct mode of vinsertti128.
	(ix86_vector_costs::add_stmt_cost): For integer 256bit and 512bit
	vector constructions account more integer_to_sse moves.

2025-05-25  LIU Hao  <lh_mouse@126.com>

	PR target/53929
	PR target/80881
	* config/i386/i386-protos.h (ix86_asm_output_labelref): Declare new
	function for quoting user-defined symbols in Intel syntax.
	* config/i386/i386.cc (ix86_asm_output_labelref): Implement it.
	* config/i386/i386.h (ASM_OUTPUT_LABELREF): Use it.
	* config/i386/cygming.h (ASM_OUTPUT_LABELREF): Use it.

2025-05-24  Shreya Munnangi  <smunnangi1@ventanamicro.com>

	* config/riscv/riscv.cc (synthesize_and): Use a srl+andi+sll
	sequence when the mask fits in a simm12 after shifting by the
	number of trailing zeros.
	Co-authored-by: Jeff Law <jlaw@ventanamicro.com>

2025-05-24  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
	case for IOR op.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op or to no_shift_vx_ops.

2025-05-23  Andi Kleen  <ak@gcc.gnu.org>

	* doc/install.texi: Document bootstrap-native.

2025-05-23  Andi Kleen  <ak@gcc.gnu.org>

	PR middle-end/114563
	PR c++/119387
	* ggc-page.cc (struct free_list): New structure.
	(struct page_entry): Point to free_list.
	(find_free_list): New function.
	(find_free_list_order): Dito.
	(alloc_page): Use specific free_list.
	(release_pages): Dito.
	(do_release_pages): Dito.
	(init_ggc): Dito.
	(ggc_print_statistics): Print overflow stat.
	(ggc_pch_read): Use specific free list.

2025-05-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* doc/implement-c.texi (C Implementation): Add missing menu items.

2025-05-23  Robin Dapp  <rdapp@ventanamicro.com>

	* common/config/riscv/riscv-common.cc (riscv_subset_list::parse_base_ext):
	Adjust error message.
	(riscv_handle_option): Parse as CPU string first.
	(riscv_expand_arch): Ditto.
	* doc/invoke.texi: Document.

2025-05-23  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-v.cc (autovectorize_vector_modes): Return
	user-specified mode if available.
	* config/riscv/riscv.opt: New param.

2025-05-23  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv.cc (singleton_vxrm_need): Init
	saved_vxrm_mode.

2025-05-23  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-vector-costs.cc (compute_estimated_lmul):
	Always use vect_vf_for_cost and TARGET_MIN_VLEN.

2025-05-23  Dhruv Chawla  <dhruvc@nvidia.com>
	    Richard Sandiford  <richard.sandiford@arm.com>

	* expmed.cc (expand_rotate_as_vec_perm): Avoid a no-op move if the
	target already provided the result in the expected register.
	* config/aarch64/aarch64.cc (aarch64_vectorize_vec_perm_const):
	Avoid forcing subregs into fresh registers unnecessarily.
	* config/aarch64/aarch64-sve.md: Add define_split for rotate.
	(*v_revvnx8hi): New pattern.

2025-05-23  Dhruv Chawla  <dhruvc@nvidia.com>
	    Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (@aarch64_adr<mode>_shift):
	Match lowered form of ashift.
	(*aarch64_adr<mode>_shift): Likewise.
	(*aarch64_adr_shift_sxtw): Likewise.
	(*aarch64_adr_shift_uxtw): Likewise.
	(<ASHIFT:optab><mode>3): Check amount instead of operands[2] in
	aarch64_sve_<lr>shift_operand.
	(v<optab><mode>3): Generate unpredicated shifts for constant
	operands.
	(@aarch64_pred_<optab><mode>): Convert to a define_expand.
	(*aarch64_pred_<optab><mode>): Create define_insn_and_split pattern
	from @aarch64_pred_<optab><mode>.
	(*post_ra_v_ashl<mode>3): Rename to ...
	(aarch64_vashl<mode>3_const): ... this and remove reload requirement.
	(*post_ra_v_<optab><mode>3): Rename to ...
	(aarch64_v<optab><mode>3_const): ... this and remove reload
	requirement.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_sve_add_<sve_int_op><mode>): Match lowered form of
	SHIFTRT.
	(*aarch64_sve2_sra<mode>): Likewise.
	(*bitmask_shift_plus<mode>): Match lowered form of lshiftrt.

2025-05-22  Joseph Myers  <josmyers@redhat.com>

	* doc/implement-c.texi: Document C23 implementation-defined
	behavior.
	(Constant expressions implementation, Types implementation): New
	nodes.

2025-05-22  Eric Botcazou  <ebotcazou@adacore.com>

	* dwarf2out.cc (loc_list_from_tree_1) <COMPONENT_REF>: Add specific
	handling of bit-fields for big-endian targets.

2025-05-22  Alexandre Oliva  <oliva@adacore.com>

	* config/aarch64/aarch64-vxworks.h (TARGET_OS_USES_R18): Define.
	Update comments.
	* config/aarch64/aarch64.cc (aarch64_conditional_register_usage):
	Mark x18 as fixed on VxWorks.
	(aarch64_override_options_internal): Issue sorry message on
	-fsanitize=shadow-call-stack if TARGET_OS_USES_R18.

2025-05-22  Shreya Munnangi  <smunnangi1@ventanamicro.com>

	* config/riscv/riscv.cc (synthesize_and): When profitable, use a three
	shift sequence to clear bits at both upper and lower bits rather than
	synthesizing the constant mask.

2025-05-22  Siarhei Volkau  <lis8215@gmail.com>

	PR target/70557
	* config/riscv/riscv.md (movdi_32bit): Add "J" constraint to allow storing 0
	directly to memory.

2025-05-22  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/120372
	* config/aarch64/aarch64.cc (aarch64_rtx_costs <case CONST_INSN>): Handle
	if outer is COMPARE and the constant can be handled by the cmp instruction.

2025-05-22  Andrew Pinski  <quic_apinski@quicinc.com>

	* expmed.cc (canonicalize_comparison): Use rtx_cost directly
	instead of gen_move_insn. Print out the choice if dump is enabled.

2025-05-22  Jakub Jelinek  <jakub@redhat.com>

	* gimple-lower-bitint.cc (bitint_extended): New variable.
	(bitint_large_huge::lower_shift_stmt): For LSHIFT_EXPR with
	bitint_extended if lhs has most significant partial limb extend
	it afterwards.

2025-05-22  Xi Ruoyao  <xry111@xry111.site>

	* doc/md.texi: Document the 'q' constraint for LoongArch.

2025-05-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/120360
	* config/i386/predicates.md (x86_64_neg_const_int_operand): New
	predicate.
	* config/i386/i386.md (*cmp<mode>_plus_1): New pattern.

2025-05-22  Shreya Munnangi  <smunnangi1@ventanamicro.com>

	* config/riscv/riscv.cc (synthesize_and): When profitable, use two
	shift combinations to clear high or low bits rather than synthsizing
	the constant.

2025-05-22  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	* config/aarch64/aarch64.cc (aarch64_evpc_reencode): Copy zero_op0_p and
	zero_op1_p from d to newd.

2025-05-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/120090
	* combine.cc (gen_lowpart_for_combine_no_emit): New function.
	(RTL_HOOKS_GEN_LOWPART_NO_EMIT): Set to gen_lowpart_for_combine_no_emit.

2025-05-21  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md ((x << C1) + C2): Tighten split condition
	and generate more efficient code when splitting.

2025-05-21  Jeff Law  <jlaw@ventanamicro.com>

	PR target/120368
	* config/riscv/riscv.md (shift with masked shift count): Fix
	opcode when generating an SImode shift on rv64.

2025-05-21  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
	case for rtx code AND.
	(expand_vx_binary_vec_vec_dup): Ditto.
	* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
	* config/riscv/vector-iterators.md: Add new op and to no_shift_vx_ops.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* gensupport.h (needs_barrier_p): Delete.
	* gensupport.cc (needs_barrier_p): Likewise.
	* rtl.h (always_void_p): Return true for PC, RETURN and SIMPLE_RETURN.
	(expand_opcode): New enum class.
	(expand_rtx, complete_seq): Declare.
	* emit-rtl.cc (rtx_expander): New class.
	(expand_rtx, complete_seq): New functions.
	* gengenrtl.cc (special_rtx, excluded_rtx): Add a cross-reference
	comment.
	* genemit.cc (FIRST_CODE): New constant.
	(print_code): Delete.
	(generator::file, generator::used, generator::sequence_type): Delete.
	(generator::bytes): New member variable.
	(generator::generator): Update accordingly.
	(generator::gen_rtx_scratch): Delete.
	(generator::add_uint, generator::add_opcode, generator::add_code)
	(generator::add_match_operator, generator::add_exp)
	(generator::add_vec, generator::gen_table): New member functions.
	(generator::gen_exp): Rewrite to use a bytecode expansion.
	(generator::gen_emit_seq): Likewise.
	(start_gen_insn): Return the C++ expression for the operands array.
	(gen_insn, gen_expand, gen_split): Update callers accordingly.
	(emit_c_code): Remove use of _val.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (clobber_pat::code): Delete.
	(maybe_queue_insn): Don't set clobber_pat::code.
	(output_add_clobbers): Remove info argument and output the two
	REG and SCRATCH cases directly.
	(main): Update call accordingly.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (generator::gen_exp): Report an error for 's' operands.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (generator::gen_exp): Raise an error if we see
	an 'L' operand.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (generator::used): Update comment.
	(generator::gen_exp): Remove handling of null unused arrays.
	(gen_insn, gen_expand): Always pass a used array.
	(output_add_clobbers): Note why the used array is null here.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (generator): New structure.
	(gen_rtx_scratch, gen_exp, gen_emit_seq): Turn into member
	functions of generator.
	(gen_insn, gen_expand, gen_split, output_add_clobbers): Update
	users accordingly.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (gen_rtx_scratch, gen_exp): Use operands[%d] rather than
	operand%d.
	(start_gen_insn): Mark the incoming arguments as const and store
	them to an operands array.
	(gen_expand, gen_split): Remove copies into and out of the operands
	array.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (start_gen_insn): New function, split out from...
	(gen_insn, gen_expand): ...here.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (queue): New static variable.
	(maybe_queue_insn): New function, split out from...
	(gen_insn): ...here.
	(queue_expand): New function, split out from...
	(gen_expand): ...here.
	(gen_split): New function, split out from...
	(queue_split): ...here.
	(main): Queue definitions for later processing rather than
	emitting them on the fly.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* genemit.cc (gen_exp): Make the info argument a constant reference.
	(gen_emit_seq, gen_insn, gen_expand, gen_split): Likewise.
	(output_add_clobbers): Likewise.
	(main): Update calls accordingly.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/sparc/sparc.md (zero_extendhisi2, zero_extendhidi2)
	(extendhisi2, extendqihi2, extendqisi2, extendqidi2)
	(extendhidi2): Use operands[0] and operands[1] instead of
	operand0 and operand1.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/stormy16/stormy16.md (negsi2): Remove unused assignment.

2025-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/100837
	* config/nds32/nds32-intrinsic.md (unspec_get_pending_int): Use
	a local variable instead of operands[2].

2025-05-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/120369
	* tree-complex.cc (gimple_expand_builtin_cabs): Return early
	if the LHS of cabs is null.

2025-05-21  Co-Authored-By: Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-protos.h (synthesize_and): Prototype.
	* config/riscv/riscv.cc (synthesize_and): New function.
	* config/riscv/riscv.md (and<mode>3): Use it.

2025-05-21  liuhongt  <hongtao.liu@intel.com>

	PR middle-end/118994
	* match.pd ((a >> 1) + (b >> 1) + ((a | b) & 1) to
	.AVG_CEIL (a, b)): New pattern.
	((a | b) - ((a ^ b) >> 1) to .AVG_CEIL (a, b)): Ditto.

2025-05-20  Andrew Pinski  <quic_apinski@quicinc.com>

	* Makefile.in (gimple-match-exports.o-warn): Remove.
	* gimple-match-exports.cc (gimple_extract): Remove valueize_condition
	argument.
	(gimple_extract_op): Update call to gimple_extract.
	(gimple_simplify): Likewise. Also remove valueize_condition lambda.

2025-05-20  Umesh Kalappa  <ukalappa.mips@gmail.com>

	* config/riscv/mips-p8700.md (mips_p8700_dummies): New
	reservation.
	(mips_p8700_unknown): Reservation for all the dummies.

2025-05-20  Umesh Kalappa  <ukalappa.mips@gmail.com>

	* config/riscv/mips-p8700.md: New scheduler model.
	* config/riscv/riscv-cores.def (mips-p87000): New tuning model
	and core architecture.
	* config/riscv/riscv-opts.h (riscv_microarchitecture_type); Add
	mips-p8700.
	* config/riscv/riscv.cc (mips_p8700_tune_info): New uarch
	tuning parameters.
	* config/riscv/riscv.md (tune): Add mips_p8700.
	Include mips-p8700.md
	* doc/invoke.texi: Document tune/cpu options for the MIPS P8700.
	Co-authored-by: Jeff Law <jlaw@ventanamicro.com>

2025-05-20  Jakub Jelinek  <jakub@redhat.com>

	* tree-chrec.cc (convert_affine_scev): Use signed_type_for instead of
	build_nonstandard_integer_type.

2025-05-20  Jakub Jelinek  <jakub@redhat.com>

	* gimple-lower-bitint.cc (bitint_big_endian): New variable.
	(bitint_precision_kind): Set it.
	(struct bitint_large_huge): Add unsigned argument to
	finish_arith_overflow.
	(bitint_large_huge::limb_access_type): Handle bitint_big_endian.
	(bitint_large_huge::handle_operand): Likewise.
	(bitint_large_huge::handle_cast): Likewise.
	(bitint_large_huge::handle_bit_field_ref): Likewise.
	(bitint_large_huge::handle_load): Likewise.
	(bitint_large_huge::lower_shift_stmt): Likewise.
	(bitint_large_huge::finish_arith_overflow): Likewise.
	Add nelts argument.
	(bitint_large_huge::lower_addsub_overflow): Handle bitint_big_endian.
	Adjust finish_arith_overflow caller.
	(bitint_large_huge::lower_mul_overflow): Likewise.
	(bitint_large_huge::lower_bit_query): Handle bitint_big_endian.
	(bitint_large_huge::lower_stmt): Likewise.
	(build_bitint_stmt_ssa_conflicts): Likewise.
	(gimple_lower_bitint): Likewise.

2025-05-20  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (various splits): Avoid writing the output
	more than once when trivially possible.

2025-05-20  liuhongt  <hongtao.liu@intel.com>

	PR tree-optimization/103771
	* match.pd (cond_expr_convert_p): Extend the match to handle
	REAL_CST.
	* tree-vect-patterns.cc
	(vect_recog_cond_expr_convert_pattern): Handle REAL_CST.

2025-05-20  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md: Leverage the new add func to
	expand the vx insn.
	* config/riscv/riscv-protos.h (expand_vx_binary_vec_dup_vec): Add
	new func decl to expand format v = vop(vec_dup(x), v).
	(expand_vx_binary_vec_vec_dup): Diito but for format
	v = vop(v, vec_dup(x)).
	* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
	func impl to expand vx for v = vop(vec_dup(x), v).
	(expand_vx_binary_vec_vec_dup): Diito but for another format
	v = vop(v, vec_dup(x)).

2025-05-19  Jeff Law  <jlaw@ventanamicro.com>

	PR target/120333
	* config/riscv/bitmanip.md: Remove bext formed from left+right
	shift patterns.

2025-05-19  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa-hpux.h (TARGET_HAVE_LIBATOMIC): Define.
	(HAVE_sync_compare_and_swapqi): Likewise.
	(HAVE_sync_compare_and_swaphi): Likewise.
	(HAVE_sync_compare_and_swapsi): Likewise.
	(HAVE_sync_compare_and_swapdi): Likewise.

2025-05-19  Thomas Schwinge  <tschwinge@baylibre.com>

	PR lto/120308
	* lto-streamer-out.cc (hash_tree): Don't handle 'TYPE_EMPTY_P' for
	'lto_stream_offload_p'.
	* tree-streamer-in.cc (unpack_ts_type_common_value_fields):
	Likewise.
	* tree-streamer-out.cc (pack_ts_type_common_value_fields):
	Likewise.

2025-05-19  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (synthesize_ior_xor): Initialize OUTPUT and
	verify it's non-null before emitting the final copy insn.

2025-05-19  Richard Earnshaw  <rearnsha@arm.com>

	PR target/120351
	* config/arm/predicates.md (mem_noofs_operand): Also check the op
	is a valid memory_operand.

2025-05-19  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc (get_riscv_ext_info): Fix argument type.
	(riscv_subset_list::check_implied_ext): Type conversion.

2025-05-19  zhusonghe  <zhusonghe@eswincomputing.com>

	* config/riscv/gen-riscv-ext-texi.cc (struct version_t):rename
	major/minor to major_version/minor_version.

2025-05-19  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.cc (riscv_legitimize_move): Handle
	load/store with odd-even reg pair.
	(riscv_split_64bit_move_p): Don't split load/store if zilsd enabled.
	(riscv_hard_regno_mode_ok): Only allow even reg can be used for
	64 bits mode for zilsd.

2025-05-19  Jennifer Schmitz  <jschmitz@nvidia.com>

	PR middle-end/120276
	* regcprop.cc (copy_value): Return in case of unordered modes.

2025-05-19  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/constraints.md (cR): New constraint.
	* doc/md.texi (Machine Constraints::RISC-V): Document the new cR
	constraint.

2025-05-19  Haochen Jiang  <haochen.jiang@intel.com>

	* config.gcc: Remove 512 intrin file.
	* config/i386/avx10_2-512bf16intrin.h:
	Removed and combined to ...
	* config/i386/avx10_2bf16intrin.h: ... this.
	* config/i386/avx10_2-512convertintrin.h:
	Removed and combined to ...
	* config/i386/avx10_2convertintrin.h: ... this.
	* config/i386/avx10_2-512mediaintrin.h:
	Removed and combined to ...
	* config/i386/avx10_2mediaintrin.h: ... this.
	* config/i386/avx10_2-512minmaxintrin.h:
	Removed and combined to ...
	* config/i386/avx10_2minmaxintrin.h: ... this.
	* config/i386/avx10_2-512satcvtintrin.h:
	Removed and combined to ...
	* config/i386/avx10_2satcvtintrin.h: ... this.
	* config/i386/immintrin.h: Remove 512 intrin file.

2025-05-19  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/sse.md (VF1_VF2_AVX10_2): Removed.
	(VF2_AVX10_2): Ditto.
	(VI1248_AVX10_2): Ditto.
	(VFH_AVX10_2): Ditto.
	(VF1_AVX10_2): Ditto.
	(VHF_AVX10_2): Ditto.
	(VBF_AVX10_2): Ditto.
	(VI8_AVX10_2): Ditto.
	(VI2_AVX10_2): Ditto.
	(VBF): New.
	(div<mode>3): Use VBF instead of AVX10.2 ones.
	(vec_cmp<mode><avx512fmaskmodelower>): Ditto.
	(avx10_2_cvt2ps2phx_<mode><mask_name><round_name>):
	Use VHF_AVX512VL instead of AVX10.2 ones.
	(vcvt<convertfp8_pack><mode><mask_name>): Ditto.
	(vcvthf82ph<mode><mask_name>): Ditto.
	(VHF_AVX10_2_2): Remove not needed TARGET_AVX10_2.
	(usdot_prod<sseunpackmodelower><mode>): Use VI2_AVX512F
	instead of AVX10.2 ones.
	(vdpphps_<mode>): Use VF1_AVX512VL instead of AVX10.2 ones.
	(vdpphps_<mode>_mask): Ditto.
	(vdpphps_<mode>_maskz): Ditto.
	(vdpphps_<mode>_maskz_1): Ditto.
	(avx10_2_scalefbf16_<mode><mask_name>): Use VBF instead of
	AVX10.2 ones.
	(<code><mode>3): Ditto.
	(avx10_2_<code>bf16_<mode><mask_name>): Ditto.
	(avx10_2_fmaddbf16_<mode>_maskz); Ditto.
	(avx10_2_fmaddbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fmaddbf16_<mode>_mask): Ditto.
	(avx10_2_fmaddbf16_<mode>_mask3): Ditto.
	(avx10_2_fnmaddbf16_<mode>_maskz): Ditto.
	(avx10_2_fnmaddbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fnmaddbf16_<mode>_mask): Ditto.
	(avx10_2_fnmaddbf16_<mode>_mask3): Ditto.
	(avx10_2_fmsubbf16_<mode>_maskz); Ditto.
	(avx10_2_fmsubbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fmsubbf16_<mode>_mask): Ditto.
	(avx10_2_fmsubbf16_<mode>_mask3): Ditto.
	(avx10_2_fnmsubbf16_<mode>_maskz): Ditto.
	(avx10_2_fnmsubbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fnmsubbf16_<mode>_mask): Ditto.
	(avx10_2_fnmsubbf16_<mode>_mask3): Ditto.
	(avx10_2_rsqrtbf16_<mode><mask_name>): Ditto.
	(avx10_2_sqrtbf16_<mode><mask_name>): Ditto.
	(avx10_2_rcpbf16_<mode><mask_name>): Ditto.
	(avx10_2_getexpbf16_<mode><mask_name>): Ditto.
	(avx10_2_<bf16immop>bf16_<mode><mask_name>): Ditto.
	(avx10_2_fpclassbf16_<mode><mask_scalar_merge_name>): Ditto.
	(avx10_2_cmpbf16_<mode><mask_scalar_merge_name>): Ditto.
	(avx10_2_cvt<sat_cvt_trunc_prefix>bf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
	Ditto.
	(avx10_2_cvtph2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_name>):
	Use VHF_AVX512VL instead of AVX10.2 ones.
	(avx10_2_cvttph2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx10_2_cvtps2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_name>):
	Use VF1_AVX512VL instead of AVX10.2 ones.
	(avx10_2_cvttps2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx10_2_vcvtt<castmode>2<sat_cvt_sign_prefix>dqs<mode><mask_name><round_saeonly_name>):
	Use VF instead of AVX10.2 ones.
	(avx10_2_vcvttpd2<sat_cvt_sign_prefix>qqs<mode><mask_name><round_saeonly_name>):
	Use VF2 instead of AVX10.2 ones.
	(avx10_2_vcvttps2<sat_cvt_sign_prefix>qqs<mode><mask_name><round_saeonly_name>):
	Use VI8 instead of AVX10.2 ones.
	(avx10_2_minmaxbf16_<mode><mask_name>): Use VBF instead of
	AVX10.2 ones.
	(avx10_2_minmaxp<mode><mask_name><round_saeonly_name>):
	Use VFH_AVX512VL instead of AVX10.2 ones.
	(avx10_2_vmovrs<ssemodesuffix><mode><mask_name>):
	Use VI1248_AVX512VLBW instead of AVX10.2 ones.

2025-05-19  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h
	(get_available_features): Remove feature set for AVX10_1_256.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_EVEX512_SET): Removed.
	(OPTION_MASK_ISA2_AVX10_1_256_SET): Removed.
	(OPTION_MASK_ISA_AVX10_1_SET): Imply all AVX512 features.
	(OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
	(OPTION_MASK_ISA2_AVX2_UNSET): Remove AVX10_1_UNSET.
	(OPTION_MASK_ISA2_EVEX512_UNSET): Removed.
	(OPTION_MASK_ISA2_AVX10_1_UNSET): Remove AVX10_1_256.
	(OPTION_MASK_ISA2_AVX512F_UNSET): Unset AVX10_1.
	(ix86_handle_option): Remove special handling for AVX512/AVX10.1
	options, evex512 and avx10_1_256. Modify ISA set for AVX10 options.
	* common/config/i386/i386-cpuinfo.h
	(enum feature_priority): Remove P_AVX10_1_256.
	(enum processor_features): Remove FEATURE_AVX10_1_256.
	* common/config/i386/i386-isas.h: Remove avx10.1-256/512.
	* config/i386/avx512bf16intrin.h: Rollback target push before
	evex512 is introduced.
	* config/i386/avx512bf16vlintrin.h: Ditto.
	* config/i386/avx512bitalgintrin.h: Ditto.
	* config/i386/avx512bitalgvlintrin.h: Ditto.
	* config/i386/avx512bwintrin.h: Ditto.
	* config/i386/avx512cdintrin.h: Ditto.
	* config/i386/avx512dqintrin.h: Ditto.
	* config/i386/avx512fintrin.h: Ditto.
	* config/i386/avx512fp16intrin.h: Ditto.
	* config/i386/avx512fp16vlintrin.h: Ditto.
	* config/i386/avx512ifmaintrin.h: Ditto.
	* config/i386/avx512ifmavlintrin.h: Ditto.
	* config/i386/avx512vbmi2intrin.h: Ditto.
	* config/i386/avx512vbmi2vlintrin.h: Ditto.
	* config/i386/avx512vbmiintrin.h: Ditto.
	* config/i386/avx512vbmivlintrin.h: Ditto.
	* config/i386/avx512vlbwintrin.h: Ditto.
	* config/i386/avx512vldqintrin.h: Ditto.
	* config/i386/avx512vlintrin.h: Ditto.
	* config/i386/avx512vnniintrin.h: Ditto.
	* config/i386/avx512vnnivlintrin.h: Ditto.
	* config/i386/avx512vp2intersectintrin.h: Ditto.
	* config/i386/avx512vp2intersectvlintrin.h: Ditto.
	* config/i386/avx512vpopcntdqintrin.h: Ditto.
	* config/i386/avx512vpopcntdqvlintrin.h: Ditto.
	* config/i386/gfniintrin.h: Ditto.
	* config/i386/vaesintrin.h: Ditto.
	* config/i386/vpclmulqdqintrin.h: Ditto.
	* config/i386/driver-i386.cc (check_avx512_features): Removed.
	(host_detect_local_cpu): Remove -march=native special handling.
	* config/i386/i386-builtins.cc
	(ix86_vectorize_builtin_gather): Remove TARGET_EVEX512.
	* config/i386/i386-c.cc
	(ix86_target_macros_internal): Remove EVEX512 and AVX10_1_256.
	* config/i386/i386-expand.cc
	(ix86_valid_mask_cmp_mode): Remove TARGET_EVEX512.
	(ix86_expand_int_sse_cmp): Ditto.
	(ix86_vector_duplicate_simode_const): Ditto.
	(ix86_expand_vector_init_duplicate): Ditto.
	(ix86_expand_vector_init_one_nonzero): Ditto.
	(ix86_emit_swsqrtsf): Ditto.
	(ix86_vectorize_vec_perm_const): Ditto.
	(ix86_expand_vecop_qihi2): Ditto.
	(ix86_expand_sse2_mulvxdi3): Ditto.
	(ix86_gen_bcst_mem): Ditto.
	* config/i386/i386-isa.def (EVEX512): Removed.
	(AVX10_1_256): Ditto.
	* config/i386/i386-options.cc
	(isa2_opts): Remove evex512 and avx10.1-256.
	(ix86_function_specific_save): Remove no_avx512_explicit and
	no_avx10_1_explicit.
	(ix86_function_specific_restore): Ditto.
	(ix86_valid_target_attribute_inner_p): Remove evex512 and
	avx10.1-256/512.
	(ix86_valid_target_attribute_tree): Remove special handling
	to rerun ix86_option_override_internal for AVX10.1-256.
	(ix86_option_override_internal): Remove warning handling.
	(ix86_simd_clone_adjust): Remove evex512.
	* config/i386/i386.cc
	(type_natural_mode): Remove TARGET_EVEX512.
	(ix86_return_in_memory): Ditto.
	(standard_sse_constant_p): Ditto.
	(standard_sse_constant_opcode): Ditto.
	(ix86_get_ssemov): Ditto.
	(ix86_legitimate_constant_p): Ditto.
	(ix86_vectorize_builtin_scatter): Ditto.
	(ix86_hard_regno_mode_ok): Ditto.
	(ix86_set_reg_reg_cost): Ditto.
	(ix86_rtx_costs): Ditto.
	(ix86_vector_mode_supported_p): Ditto.
	(ix86_preferred_simd_mode): Ditto.
	(ix86_autovectorize_vector_modes): Ditto.
	(ix86_get_mask_mode): Ditto.
	(ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
	(ix86_simd_clone_usable): Ditto.
	* config/i386/i386.h (BIGGEST_ALIGNMENT): Ditto.
	(MOVE_MAX): Ditto.
	(STORE_MAX_PIECES): Ditto.
	(PTA_SKYLAKE_AVX512): Remove PTA_EVEX512.
	(PTA_CANNONLAKE): Ditto.
	(PTA_ZNVER4): Ditto.
	(PTA_GRANITERAPIDS): Use PTA_AVX10_1.
	(PTA_DIAMONDRAPIDS): Use PTA_GRANITERAPIDS.
	* config/i386/i386.md: Remove TARGET_EVEX512, avx512f_512
	and avx512bw_512.
	* config/i386/i386.opt: Remove ix86_no_avx512_explicit,
	ix86_no_avx10_1_explicit, mevex512, mavx10.1-256/512 and
	warning for mavx10.1. Modify option comment.
	* config/i386/i386.opt.urls: Remove evex512 and avx10.1-256/512.
	* config/i386/predicates.md: Remove TARGET_EVEX512.
	* config/i386/sse.md: Ditto.
	* doc/extend.texi: Remove avx10.1-256/512. Modify avx10.1 doc.
	* doc/invoke.texi: Remove avx10.1-256/512 and evex512.
	* doc/sourcebuild.texi: Remove avx10.1-256/512.

2025-05-19  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386-builtin.def
	(BDESC): Remove OPTION_MASK_ISA2_EVEX512.
	* config/i386/i386-builtins.cc
	(ix86_init_mmx_sse_builtins): Ditto.

2025-05-18  Dimitar Dimitrov  <dimitar@dinux.eu>
	    Richard Sandiford  <richard.sandiford@arm.com>

	PR target/119966
	* emit-rtl.cc (validate_subreg): Do not exit immediately for
	paradoxical subregs.  Filter subsequent tests which are
	not valid for paradoxical subregs.

2025-05-18  Eric Botcazou  <ebotcazou@adacore.com>

	* dwarf2out.cc (loc_list_from_tree_1) <COMPONENT_REF>: Do not bail
	out when the size is not a multiple of a byte.
	Deal with bit-fields whose size is not a multiple of a byte when
	dereferencing an address.

2025-05-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-fold.cc (mark_lhs_in_seq_for_dce): Make
	non-static.
	* gimple-fold.h (mark_lhs_in_seq_for_dce): Declare.
	* tree-ssa-phiopt.cc (match_simplify_replacement): Use
	mark_lhs_in_seq_for_dce instead of manually looping.

2025-05-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-vect-permconst.cc (vector_permconst:process_bb):
	Use rtvec_alloc, not gen_rtvec since we don't want/need to initialize
	the vector.

2025-05-17  Yuao Ma  <c8ef@outlook.com>

	* doc/extend.texi: Mention new builtins.

2025-05-17  Yuao Ma  <c8ef@outlook.com>

	* builtins.def (TRIG_TYPE): New.
	(BUILT_IN_ACOSPI): New.
	(BUILT_IN_ACOSPIF): New.
	(BUILT_IN_ACOSPIL): New.
	(BUILT_IN_ASINPI): New.
	(BUILT_IN_ASINPIF): New.
	(BUILT_IN_ASINPIL): New.
	(BUILT_IN_ATANPI): New.
	(BUILT_IN_ATANPIF): New.
	(BUILT_IN_ATANPIL): New.
	(BUILT_IN_COSPI): New.
	(BUILT_IN_COSPIF): New.
	(BUILT_IN_COSPIL): New.
	(BUILT_IN_SINPI): New.
	(BUILT_IN_SINPIF): New.
	(BUILT_IN_SINPIL): New.
	(BUILT_IN_TANPI): New.
	(BUILT_IN_TANPIF): New.
	(BUILT_IN_TANPIL): New.
	(TRIG2_TYPE): New.
	(BUILT_IN_ATAN2PI): New.
	(BUILT_IN_ATAN2PIF): New.
	(BUILT_IN_ATAN2PIL): New.

2025-05-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (synthesize_ior_xor): Avoid writing
	operands[0] more than once, use new pseudos instead.

2025-05-17  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv.cc (riscv_gpr_save_operation_p): Remove
	break and fixbug for elt index.

2025-05-16  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/100165
	* config/aarch64/aarch64-protos.h (aarch64_output_fmov): New prototype.
	(aarch64_simd_valid_and_imm_fmov): Likewise.
	* config/aarch64/aarch64-simd.md (and<mode>3<vczle><vczbe>): Allow FMOV
	codegen.
	* config/aarch64/aarch64.cc (aarch64_simd_valid_and_imm_fmov): New.
	(aarch64_output_fmov): Likewise.
	* config/aarch64/constraints.md (Df): New constraint.
	* config/aarch64/predicates.md (aarch64_reg_or_and_imm): Update
	predicate to support FMOV codegen.

2025-05-16  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/100165
	* config/aarch64/aarch64.cc (aarch64_evpc_and): New.
	(aarch64_expand_vec_perm_const_1): Call aarch64_evpc_and.
	* optabs.cc (vec_perm_and_mask): New.
	* optabs.h (vec_perm_and_mask): New prototype.

2025-05-16  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	* config/aarch64/aarch64.cc (aarch64_evpc_reencode): Zero initialize
	newd.

2025-05-16  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (forward_propagate_into_comparison): Dump
	when replacing statement.

2025-05-16  Martin Jambor  <mjambor@suse.cz>
	    Michal Jires  <mjires@suse.cz>

	* cgraph.h (symtab_node): Make member function get_uid const.
	* cgraphclones.cc (dump_callgraph_transformation): Dump m_uid of the
	call graph nodes instead of order.
	* cgraph.cc (cgraph_node::remove): Likewise.
	* ipa-cp.cc (ipcp_lattice<valtype>::print): Likewise.
	* ipa-sra.cc (ipa_sra_summarize_function): Likewise.
	* symtab.cc (symtab_node::dump_base): Likewise.

2025-05-16  Ville Voutilainen  <ville.voutilainen@gmail.com>

	* doc/invoke.texi: Add to_underlying to -ffold-simple-inlines.

2025-05-16  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/118603
	* config/aarch64/driver-aarch64.cc (aarch64_cpu_data): Add cast to unsigned
	to VARIANT of the define AARCH64_CORE.

2025-05-16  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-protos.h (struct sve_vec_cost): Change gather_load_x32_cost
	and gather_load_x64_cost fields to unsigned.

2025-05-16  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Add a limit on the alias walk.

2025-05-16  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-fold.cc (optimize_memcpy_to_memset): Move to
	tree-ssa-forwprop.cc.
	(gimple_fold_builtin_memory_op): Remove call to
	optimize_memcpy_to_memset.
	(fold_stmt_1): Likewise.
	* tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Move from
	gimple-fold.cc.
	(simplify_builtin_call): Try to optimize memcpy/memset.
	(pass_forwprop::execute): Try to optimize memcpy like assignment
	from a previous memset.

2025-05-16  Richard Sandiford  <richard.sandiford@arm.com>

	* config/arm/arm.cc (arm_gen_load_multiple_1): Simplify use of
	end_sequence.
	(arm_gen_store_multiple_1): Likewise.
	* expr.cc (gen_move_insn): Likewise.
	* gentarget-def.cc (main): Likewise.

2025-05-16  Richard Sandiford  <richard.sandiford@arm.com>

	* asan.cc (asan_emit_allocas_unpoison): Directly return the
	result of end_sequence.
	(hwasan_emit_untag_frame): Likewise.
	* config/aarch64/aarch64-speculation.cc
	(aarch64_speculation_clobber_sp): Likewise.
	(aarch64_speculation_establish_tracker): Likewise.
	* config/arm/arm.cc (arm_call_tls_get_addr): Likewise.
	* config/avr/avr-passes.cc (avr_parallel_insn_from_insns): Likewise.
	* config/sh/sh_treg_combine.cc
	(sh_treg_combine::make_not_reg_insn): Likewise.
	* tree-outof-ssa.cc (emit_partition_copy): Likewise.

2025-05-16  Richard Sandiford  <richard.sandiford@arm.com>

	* asan.cc (asan_clear_shadow): Use the return value of end_sequence,
	rather than calling get_insns separately.
	(asan_emit_stack_protection, asan_emit_allocas_unpoison): Likewise.
	(hwasan_frame_base, hwasan_emit_untag_frame): Likewise.
	* auto-inc-dec.cc (attempt_change): Likewise.
	* avoid-store-forwarding.cc (process_store_forwarding): Likewise.
	* bb-reorder.cc (fix_crossing_unconditional_branches): Likewise.
	* builtins.cc (expand_builtin_apply_args): Likewise.
	(expand_builtin_return, expand_builtin_mathfn_ternary): Likewise.
	(expand_builtin_mathfn_3, expand_builtin_int_roundingfn): Likewise.
	(expand_builtin_int_roundingfn_2, expand_builtin_saveregs): Likewise.
	(inline_string_cmp): Likewise.
	* calls.cc (expand_call): Likewise.
	* cfgexpand.cc (expand_asm_stmt, pass_expand::execute): Likewise.
	* cfgloopanal.cc (init_set_costs): Likewise.
	* cfgrtl.cc (insert_insn_on_edge, prepend_insn_to_edge): Likewise.
	(rtl_lv_add_condition_to_bb): Likewise.
	* config/aarch64/aarch64-speculation.cc
	(aarch64_speculation_clobber_sp): Likewise.
	(aarch64_speculation_establish_tracker): Likewise.
	(aarch64_do_track_speculation): Likewise.
	* config/aarch64/aarch64.cc (aarch64_load_symref_appropriately)
	(aarch64_expand_vector_init, aarch64_gen_ccmp_first): Likewise.
	(aarch64_gen_ccmp_next, aarch64_mode_emit): Likewise.
	(aarch64_md_asm_adjust): Likewise.
	(aarch64_switch_pstate_sm_for_landing_pad): Likewise.
	(aarch64_switch_pstate_sm_for_jump): Likewise.
	(aarch64_switch_pstate_sm_for_call): Likewise.
	* config/alpha/alpha.cc (alpha_legitimize_address_1): Likewise.
	(alpha_emit_xfloating_libcall, alpha_gp_save_rtx): Likewise.
	* config/arc/arc.cc (hwloop_optimize): Likewise.
	* config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise.
	* config/arm/arm-builtins.cc: Likewise.
	* config/arm/arm.cc (require_pic_register): Likewise.
	(arm_call_tls_get_addr, arm_gen_load_multiple_1): Likewise.
	(arm_gen_store_multiple_1, cmse_clear_registers): Likewise.
	(cmse_nonsecure_call_inline_register_clear): Likewise.
	(arm_attempt_dlstp_transform): Likewise.
	* config/avr/avr-passes.cc (bbinfo_t::optimize_one_block): Likewise.
	(avr_parallel_insn_from_insns): Likewise.
	* config/avr/avr.cc (avr_prologue_setup_frame): Likewise.
	(avr_expand_epilogue): Likewise.
	* config/bfin/bfin.cc (hwloop_optimize): Likewise.
	* config/c6x/c6x.cc (c6x_expand_compare): Likewise.
	* config/cris/cris.cc (cris_split_movdx): Likewise.
	* config/cris/cris.md: Likewise.
	* config/csky/csky.cc (csky_call_tls_get_addr): Likewise.
	* config/epiphany/resolve-sw-modes.cc
	(pass_resolve_sw_modes::execute): Likewise.
	* config/fr30/fr30.cc (fr30_move_double): Likewise.
	* config/frv/frv.cc (frv_split_scc, frv_split_cond_move): Likewise.
	(frv_split_minmax, frv_split_abs): Likewise.
	* config/frv/frv.md: Likewise.
	* config/gcn/gcn.cc (move_callee_saved_registers): Likewise.
	(gcn_expand_prologue, gcn_restore_exec, gcn_md_reorg): Likewise.
	* config/i386/i386-expand.cc
	(ix86_expand_carry_flag_compare, ix86_expand_int_movcc): Likewise.
	(ix86_vector_duplicate_value, expand_vec_perm_interleave2): Likewise.
	(expand_vec_perm_vperm2f128_vblend): Likewise.
	(expand_vec_perm_2perm_interleave): Likewise.
	(expand_vec_perm_2perm_pblendv): Likewise.
	(expand_vec_perm2_vperm2f128_vblend, ix86_gen_ccmp_first): Likewise.
	(ix86_gen_ccmp_next): Likewise.
	* config/i386/i386-features.cc
	(scalar_chain::make_vector_copies): Likewise.
	(scalar_chain::convert_reg, scalar_chain::convert_op): Likewise.
	(timode_scalar_chain::convert_insn): Likewise.
	* config/i386/i386.cc (ix86_init_pic_reg, ix86_va_start): Likewise.
	(ix86_get_drap_rtx, legitimize_tls_address): Likewise.
	(ix86_md_asm_adjust): Likewise.
	* config/ia64/ia64.cc (ia64_expand_tls_address): Likewise.
	(ia64_expand_compare, spill_restore_mem): Likewise.
	(expand_vec_perm_interleave_2): Likewise.
	* config/loongarch/loongarch.cc
	(loongarch_call_tls_get_addr): Likewise.
	* config/m32r/m32r.cc (gen_split_move_double): Likewise.
	* config/m32r/m32r.md: Likewise.
	* config/m68k/m68k.cc (m68k_call_tls_get_addr): Likewise.
	(m68k_call_m68k_read_tp, m68k_sched_md_init_global): Likewise.
	* config/m68k/m68k.md: Likewise.
	* config/microblaze/microblaze.cc
	(microblaze_call_tls_get_addr): Likewise.
	* config/mips/mips.cc (mips_call_tls_get_addr): Likewise.
	(mips_ls2_init_dfa_post_cycle_insn): Likewise.
	(mips16_split_long_branches): Likewise.
	* config/nvptx/nvptx.cc (nvptx_gen_shuffle): Likewise.
	(nvptx_gen_shared_bcast, nvptx_propagate): Likewise.
	(workaround_uninit_method_1, workaround_uninit_method_2): Likewise.
	(workaround_uninit_method_3): Likewise.
	* config/or1k/or1k.cc (or1k_init_pic_reg): Likewise.
	* config/pa/pa.cc (legitimize_tls_address): Likewise.
	* config/pru/pru.cc (pru_expand_fp_compare, pru_reorg_loop): Likewise.
	* config/riscv/riscv-shorten-memrefs.cc
	(pass_shorten_memrefs::transform): Likewise.
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Likewise.
	* config/riscv/riscv.cc (riscv_call_tls_get_addr): Likewise.
	(riscv_frm_emit_after_bb_end): Likewise.
	* config/rl78/rl78.cc (rl78_emit_libcall): Likewise.
	* config/rs6000/rs6000.cc (rs6000_debug_legitimize_address): Likewise.
	* config/s390/s390.cc (legitimize_tls_address): Likewise.
	(s390_two_part_insv, s390_load_got, s390_va_start): Likewise.
	* config/sh/sh_treg_combine.cc
	(sh_treg_combine::make_not_reg_insn): Likewise.
	* config/sparc/sparc.cc (sparc_legitimize_tls_address): Likewise.
	(sparc_output_mi_thunk, sparc_init_pic_reg): Likewise.
	* config/stormy16/stormy16.cc (xstormy16_split_cbranch): Likewise.
	* config/xtensa/xtensa.cc (xtensa_copy_incoming_a7): Likewise.
	(xtensa_expand_block_set_libcall): Likewise.
	(xtensa_expand_block_set_unrolled_loop): Likewise.
	(xtensa_expand_block_set_small_loop, xtensa_call_tls_desc): Likewise.
	* dse.cc (emit_inc_dec_insn_before, find_shift_sequence): Likewise.
	(replace_read): Likewise.
	* emit-rtl.cc (reorder_insns, gen_clobber, gen_use): Likewise.
	* except.cc (dw2_build_landing_pads, sjlj_mark_call_sites): Likewise.
	(sjlj_emit_function_enter, sjlj_emit_function_exit): Likewise.
	(sjlj_emit_dispatch_table): Likewise.
	* expmed.cc (expmed_mult_highpart_optab, expand_sdiv_pow2): Likewise.
	* expr.cc (convert_mode_scalar, emit_move_multi_word): Likewise.
	(gen_move_insn, expand_cond_expr_using_cmove): Likewise.
	(expand_expr_divmod, expand_expr_real_2): Likewise.
	(maybe_optimize_pow2p_mod_cmp, maybe_optimize_mod_cmp): Likewise.
	* function.cc (emit_initial_value_sets): Likewise.
	(instantiate_virtual_regs_in_insn, expand_function_end): Likewise.
	(get_arg_pointer_save_area, make_split_prologue_seq): Likewise.
	(make_prologue_seq, gen_call_used_regs_seq): Likewise.
	(thread_prologue_and_epilogue_insns): Likewise.
	(match_asm_constraints_1): Likewise.
	* gcse.cc (prepare_copy_insn): Likewise.
	* ifcvt.cc (noce_emit_store_flag, noce_emit_move_insn): Likewise.
	(noce_emit_cmove): Likewise.
	* init-regs.cc (initialize_uninitialized_regs): Likewise.
	* internal-fn.cc (expand_POPCOUNT): Likewise.
	* ira-emit.cc (emit_move_list): Likewise.
	* ira.cc (ira): Likewise.
	* loop-doloop.cc (doloop_modify): Likewise.
	* loop-unroll.cc (compare_and_jump_seq): Likewise.
	(unroll_loop_runtime_iterations, insert_base_initialization): Likewise.
	(split_iv, insert_var_expansion_initialization): Likewise.
	(combine_var_copies_in_loop_exit): Likewise.
	* lower-subreg.cc (resolve_simple_move,resolve_shift_zext): Likewise.
	* lra-constraints.cc (match_reload, check_and_process_move): Likewise.
	(process_addr_reg, insert_move_for_subreg): Likewise.
	(process_address_1, curr_insn_transform): Likewise.
	(inherit_reload_reg, process_invariant_for_inheritance): Likewise.
	(inherit_in_ebb, remove_inheritance_pseudos): Likewise.
	* lra-remat.cc (do_remat): Likewise.
	* mode-switching.cc (commit_mode_sets): Likewise.
	(optimize_mode_switching): Likewise.
	* optabs.cc (expand_binop, expand_twoval_binop_libfunc): Likewise.
	(expand_clrsb_using_clz, expand_doubleword_clz_ctz_ffs): Likewise.
	(expand_doubleword_popcount, expand_ctz, expand_ffs): Likewise.
	(expand_absneg_bit, expand_unop, expand_copysign_bit): Likewise.
	(prepare_float_lib_cmp, expand_float, expand_fix): Likewise.
	(expand_fixed_convert, gen_cond_trap): Likewise.
	(expand_atomic_fetch_op): Likewise.
	* ree.cc (combine_reaching_defs): Likewise.
	* reg-stack.cc (compensate_edge): Likewise.
	* reload1.cc (emit_input_reload_insns): Likewise.
	* sel-sched-ir.cc (setup_nop_and_exit_insns): Likewise.
	* shrink-wrap.cc (emit_common_heads_for_components): Likewise.
	(emit_common_tails_for_components): Likewise.
	(insert_prologue_epilogue_for_components): Likewise.
	* tree-outof-ssa.cc (emit_partition_copy): Likewise.
	(insert_value_copy_on_edge): Likewise.
	* tree-ssa-loop-ivopts.cc (computation_cost): Likewise.

2025-05-16  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl.h (end_sequence): Return the sequence.
	* emit-rtl.cc (end_sequence): Likewise.

2025-05-16  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md (*<optab>_vx_<mode>): Add new
	pattern to convert vec_duplicate + vsub.vv to vsub.vx.
	* config/riscv/riscv.cc (riscv_rtx_costs): Add minus as plus op.
	* config/riscv/vector-iterators.md: Add minus to iterator
	any_int_binop_no_shift_vx.

2025-05-15  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/116546
	* range-op.cc (operator_bitwise_and::op1_range): Utilize bitmask
	from the LHS to improve op1's bitmask.

2025-05-15  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/116546
	* value-range.cc (irange::intersect_bitmask): Allow unknown
	bitmasks to be processed.

2025-05-15  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/116546
	* value-range.cc (irange_bitmask::irange_bitmask): Include
	leading ones in the bitmask.

2025-05-15  Andrew MacLeod  <amacleod@redhat.com>

	* value-range.cc (irange_bitmask::irange_bitmask): Rename from
	get_bitmask_from_range and tweak.
	(prange::set): Use new constructor.
	(prange::intersect): Use new constructor.
	(irange::get_bitmask): Likewise.
	* value-range.h (irange_bitmask): New constructor prototype.

2025-05-15  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/120277
	* range-op-ptr.cc (operator_cast::fold_range): Check if the cast
	if UNDEFINED before setting bounds.

2025-05-15  Jeff Law  <jlaw@ventanamicro.com>

	PR target/120223
	* config/riscv/riscv.cc (synthesize_ior_xor): XTHEADBS does not have
	single bit manipulations.

2025-05-15  Alexander Monakov  <amonakov@ispras.ru>

	* tree-cfg.cc (verify_gimple_assign_unary): Accept only
	COMPLEX_TYPE for CONJ_EXPR.

2025-05-15  Andrew Pinski  <quic_apinski@quicinc.com>

	* fold-const.cc (tree_swap_operands_p): Put ADDR_EXPR last
	instead of just is_gimple_invariant_address ones.
	* match.pd (`a ptr+ b !=\== ADDR`, `ADDR !=/== ssa_name`):
	Move the ADDR to the last operand. Update comment.

2025-05-15  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.cc (vect_transform_loops): When diagnosing
	a vectorized loop indicate whether we vectorized an epilogue,
	whether we used masked vectors and what unroll factor was
	used.

2025-05-15  Richard Biener  <rguenther@suse.de>

	* config/i386/i386.cc (ix86_vector_costs::finish_cost):
	Do not suggest a first epilogue mode for AVX512 sized
	main loops with X86_TUNE_AVX512_TWO_EPILOGUES as that
	interferes with using a masked epilogue.

2025-05-14  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (record_stmt_cost): Remove mixed
	stmt_vec_info/SLP node inline overload.
	* tree-vect-stmts.cc (vectorizable_store): For costing
	vector stmts only pass SLP node to record_stmt_cost.
	(vectorizable_load): Likewise.

2025-05-14  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vect_get_store_cost): Compute vectype based
	on whether we got SLP node or stmt_vec_info and use the full
	record_stmt_cost API.
	(vect_get_load_cost): Likewise.

2025-05-14  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::riscv_subset_list): Init m_allow_adding_dup.

2025-05-14  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-ext.def: New extension defs.
	* config/riscv/riscv-ext.opt: Ditto.
	* doc/riscv-ext.texi: Ditto.

2025-05-14  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/t-riscv: Drop duplicate build rule for
	riscv-ext.opt.

2025-05-14  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-ext.opt.urls: Regenerate.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-cfgcleanup.cc (canonicalize_bool_cond): New function.
	(cleanup_control_expr_graph): Call canonicalize_bool_cond for GIMPLE_COND.
	* tree-cfgcleanup.h (canonicalize_bool_cond): New declaration.
	* tree-ssa-forwprop.cc (forward_propagate_into_gimple_cond):
	Call canonicalize_bool_cond.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple.h (gimple_cond_set_code): Add assert of the code
	being a comparison.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (forward_propagate_into_gimple_cond): Assert
	that gimple_cond_code is always a comparison.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-fold.cc (replace_stmt_with_simplification): Check cfun before
	accessing cfun.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (pass_forwprop::execute): Move marking of to_purge bb
	and marking of fixup statements to after the local optimizations.

2025-05-14  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-forwprop.cc (pass_forwprop::execute): Use `|=` for
	changed on the local folding.

2025-05-14  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (record_stmt_cost): Add overload with
	only SLP node and no vector type.
	* tree-vect-stmts.cc (record_stmt_cost): Use
	SLP_TREE_REPRESENTATIVE for stmt_vec_info.
	(vect_model_simple_cost): Do not get stmt_vec_info argument
	and adjust.
	(vectorizable_call): Adjust.
	(vectorizable_simd_clone_call): Likewise.
	(vectorizable_conversion): Likewise.
	(vectorizable_assignment): Likewise.
	(vectorizable_shift): Likewise.
	(vectorizable_operation): Likewise.
	(vectorizable_condition): Likewise.
	(vectorizable_comparison_1): Likewise.
	* tree-vect-slp.cc (vect_prologue_cost_for_slp): Use
	full-blown record_stmt_cost.

2025-05-14  liuhongt  <hongtao.liu@intel.com>

	PR target/120215
	* config/i386/i386-features.cc
	(scalar_chain::mark_dual_mode_def): Weight
	cost of integer<->sse move with bb frequency when it's
	optimized_for_speed_p.
	(general_scalar_chain::compute_convert_gain): Ditto, and
	adjust function prototype to return true/false when cost model
	is profitable or not.
	(timode_scalar_chain::compute_convert_gain): Ditto.
	(convert_scalars_to_vector): Adjust after the upper two
	function prototype are changed.
	* config/i386/i386-features.h (class scalar_chain): Change
	n_integer_to_sse/n_sse_to_integer to cost_sse_integer, and add
	weighted_cost_sse_integer.
	(class general_scalar_chain): Adjust prototype to return bool
	intead of int.
	(class timode_scalar_chain): Ditto.

2025-05-14  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/111873
	* tree-sra.cc (sra_modify_expr): When processing a load which has
	a type-incompatible replacement, do not store the contents of the
	replacement into the original aggregate when that aggregate is
	const.

2025-05-14  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md: Fix tf_to_fprx2 by using vlr instead of
	ldr.

2025-05-14  liuhongt  <hongtao.liu@intel.com>

	PR tree-optimization/103771
	* match.pd (cond_expr_convert_p): Extend the match to handle
	scalar floating point type.
	* tree-vect-patterns.cc
	(vect_recog_cond_expr_convert_pattern): Handle floating point
	type.

2025-05-13  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/119903
	* gimple-fold.cc (replace_stmt_with_simplification): Reject for
	noncall exceptions replacing comparison with itself.

2025-05-13  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/118868
	* tree-cfg.cc (verify_gimple_assign_unary): Allow pointers
	but disallow aggregate types for PAREN_EXPR.

2025-05-13  Andrew Pinski  <quic_apinski@quicinc.com>

	* cfgexpand.cc (vars_ssa_cache::operator()): Update the cache if the use is already
	has a cache.

2025-05-13  Andrew Pinski  <quic_apinski@quicinc.com>

	* cfgexpand.cc (vars_ssa_cache::operator()): Reverse the order of the going
	through the update list.

2025-05-13  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vectorizable_nonlinear_induction):
	Remove non-SLP path, use SLP_TREE_VECTYPE.
	(vectorizable_induction): Likewise.  Drop ncopies variable
	which is always 1.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc (riscv_extra_ext_flag_table_t):
	New.
	(riscv_ext_flag_table): Rename to ...
	(riscv_extra_ext_flag_table): this, and drop most of definitions
	that can obtained from the flags field of the riscv_ext_info_t
	structures.
	(apply_extra_extension_flags): Use riscv_ext_info_t.
	(riscv_ext_is_subset): Ditto.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
	Remove.
	(standard_extensions_p): Use riscv_ext_info_t.
	(get_default_version): Use riscv_ext_info_t.
	(riscv_arch_help): Ditto.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info::riscv_implied_info_t): Remove unused
	variant.
	(struct riscv_implied_info_t): Remove unsued field.
	(riscv_implied_info::match): Remove unused variant, and adjust
	the logic.
	(get_riscv_ext_info): New.
	(riscv_implied_info): Remove.
	(riscv_ext_info_t::apply_implied_ext): New.
	(riscv_combine_info). Remove.
	(riscv_subset_list::handle_implied_ext): Use riscv_ext_info_t
	rather than riscv_implied_info.
	(riscv_subset_list::check_implied_ext): Ditto.
	(riscv_subset_list::handle_combine_ext): Use riscv_ext_info_t
	rather than riscv_combine_info.
	(riscv_minimal_hwprobe_feature_bits): Use riscv_ext_info_t
	rather than riscv_implied_info.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc (riscv_ext_info_t): New
	struct.
	(opt_var_ref_t): Adjust order.
	(cl_opt_var_ref_t): Ditto.
	(riscv_ext_flag_table_t): Adjust order, and add a new construct
	that not hold the extension name.
	(riscv_version_t): New struct.
	(riscv_implied_info_t): Adjust order, and add a new construct that not
	hold the extension name.
	(apply_extra_extension_flags): New function.
	(riscv_ext_infos): New.
	(riscv_implied_info): Adjust.
	* config/riscv/riscv-opts.h (EXT_FLAG_MACRO): New macro.
	(BITMASK_NOT_YET_ALLOCATED): New macro.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc (riscv_can_inline_p): Drop
	extension flags check from `target_flags`.
	* config/riscv/riscv-subset.h (riscv_x_target_flags_isa_mask):
	Remove.
	* config/riscv/riscv.cc (riscv_x_target_flags_isa_mask): Remove.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* doc/invoke.texi: Replace hand‑written extension table with
	`@include riscv-ext.texi` to pull in auto‑generated entries.
	* doc/riscv-ext.texi: New generated definition file
	containing formatted documentation entries for each extension.
	* Makefile.in: Add riscv-ext.texi to the list of files to be
	processed by the Texinfo generator.
	* config/riscv/gen-riscv-ext-texi.cc: New.
	* config/riscv/t-riscv: Add rule for generating riscv-ext.texi.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/gen-riscv-ext-opt.cc: New.
	* config/riscv/riscv.opt: Drop manual entries for target
	options, and include riscv-ext.opt.
	* config/riscv/riscv-ext.opt: New.
	* config/riscv/riscv-ext.opt.urls: New.
	* config.gcc: Add riscv-ext.opt to the list of target options files.
	* common/config/riscv/riscv-common.cc (riscv_ext_flag_table): Adjsut target
	option variable entry.
	(riscv_set_arch_by_subset_list): Adjust target option variable.
	* config/riscv/riscv-c.cc (riscv_ext_flag_table): Adjust target
	option variable entry.
	* config/riscv/riscv-vector-builtins.cc (pragma_intrinsic_flags):
	Adjust variable name.
	(riscv_pragma_intrinsic_flags_pollute): Adjust variable name.
	(riscv_pragma_intrinsic_flags_restore): Ditto.
	* config/riscv/t-riscv: Add the rule for generating
	riscv-ext.opt.
	* config/riscv/riscv-opts.h (TARGET_MIN_VLEN): Update.
	(TARGET_MIN_VLEN_OPTS): Update.

2025-05-13  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-ext.def: New file; define extension metadata table.
	* config/riscv/riscv-ext-corev.def: New.
	* config/riscv/riscv-ext-sifive.def: New.
	* config/riscv/riscv-ext-thead.def: New.
	* config/riscv/riscv-ext-ventana.def: New.

2025-05-13  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* diagnostic-format-html.cc: Include "diagnostic-format-text.h",
	"pretty-print-urlifier.h" and "edit-context.h".
	(html_builder::html_builder): Fix indentation in decl.
	(html_builder::make_element_for_diagnostic): Split out metadata
	code into make_element_for_metadata.  Call
	make_element_for_source, make_element_for_path, and
	make_element_for_patch.
	(html_builder::make_element_for_source): New.
	(html_builder::make_element_for_path): New.
	(html_builder::make_element_for_patch): New.
	(html_builder::make_metadata_element): New.
	(html_builder::make_element_for_metadata): New.
	(html_output_format::get_builder): New.
	(selftest::test_html_diagnostic_context::get_builder): New.
	(selftest::test_simple_log): Update test to print a quoted string,
	and verify that it uses a "gcc-quoted-text" span.
	(selftest::test_metadata): New.
	(selftest::diagnostic_format_html_cc_tests): Call it.

2025-05-13  Andrew MacLeod  <amacleod@redhat.com>

	* tree-ssanames.cc (set_bitmask): Use int_range_max for temps.
	* value-range.cc (irange::set_range_from_bitmask): Handle all
	trailing zero values.

2025-05-12  Pan Li  <pan2.li@intel.com>

	* match.pd: Add form 7 matching pattern for unsigned integer
	SAT_ADD.

2025-05-12  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64.md (cmov<mode>6): Remove.

2025-05-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/120230
	* optabs.cc (can_compare_p): Remove support for ccp_cmov.
	* optabs.def (cmov_optab): Remove.
	* optabs.h (can_compare_purpose): Remove ccp_cmov.

2025-05-12  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/120231
	* range-op-float.cc (operator_cast::fold_range): New variants.
	(operator_cast::op1_range): Likewise.
	* range-op-mixed.h (operator_cast::fold_range): Likewise.
	(operator_cast::op1_range): Likewise
	* range-op.cc (range_op_handler::fold_range): Add RO_FIF dispatch.
	(range_op_handler::op1_range): Add RO_IFF and RO_FII patterns.
	(range_operator::fold_range): Provide new variant default.
	(range_operator::op1_range): Likewise.
	* range-op.h (range_operator): Add new variant methods.

2025-05-12  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/120188
	* doc/gm2.texi (Semantic checking): Add -fm2-plugin command line option.

2025-05-12  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx-sm.def: Add '61'.
	* config/nvptx/nvptx-gen.h: Regenerate.
	* config/nvptx/nvptx-gen.opt: Likewise.
	* config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust.
	* config/nvptx/nvptx.opt (-march-map=sm_61, -march-map=sm_62):
	Likewise.
	* config.gcc: Likewise.
	* doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_61'.
	* config/nvptx/gen-multilib-matches-tests: Extend.

2025-05-12  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx-opts.h (enum ptx_version): Add
	'PTX_VERSION_5_0'.
	* config/nvptx/nvptx.cc (ptx_version_to_string)
	(ptx_version_to_number): Adjust.
	* config/nvptx/nvptx.h (TARGET_PTX_5_0): New.
	* config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue'
	'5.0' for 'PTX_VERSION_5_0'.
	* doc/invoke.texi (Nvidia PTX Options): Document '-mptx=5.0'.

2025-05-12  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::check_conflict_ext): New extension.
	* config/riscv/riscv.opt: Ditto.

2025-05-12  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::check_conflict_ext): New extension.
	* config/riscv/riscv.opt: Ditto.

2025-05-12  Richard Biener  <rguenther@suse.de>

	* lto-streamer-out.cc (hash_tree): Hash TYPE_MODE_RAW.
	When offloading hash modes as VOIDmode for aggregates
	and vectors.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* doc/extend.texi: Remove the iwmmxt intrinsics.
	* doc/md.texi: Remove the iwmmxt-related constraints.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/aout.h (REGISTER_NAMES): Remove iwmmxt registers.
	* config/arm/arm.h (FIRST_IWMMXT_REGNUM): Delete.
	(LAST_IWMMXT_REGNUM): Delete.
	(FIRST_IWMMXT_GR_REGNUM): Delete.
	(LAST_IWMMXT_GR_REGNUM): Delete.
	(IS_IWMMXT_REGNUM):  Delete.
	(IS_IWMMXT_GR_REGNUM): Delete.
	(FRAME_POINTER_REGNUM): Define relative to CC_REGNUM.
	(ARG_POINTER_REGNUM): Define relative to FRAME_POINTER_REGNUM.
	(FIRST_PSEUDO_REGISTER): Adjust.
	(WREG): Delete.
	(WGREG): Delete.
	(REG_ALLOC_ORDER): Remove iWMMX registers.
	(enum reg_class): Remove iWMMX register classes.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS):  Remove iWMMX registers.
	* config/arm/arm.md (CC_REGNUM): Adjust value.
	(VFPCC_RENGUM): Likewise.
	(APSRQ_REGNUM): Likewise.
	(APSRGE_REGNUM): Likewise.
	(VPR_REGNUM): Likewise.
	(RA_AUTH_CODE): Likewise.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-cpus.in (feature iwmmxt, feature iwmmxt2):  Delete.
	* config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Delete.
	(arm_output_iwmmxt_tinsr): Delete.
	(arm_arch_iwmmxt): Delete.
	(arm_arch_iwmmxt2): Delete.
	* config/arm/arm.h (TARGET_IWMMXT): Delete.
	(TARGET_IWMMXT2): Delete.
	(TARGET_REALLY_IWMMXT): Delete.
	(TARGET_REALLY_IWMMXT2): Delete.
	(VALID_IWMMXT_REG_MODE): Delete.
	(ARM_HAVE_V8QI_ARITH): Remove iWMMXT.
	(ARM_HAVE_V4HI_ARITH): Likewise.
	(ARM_HAVE_V2SI_ARITH): Likewise.
	(ARM_HAVE_V8QI_LDST): Likewise.
	(ARM_HAVE_V4HI_LDST): Likewise.
	(ARM_HAVE_V2SI_LDST): Likewise.
	(SECONDARY_OUTPUT_RELOAD_CLASS):  Remove iWMMXT cases.
	(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
	* config/arm/arm.cc (arm_arch_iwmmxt): Delete.
	(arm_arch_iwmmxt2): Delete.
	(arm_option_reconfigure_globals): Don't initialize them.
	(arm_register_move_cost): Remove costs for iwmmxt.
	(struct minipool_node):  Update comment.
	(output_move_double): Likewise
	(output_return_instruction): Likewise.
	(arm_print_operand, cases 'U' and 'w'): Report an error if
	used.
	(arm_regno_class): Remove iWMMXT cases.
	(arm_debugger_regno): Remove iWMMXT cases.
	(arm_output_iwmmxt_shift_immediate): Delete.
	(arm_output_iwmmxt_tinsr): Delete.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-c.cc (arm_cpu_builtins):  Remove predefines
	for __IWWMXT__, __IWMMXT2__ and __ARM_WMMX.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/iterators.md (VMMX, VMMX2): Remove mode iterators.
	(MMX_char): Remove mode iterator attribute.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.md (core_cycles): Remove iwmmxt attributes.
	* config/arm/types.md (autodetect_type): Likewise.
	* config/arm/marvell-f-iwmmxt.md: Removed.
	* config/arm/t-arm: Remove marvell-f-iwmmxt.md

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.cc (arm_option_check_internal): Remove
	IWMMXT check.
	(arm_options_perform_arch_sanity_checks): Likewise.
	(use_return_insn): Likewise.
	(arm_init_cumulative_args): Likewise.
	(arm_legitimate_index_p): Likewise.
	(thumb2_legitimate_index_p): Likewise.
	(arm_compute_save_core_reg_mask): Likewise.
	(output_return_instruction): Likewise.
	(arm_compute_frame_layout): Likewise.
	(arm_save_coproc_regs): Likewise.
	(arm_hard_regno_mode_ok): Likewise.
	(arm_expand_epilogue_apcs_frame): Likewise.
	(arm_expand_epilogue): Likewise.
	(arm_vector_mode_supported_p): Likewise.
	(arm_preferred_simd_mode): Likewise.
	(arm_conditional_register_usage): Likewise.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config.gcc (arm, --with-abi): Remove iwmmxt abi option.
	* config/arm/arm.opt (enum ARM_ABI_IWMMXT): Remove.
	* config/arm/arm.h (TARGET_IWMMXT_ABI): Delete.
	(enum arm_pcs): Remove ARM_PCS_AAPCS_IWMMXT.
	(FUNCTION_ARG_REGNO_P): Remove IWMMXT ABI support.
	(CUMULATIVE_ARGS): Remove iwmmxt_nregs.
	* config/arm/arm.cc (arm_options_perform_arch_sanity_checks):
	Remove IWMMXT ABI checks.
	(arm_libcall_value_1): Likewise.
	(arm_function_value_regno_p): Likewise.
	(arm_apply_result_size): Remove adjustment for IWMMXT ABI.
	(arm_function_arg): Remove IWMMXT ABI support.
	(arm_arg_partial_bytes): Likewise.
	(arm_function_arg_advance): Likewise.
	(arm_init_cumulative_args): Don't initialize iwmmxt_nregs.
	* doc/invoke.texi (arm -mabi): Remove mention of the iwmmxt
	ABI option.
	* config/arm/arm-opts.h (enum arm_abi_type): Remove ARM_ABI_IWMMXT.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.md(attr arch): Remove iwmmxt and iwmmxt2.
	Remove checks based on TARGET_REALLY_IWMMXT2 from all split
	patterns.
	(arm_movdi): Likewise.
	(*arm_movt): Likewise.
	(arch_enabled): Remove test for iwmmxt2.
	* config/arm/constraints.md (y, z): Remove register constraints.
	(Uy): Remove memory constraint.
	* config/arm/thumb2.md (thumb2_pop_single): Remove check for
	IWMMXT.
	* config/arm/vec-common.md (mov<mode>): Remove check for IWMMXT.
	(mul<mode>3): Likewise.
	(xor<mode>3): Likewise.
	(<absneg_str><mode>2): Likewise.
	(@movmisalign<mode>): Likewise.
	(@mve_<mve_insn>q_<supf><mode>): Likewise.
	(vashl<mode>3): Likewise.
	(vashr<mode>3): Likewise.
	(vlshr<mode>3): Likewise.
	(uavg<mode>3_ceil): Likewise.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.md: Don't include iwmmxt.md.
	* config/arm/t-arm (MD_INCLUDES): Remove iwmmxt*.md.
	* config/arm/iwmmxt.md: Removed.
	* config/arm/iwmmxt2.md: Removed.
	* config/arm/unspecs.md: Remove comment referring to
	iwmmxt2.md.
	(enum unspec): Remove iWMMXt unspec values.
	(enum unspecv): Likewise.
	* config/arm/predicates.md (imm_or_reg_operand): Delete.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-builtins.cc (enum arm_builtins): Delete iWMMX
	builtin values.
	(bdesc_2arg): Likewise.
	(bdesc_1arg): Likewise.
	(arm_init_iwmmxt_builtins): Delete.
	(arm_init_builtins): Don't call arm_init_iwmmxt_builtins.
	(safe_vector_operand): Use __builtin_unreachable instead of emitting
	an iwmmxt builtin.
	(arm_general_expand_builtin): Remove iWMMX builtins support.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-cpus.in (arch iwmmxt): treat in the same
	way as we would treat XScale.
	(arch iwmmxt2): Likewise.
	(cpu xscale): Add aliases for iwmmxt and iwmmxt2.
	(cpu iwmmxt): Delete.
	(cpu iwmmxt2): Delete.
	* config/arm/arm-generic.md (load_ldsched_xscale): Remove references
	to iwmmxt.
	(load_ldsched): Likewise.
	* config/arm/arm-tables.opt: Regenerated.
	* config/arm/arm-tune.md: Regenerated.
	* doc/sourcebuild.texi (arm_iwmmxt_ok): Delete.

2025-05-12  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Add	parentheis
	and re-indent.
	(SECONDARY_INPUT_RELOAD_CLASS): Likewise.

2025-05-12  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120228
	* config/i386/i386-features.cc (ix86_place_single_vector_set):
	Remove df_insn_rescan after emit_insn_*.
	(remove_partial_avx_dependency): Likewise.
	(replace_vector_const): Likewise.

2025-05-11  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_widen_mult_cost): Use sse_op to cost
	SSE integer addition.
	(ix86_multiplication_cost): Use COSTS_N_INSNS (...)/2 to cost sse
	loads.
	(ix86_shift_rotate_cost): Likewise.
	(ix86_vector_costs::add_stmt_cost): Likewise.

2025-05-11  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_register_move_cost):
	Add appropriate move costs between AR_REGS and FP_REGS.

2025-05-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120211
	* tree-vect-stmts.cc (vect_stmt_relevant_p): Only add PHIs
	from the loop header to LOOP_VINFO_EARLY_BREAKS_LIVE_IVS.

2025-05-11  Jiawei  <jiawei@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: New profile.

2025-05-11  Jiawei  <jiawei@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc (struct riscv_profiles): New struct.
	(riscv_subset_list::parse_profiles): New parser.
	(riscv_subset_list::parse_base_ext): Ditto.
	* config/riscv/riscv-subset.h: New def.
	* doc/invoke.texi: New option descriptions.

2025-05-10  H.J. Lu  <hjl.tools@gmail.com>

	PR target/92080
	PR target/117839
	* config/i386/i386-features.cc (replace_vector_const): Change
	dest to src.

2025-05-10  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386-features.cc
	(general_scalar_chain::vector_const_cost): Add BB parameter; handle
	size costs; use COSTS_N_INSNS to compute move costs.
	(general_scalar_chain::compute_convert_gain): Use optimize_bb_for_size
	instead of optimize_insn_for size; use COSTS_N_INSNS to compute move costs;
	update calls of general_scalar_chain::vector_const_cost; use
	ix86_cost->integer_to_sse.
	(timode_immed_const_gain): Add bb parameter; use
	optimize_bb_for_size_p.
	(timode_scalar_chain::compute_convert_gain): Use optimize_bb_for_size_p.
	* config/i386/i386-features.h (class general_scalar_chain): Update
	prototype of vector_const_cost.
	* config/i386/i386.h (struct processor_costs): Add integer_to_sse.
	* config/i386/x86-tune-costs.h (struct processor_costs): Copy
	sse_to_integer to integer_to_sse everywhere.

2025-05-10  Filip Kastl  <fkastl@suse.cz>

	PR tree-optimization/120080
	* tree-switch-conversion.cc (bit_test_cluster::find_bit_tests):
	Replace assert with return.

2025-05-10  Shreya Munnangi  <smunnangi1@ventanamicro.com>

	* config/riscv/iterators.md (OPTAB): New iterator.
	* config/riscv/predicates.md (arith_or_zbs_operand): Remove.
	(reg_or_const_int_operand): New predicate.
	* config/riscv/riscv-protos.h (synthesize_ior_xor): Prototype.
	* config/riscv/riscv.cc (synthesize_ior_xor): New function.
	* config/riscv/riscv.md (ior/xor expander): Use synthesize_ior_xor.

2025-05-10  LIU Hao  <lh_mouse@126.com>

	PR target/111107
	* config/i386/cygming.h (PREFERRED_STACK_BOUNDARY_DEFAULT): Override
	definition from i386.h.
	(STACK_REALIGN_DEFAULT): Undefine, as it no longer has an effect.
	* config/i386/i386.cc (ix86_update_stack_boundary): Force minimum
	128-bit alignment if `force_align_arg_pointer`.

2025-05-10  Anton Blanchard  <antonb@tenstorrent.com>

	* config/riscv/bitmanip.md (crc_rev<ANYI1:mode><ANYI:mode>4): Check
	TARGET_ZVBC.
	* config/riscv/riscv.cc (expand_crc_using_clmul): Emit code using
	vclmul if TARGET_ZVBC.

2025-05-09  Eric Botcazou  <ebotcazou@adacore.com>

	* vr-values.cc (simplify_using_ranges::simplify) <BIT_AND_EXPR>:
	Do not call simplify_bit_ops_using_ranges for boolean types whose
	precision is not 1.

2025-05-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114166
	* tree-vect-stmts.cc (vectorizable_operation): Lower also
	bitwise operations on word-mode vectors.

2025-05-09  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_operation): Remve non-SLP
	path.

2025-05-09  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple.h (gimple_cond_true_canonical_p): New function.
	(gimple_cond_false_canonical_p): New function.
	* gimple-fold.cc (replace_stmt_with_simplification): Return
	false if replacing the operands of GIMPLE_COND with an INTEGER_CST
	and already in canonical form.

2025-05-09  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/120182
	* dse.cc (canon_address): Constant addresses have no
	separate store group.

2025-05-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119960
	* tree-vect-slp.cc (vect_slp_can_convert_to_external):
	Handle cases where defs from multiple BBs are ordered
	by their dominance relation.

2025-05-09  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/120086
	* gcov.cc (print_prime_path_lines): Use unsigned, format with
	%u.
	(print_prime_path_source): Likewise.
	(output_path_coverage): Format with HOST_SIZE_T_PRINT_UNSIGNED,
	use unsigned for pathno.

2025-05-09  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve.md (*aarch64_sve_ptrue<mode>_ldr_str):
	Add define_insn_and_split to fold predicated SVE loads/stores with
	ptrue predicates to unpredicated instructions.

2025-05-09  David Malcolm  <dmalcolm@redhat.com>

	PR other/116792
	* Makefile.in (OBJS-libcommon): Add diagnostic-format-html.o.
	* diagnostic-format-html.cc: Move here from
	testsuite/gcc.dg/plugin/diagnostic_plugin_xhtml_format.cc.
	Simplify includes.  Rename "xhtml" to "html" throughout.
	(write_escaped_text): Drop.
	(class xhtml_stream_output_format): Drop.
	(class html_file_output_format): Reimplement using
	diagnostic_output_file.
	(diagnostic_output_format_init_xhtml): Drop.
	(diagnostic_output_format_init_xhtml_stderr): Drop.
	(diagnostic_output_format_init_xhtml_file): Drop.
	(diagnostic_output_format_open_html_file): New.
	(make_html_sink): New.
	(xhtml_format_selftests): Convert to...
	(diagnostic_format_html_cc_tests): ...this.
	(plugin_is_GPL_compatible): Drop.
	(plugin_init): Drop.
	* diagnostic-format-html.h: New file.
	* doc/invoke.texi (-fdiagnostics-add-output=): Add
	"experimental-html" scheme.
	* opts-diagnostic.cc: Include "diagnostic-format-html.h".
	(class html_scheme_handler): New.
	(output_factory::output_factory): Add html_scheme_handler.
	(html_scheme_handler::make_sink): New.
	* selftest-run-tests.cc (selftest::run_tests): Call the new
	selftests.
	* selftest.h (selftest::diagnostic_format_html_cc_tests): New
	decl.

2025-05-08  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-fold.cc (replace_stmt_with_simplification): Return false
	if replacing `bool_var != 0` with `bool_var` in GIMPLE_COND.

2025-05-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-loop.cc (get_initial_def_for_reduction): Remove.
	(vect-create_epilog_for_reduction): Remove non-SLP path.
	(vectorize_fold_left_reduction): Likewise.
	(vectorizable_lane_reducing): Likewise.
	(vectorizable_reduction): Likewise.
	(vect_transform_reduction): Likewise.
	(vect_transform_cycle_phi): Likewise.
	(vectorizable_lc_phi): Remove non-SLP PATH and split into...
	(vect_transform_lc_phi): ... this.
	(update_epilogue_loop_vinfo): Update comment.
	* tree-vect-stmts.cc (vect_analyze_stmt): Update call to
	vectorizable_lc_phi.
	(vect_transform_stmt): Update calls to vect_transform_reduction and
	vect_transform_cycle_phi.  Rename call from vectorizable_lc_phi to
	vect_transform_lc_phi.
	* tree-vectorizer.h (vect_transform_reduction): Update declaration.
	(vect_transform_cycle_phi): Likewise.
	(vectorizable_lc_phi): Likewise.
	(vect_transform_lc_phi): New.

2025-05-08  Richard Earnshaw  <rearnsha@arm.com>

	* gensupport.cc (conlist::conlist): Pass a location to the constructor.
	Only allow skipping of non-alpha-numeric characters when parsing a
	number and only allow '=', '+' or '%'.  Add some error checking when
	parsing an operand number.
	(parse_section_layout): Pass the location to the conlist constructor.
	(parse_section): Allow an optional list of forbidden characters.
	If specified, reject strings containing them.
	(convert_syntax): Reject '=', '+' or '%' in an alternative.

2025-05-08  Richard Earnshaw  <rearnsha@arm.com>

	* config/aarch64/aarch64-sve.md (@aarch64_pred_<optab><mode>): Move
	commutative marker to the cons specification.
	(add<mode>3): Likewise.
	(@aarch64_pred_<su>abd<mode>): Likewise.
	(@aarch64_pred_<optab><mode>): Likewise.
	(*cond_<optab><mode>_z): Likewise.
	(<optab><mode>3): Likewise.
	(@aarch64_pred_<optab><mode>): Likewise.
	(*aarch64_pred_abd<mode>_relaxed): Likewise.
	(*aarch64_pred_abd<mode>_strict): Likewise.
	(@aarch64_pred_<optab><mode>): Likewise.
	(@aarch64_pred_<optab><mode>): Likewise.
	(@aarch64_pred_fma<mode>): Likewise.
	(@aarch64_pred_fnma<mode>): Likewise.
	(@aarch64_pred_<optab><mode>): Likewise.
	* config/aarch64/aarch64-sve2.md (@aarch64_sve_<su>clamp<mode>): Move
	commutative marker to the cons specification.
	(*aarch64_sve_<su>clamp<mode>_x): Likewise.
	(@aarch64_sve_fclamp<mode>): Likewise.
	(*aarch64_sve_fclamp<mode>_x): Likewise.
	(*aarch64_sve2_nor<mode>): Likewise.
	(*aarch64_sve2_nand<mode>): Likewise.
	(*aarch64_pred_faminmax_fused): Likewise.
	* config/aarch64/aarch64.md (*loadwb_pre_pair_<ldst_sz>): Move the
	early-clobber marker to the relevant alternative.
	(*storewb_pre_pair_<ldst_sz>): Likewise.
	(*add<mode>3_aarch64): Move commutative marker to the cons
	specification.
	(*addsi3_aarch64_uxtw): Likewise.
	(*add<mode>3_poly_1): Likewise.
	(add<mode>3_compare0): Likewise.
	(*addsi3_compare0_uxtw): Likewise.
	(*add<mode>3nr_compare0): Likewise.
	(<optab><mode>3): Likewise.
	(*<optab>si3_uxtw): Likewise.
	(*and<mode>3_compare0): Likewise.
	(*andsi3_compare0_uxtw): Likewise.
	(@aarch64_and<mode>3nr_compare0): Likewise.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116352
	* tree-vect-slp.cc (vect_build_slp_tree_2): When compressing
	operands from a two-operator node make sure the resulting
	operation does not mix defs from different basic-blocks.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120043
	* tree-ssa-phiopt.cc (cond_store_replacement): Check
	whether the store is to readonly memory.

2025-05-08  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116938
	* tree-ssa-phiopt.cc (move_stmt): Use rewrite_to_defined_overflow
	isntead of manually doing the rewrite of the VCE.

2025-05-08  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/120122
	PR tree-optimization/116939
	* gimple-fold.h (gimple_with_undefined_signed_overflow): Rename to ..
	(rewrite_to_defined_overflow): This.
	(gimple_needing_rewrite_undefined): Rename to ...
	(rewrite_to_defined_unconditional): this.
	* gimple-fold.cc (gimple_with_undefined_signed_overflow): Rename to ...
	(gimple_needing_rewrite_undefined): This. Return true for VCE with integral
	types of smaller precision.
	(rewrite_to_defined_overflow): Rename to ...
	(rewrite_to_defined_unconditional): This. Handle VCE rewriting to a cast.
	* tree-if-conv.cc: s/gimple_with_undefined_signed_overflow/gimple_needing_rewrite_undefined/
	s/rewrite_to_defined_overflow/rewrite_to_defined_unconditional.
	* tree-scalar-evolution.cc: Likewise
	* tree-ssa-ifcombine.cc: Likewise.
	* tree-ssa-loop-im.cc: Likewise.
	* tree-ssa-loop-split.cc: Likewise.
	* tree-ssa-reassoc.cc: Likewise.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR ipa/120146
	* tree-ssa-structalias.cc (create_variable_info_for): If
	the symtab cannot tell us whether all refs to a variable
	are explicit assume they are not.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119589
	PR tree-optimization/119586
	PR tree-optimization/119155
	* tree-vect-stmts.cc (vectorizable_store): Verify
	DR_STEP_ALIGNMENT preserves DR_TARGET_ALIGNMENT when
	VF > 1 and VMAT_STRIDED_SLP.  Use vector aligned accesses when
	we can.
	(vectorizable_load): Likewise.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120143
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	Move/update the original stmts, not the pattern stmts which
	lack virtual operands and are not in the IL.

2025-05-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120089
	* tree-vect-stmts.cc (vect_stmt_relevant_p): Mark all
	PHIs live when not already so and doing early-break
	vectorization.
	(vect_mark_stmts_to_be_vectorized): Skip virtual PHIs.
	* tree-vect-slp.cc (vect_analyze_slp): Robustify handling
	of early-break forced IVs.

2025-05-08  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	* config/aarch64/aarch64-protos.h (aarch64_exact_log2_inverse): New.
	* config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
	Update pattern accordingly.
	* config/aarch64/aarch64.cc (aarch64_exact_log2_inverse): New.
	* simplify-rtx.cc (simplify_context::simplify_ternary_operation):
	Canonicalize vec_merge.

2025-05-07  Jeff Law  <jlaw@ventanamicro.com>

	PR target/120137
	PR target/120154
	* config/riscv/riscv-vect-permconst.cc (process_bb): Verify each
	canonicalized element fits into the vector element mode.

2025-05-07  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: New extension.
	* config/riscv/riscv.opt: Ditto.

2025-05-07  Richard Earnshaw  <rearnsha@arm.com>

	PR target/91323
	* config/arm/arm.cc (arm_select_cc_mode): Use CCFPEmode for LTGT.

2025-05-07  Richard Earnshaw  <rearnsha@arm.com>

	PR target/110796
	PR target/118446
	* config/arm/arm.h (REVERSIBLE_CC_MODE): FP modes are only
	reversible if flag_finite_math_only.
	* config/arm/arm.cc (arm_select_cc_mode): Return CCFPmode for all
	FP comparisons if flag_finite_math_only.

2025-05-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/111276
	* gimple-fold.cc (arith_code_with_undefined_signed_overflow): Make static.
	(gimple_with_undefined_signed_overflow): New function.
	* gimple-fold.h (arith_code_with_undefined_signed_overflow): Remove.
	(gimple_with_undefined_signed_overflow): Add declaration.
	* tree-if-conv.cc (if_convertible_gimple_assign_stmt_p): Use
	gimple_with_undefined_signed_overflow instead of manually
	checking lhs and the code of the stmt.
	(predicate_statements): Likewise.
	* tree-ssa-ifcombine.cc (ifcombine_rewrite_to_defined_overflow): Likewise.
	* tree-ssa-loop-im.cc (move_computations_worker): Likewise.
	* tree-ssa-reassoc.cc (update_range_test): Likewise. Reformat.
	* tree-scalar-evolution.cc (final_value_replacement_loop): Use
	gimple_with_undefined_signed_overflow instead of
	arith_code_with_undefined_signed_overflow.
	* tree-ssa-loop-split.cc (split_loop): Likewise.

2025-05-07  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-loop-im.cc (compute_invariantness): Hoist to the always executed point
	if ignorning the cost.

2025-05-07  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Add FLOAT_EXPR;
	FIX_TRUNC_EXPR and vec_promote_demote costs.

2025-05-07  Jennifer Schmitz  <jschmitz@nvidia.com>

	PR target/117978
	* config/aarch64/aarch64-protos.h: Declare
	aarch64_emit_load_store_through_mode and aarch64_sve_maskloadstore.
	* config/aarch64/aarch64-sve.md
	(maskload<mode><vpred>): New define_expand folding maskloads with
	certain predicate patterns to ASIMD loads.
	(*aarch64_maskload<mode><vpred>): Renamed from maskload<mode><vpred>.
	(maskstore<mode><vpred>): New define_expand folding maskstores with
	certain predicate patterns to ASIMD stores.
	(*aarch64_maskstore<mode><vpred>): Renamed from maskstore<mode><vpred>.
	* config/aarch64/aarch64.cc
	(aarch64_emit_load_store_through_mode): New function emitting a
	load/store through subregs of a given mode.
	(aarch64_emit_sve_pred_move): Refactor to use
	aarch64_emit_load_store_through_mode.
	(aarch64_expand_maskloadstore): New function to emit ASIMD loads/stores
	for maskloads/stores with SVE predicates with VL1, VL2, VL4, VL8, or
	VL16 patterns.
	(aarch64_partial_ptrue_length): New function returning number of leading
	set bits in a predicate.

2025-05-07  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-protos.h (s390_expand_cstoreti4): New
	function.
	* config/s390/s390.cc (s390_expand_cstoreti4): New function.
	* config/s390/s390.md (CC_SUZ): New mode iterator.
	(l): New mode attribute.
	(cc_tolower): New mode attribute.
	* config/s390/vector.md (cstoreti4): New expander.
	(*vec_cmpv2di_lane0_<cc_tolower>): New insn.
	(*vec_cmpti_<cc_tolower>): New insn.

2025-05-07  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120036
	* config/i386/i386-features.cc (ix86_get_vector_load_mode):
	Handle 8/4/2 bytes.
	(remove_redundant_vector_load): If the mode size is smaller than
	its natural size, first insert an extra move with a QI vector
	SUBREG of the same size to avoid validate_subreg failure.

2025-05-07  hongtao.liu  <hongtao.liu@intel.com>

	PR gcov-profile/118508
	* auto-profile.cc
	(autofdo_source_profile::get_callsite_total_count): Fix name
	mismatch for fortran.

2025-05-07  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_equals_zero):
	Avoid generating unnecessary andi.  Fix formatting.

2025-05-06  Dongyan Chen  <chendongyan@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: New extension.

2025-05-06  Mingzhu Yan  <yanmingzhu@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc (riscv_ext_version_table): New
	extension.
	(riscv_ext_flag_table) Ditto.
	* config/riscv/riscv.opt: New mask.
	* doc/invoke.texi (RISC-V Options): New extension

2025-05-06  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_rtx_costs): Cost FLOAT, UNSIGNED_FLOAT,
	FIX, UNSIGNED_FIX.
	* config/i386/i386.h (struct processor_costs): Add
	cvtsi2ss, cvtss2si, cvtpi2ps, cvtps2pi.
	* config/i386/x86-tune-costs.h (struct processor_costs): Update tables.

2025-05-06  Martin Jambor  <mjambor@suse.cz>

	PR ipa/119852
	* cgraph.h (cgraph_node::create_clone): Remove the default value of
	argument suffix.  Update function comment.
	* cgraphclones.cc (cgraph_node::create_clone): Update function comment.
	* ipa-inline-transform.cc (clone_inlined_nodes): Pass NULL to suffix
	of create_clone explicitely.
	* ipa-inline.cc (recursive_inlining): Likewise.
	* lto-cgraph.cc (input_node): Likewise.

2025-05-06  Martin Jambor  <mjambor@suse.cz>

	* cgraph.h (cgraph_node::create_version_clone_with_body): Fix function
	comment.  Change the name of clone_name to suffix, in line with the
	function definition.
	* cgraphclones.cc (cgraph_node::create_version_clone_with_body): Fix
	function comment.

2025-05-06  Martin Jambor  <mjambor@suse.cz>

	PR ipa/119852
	* cgraphclones.cc (dump_callgraph_transformation): Document the
	function.  Do not dump if suffix is NULL.

2025-05-06  Martin Jambor  <mjambor@suse.cz>

	* doc/invoke.texi (Developer Options): Document -fdump-ipa-clones.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	* selftest-diagnostic.cc (test_diagnostic_context::report): Use
	diagnostic_option_id rather than plain int.
	* selftest-diagnostic.h (test_diagnostic_context::report):
	Likewise.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	PR sarif-replay/117988
	* json.cc (json::pointer::token::token): New ctors.
	(json::pointer::token::~token): New.
	(json::pointer::token::operator=): New.
	(json::object::set): Set the value's m_pointer_token.
	(json::array::append): Likewise.
	* json.h (json::pointer::token): New struct.
	(json::value::get_pointer_token): New accessor.
	(json::value::m_pointer_token): New field.
	* libsarifreplay.cc (get_logical_location_kind_for_json_kind):
	New.
	(make_logical_location_from_jv): New.
	(sarif_replayer::report_problem): Set the logical location of the
	diagnostic.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (maybe_get_sarif_kind): Add cases for
	new kinds of logical location.
	* doc/libgdiagnostics/topics/logical-locations.rst: Add new kinds
	of logical location for handling XML and JSON.
	* libgdiagnostics.cc (impl_logical_location_manager::get_kind):
	Add cases for new kinds of logical location.
	(diagnostic_text_sink::text_starter): Likewise, introducing a
	macro for this.
	(diagnostic_manager_debug_dump_logical_location): Likewise.
	* libgdiagnostics.h (enum diagnostic_logical_location_kind_t): Add
	new kinds of logical location for handling XML and JSON.
	* libsarifreplay.cc (handle_logical_location_object): Add entries
	to "kind_values" for decoding sarif logical location kinds
	relating to XML and JSON.
	* logical-location.h (enum logical_location_kind): Add new kinds
	of logical location for handling XML and JSON.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	PR other/116176
	* diagnostic-format-sarif.cc (class sarif_array_of_unique): New
	template.
	(class sarif_logical_location): Move here from
	diagnostic-format-sarif.h.
	(sarif_builder::m_cached_logical_locs): New.
	(sarif_builder::sarif_builder): Initialize it.
	(sarif_builder::set_any_logical_locs_arr): Call
	make_minimal_sarif_logical_location rather than
	make_sarif_logical_location_object.
	(sarif_property_bag::set_logical_location): Likewise.
	(make_sarif_logical_location_object): Replace with...
	(sarif_builder::ensure_sarif_logical_location_for): ...this.
	Capture "parentIndex" property.  Consolidate into
	theRuns.logicalLocations.
	(sarif_builder::make_minimal_sarif_logical_location): New.
	(sarif_builder::make_run_object): Add "index" properties to
	m_cached_logical_locs and move it to theRuns.logicalLocations.
	(selftest::test_sarif_array_of_unique_1): New.
	(selftest::test_sarif_array_of_unique_2): New.
	(selftest::diagnostic_format_sarif_cc_tests): Call the new
	selftests.
	* diagnostic-format-sarif.h (class sarif_logical_location): Move
	to diagnostic-format-sarif.cc.
	(make_sarif_logical_location_object): Drop decl.
	* json.cc (value::compare): New.
	(object::compare): New.
	(selftest::fail_comparison): New.
	(selftest::assert_json_equal): New.
	(ASSERT_JSON_EQ): New.
	(selftest::assert_json_non_equal): New.
	(ASSERT_JSON_NE): New.
	(selftest::test_comparisons): New.
	(selftest::json_cc_tests): Call the new selftest.
	* json.h (json::value::dyn_cast_object): New vfunc.
	(json::object::dyn_cast_object): New vfunc impl.
	(json::object::compare): New decl.
	* libgdiagnostics.cc
	(impl_logical_location_manager::get_parent): New.
	* logical-location.h (logical_location_manager::get_parent): New
	vfunc impl.
	* selftest-logical-location.h
	(test_logical_location_manager::get_parent): New vfunc impl.
	* tree-logical-location.cc (assert_valid_tree): New.
	(tree_logical_location_manager::get_short_name): Support types as
	well as decls.
	(tree_logical_location_manager::get_name_with_scope): Gracefully
	handle non-decl nodes.
	(tree_logical_location_manager::get_internal_name): Likewise.
	(tree_logical_location_manager::get_kind): Don't attempt to handle
	null nodes.  Handle NAMESPACE_DECL and RECORD_TYPE.
	(tree_logical_location_manager::get_name_for_path_output):
	Gracefully handle non-decl nodes.
	(tree_logical_location_manager::get_parent): New.
	* tree-logical-location.h
	(tree_logical_location_manager::get_parent): New vfunc impl.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-client-data-hooks.h: Include "logical-location.h".
	(diagnostic_client_data_hooks::get_logical_location_manager): New.
	(diagnostic_client_data_hooks::get_current_logical_location):
	Convert return type from const logical_location * to
	logical_location.
	* diagnostic-format-json.cc: Include
	"diagnostic-client-data-hooks.h".
	(make_json_for_path): Update to use logical_location_manager from
	the context.
	* diagnostic-format-sarif.cc
	(sarif_builder::get_logical_location_manager): New.
	(sarif_builder::make_location_object): Update type of logical_loc
	from "const logical_location *" to "logical_location".
	(sarif_builder::set_any_logical_locs_arr): Likewise.
	(sarif_builder::m_logical_loc_mgr): New field.
	(sarif_result::on_nested_diagnostic): Use logical_location default
	ctor rather than nullptr.
	(sarif_builder::sarif_builder): Initialize m_logical_loc_mgr from
	context's client data hooks.
	(sarif_builder::make_locations_arr): Convert type of logical_loc
	from from "const logical_location *" to "logical_location".
	(sarif_builder::set_any_logical_locs_arr): Likewise.  Pass manager
	to make_sarif_logical_location_object.
	(sarif_builder::make_location_object): Likewise.
	(sarif_property_bag::set_logical_location): New.
	(make_sarif_logical_location_object): Update for introduction of
	logical_location_manager.
	(populate_thread_flow_location_object): Pass builder to
	ev.maybe_add_sarif_properties.
	(selftest::test_make_location_object): Use logical_location
	default ctor rather than nullptr.
	* diagnostic-format-sarif.h (class logical_location): Replace
	forward decl with include of "logical-location.h".
	(class sarif_builder): New forward decl.
	(sarif_property_bag::set_logical_location): New.
	(make_sarif_logical_location_object): Add "mgr" param.
	* diagnostic-path.cc
	(diagnostic_path::get_first_event_in_a_function): Update for
	change of logical_location type.
	(per_thread_summary::per_thread_summary): Pass in
	"logical_loc_mgr".
	(per_thread_summary::m_logical_loc_mgr): New field.
	(event_range::m_logical_loc): Update for change of
	logical_location type.
	(path_summary::get_logical_location_manager): New accessor.
	(path_summary::m_logical_loc_mgr): New field.
	(path_summary::get_or_create_events_for_thread_id): Pass
	m_logical_loc_mgr to per_thread_summary ctor.
	(path_summary::path_summary): Initialize m_logical_loc_mgr.
	(thread_event_printer::print_swimlane_for_event_range): Add param
	"logical_loc_mgr".  Update for change in logical_loc type.
	(print_path_summary_as_text): Pass manager to
	thread_event_printer::print_swimlane_for_event_range.
	(diagnostic_text_output_format::print_path): Update for
	introduction of logical_location_manager.
	* diagnostic-path.h: Include "logical-location.h".
	(class sarif_builder): New forward decl.
	(diagnostic_event::get_logical_location): Convert return type from
	"const logical_location *" to "logical_location".
	(diagnostic_event::maybe_add_sarif_properties): Add sarif_builder
	param.
	(diagnostic_path::get_logical_location_manager): New accessor.
	(diagnostic_path::diagnostic_path): New ctor, taking manager.
	(diagnostic_path::m_logical_loc_mgr): New field.
	* diagnostic.cc
	(diagnostic_context::get_logical_location_manager): New.
	(logical_location::function_p): Convert to...
	(logical_location_manager::function_p): ...this.
	* diagnostic.h (class logical_location): Replace forward decl
	with...
	(class logical_location_manager): ...this.
	(diagnostic_context::get_logical_location_manager): New decl.
	* lazy-diagnostic-path.cc
	(selftest::test_lazy_path::test_lazy_path): Pass m_logical_loc_mgr
	to path ctor.
	(selftest::test_lazy_path::make_inner_path): Likewise.
	(selftest::test_lazy_path::m_logical_loc_mgr): New field.
	* lazy-diagnostic-path.h
	(lazy_diagnostic_path::lazy_diagnostic_path): New ctor.
	* libgdiagnostics.cc (struct diagnostic_logical_location): Convert
	from subclass of logical_location to a plain struct, dropping
	accessors.
	(class impl_logical_location_manager): New.
	(impl_diagnostic_client_data_hooks::get_logical_location_manager):
	New
	(impl_diagnostic_client_data_hooks::m_logical_location_manager):
	New field.
	(diagnostic_manager::get_logical_location_manager): New.
	(libgdiagnostics_path_event::get_logical_location): Reimplement.
	(diagnostic_execution_path::diagnostic_execution_path): Add
	logical_loc_mgr and pass to base class.
	(diagnostic_execution_path::same_function_p): Update for change to
	logical_location type.
	(diagnostic::add_execution_path): Pass logical_loc_mgr to path
	ctor.
	(impl_diagnostic_client_data_hooks::get_current_logical_location):
	Reimplement.
	(diagnostic_text_sink::text_starter): Reimplement printing of
	logical location.
	(diagnostic_manager::new_execution_path): Pass mgr to path ctor.
	(diagnostic_manager_debug_dump_logical_location): Update for
	changes to diagnostic_logical_location.
	(diagnostic_logical_location_get_kind): Likewise.
	(diagnostic_logical_location_get_parent): Likewise.
	(diagnostic_logical_location_get_short_name): Likewise.
	(diagnostic_logical_location_get_fully_qualified_name): Likewise.
	(diagnostic_logical_location_get_decorated_name): Likewise.
	* logical-location.h (class logical_location_manager): New.
	(class logical_location): Convert to typedef of
	logical_location_manager::key.
	* selftest-diagnostic-path.cc
	(selftest::test_diagnostic_path::test_diagnostic_path): Pass
	m_test_logical_loc_mgr to base ctor.
	(selftest::test_diagnostic_path::same_function_p): Use pointer
	comparison.
	(selftest::test_diagnostic_path::add_event): Use
	logical_location_from_funcname.
	(selftest::test_diagnostic_path::add_thread_event): Likewise.
	(selftest::test_diagnostic_path::logical_location_from_funcname):
	New.
	(selftest::test_diagnostic_event::test_diagnostic_event): Fix
	indentation.  Pass logical_location rather than const char *.
	* selftest-diagnostic-path.h
	(selftest::test_diagnostic_event::test_diagnostic_event):
	Likewise.
	(selftest::test_diagnostic_event::get_logical_location): Update
	for change to logical_location type.
	(selftest::test_diagnostic_event::get_function_name): Drop.
	(selftest::test_diagnostic_event::m_logical_loc): Convert from
	test_logical_location to logical_location.
	(selftest::test_diagnostic_path::logical_location_from_funcname):
	New.
	(selftest::test_diagnostic_path::m_test_logical_loc_mgr): New
	field.
	* selftest-logical-location.cc: Include "selftest.h".
	(selftest::test_logical_location::test_logical_location): Drop.
	(selftest::test_logical_location_manager::~test_logical_location_manager):
	New.
	(selftest::test_logical_location::get_short_name): Replace with...
	(selftest::test_logical_location_manager::get_short_name):
	...this.
	(selftest::test_logical_location::get_name_with_scope): Replace
	with...
	(selftest::test_logical_location_manager::get_name_with_scope):
	...this.
	(selftest::test_logical_location::get_internal_name): Replace
	with...
	(selftest::test_logical_location_manager::get_internal_name):
	...this.
	(selftest::test_logical_location::get_kind): Replace with...
	(selftest::test_logical_location_manager::get_kind): ...this.
	(selftest::test_logical_location::get_name_for_path_output):
	Replace with...
	(selftest::test_logical_location_manager::get_name_for_path_output):
	...this.
	(selftest::test_logical_location_manager::logical_location_from_funcname):
	New.
	(selftest::test_logical_location_manager::item_from_funcname):
	New.
	(selftest::selftest_logical_location_cc_tests): New.
	* selftest-logical-location.h (class test_logical_location):
	Replace with...
	(class test_logical_location_manager): ...this.
	* selftest-run-tests.cc (selftest::run_tests): Call
	selftest_logical_location_cc_tests.
	* selftest.h (selftest::selftest_logical_location_cc_tests): New
	decl.
	* simple-diagnostic-path.cc
	(simple_diagnostic_path::simple_diagnostic_path): Add
	"logical_loc_mgr" param and pass it to base ctor.
	(simple_diagnostic_event::simple_diagnostic_event): Update init of
	m_logical_loc.
	(selftest::test_intraprocedural_path): Update for changes to
	logical locations.
	* simple-diagnostic-path.h: Likewise.
	* tree-diagnostic-client-data-hooks.cc
	(compiler_data_hooks::get_logical_location_manger): New.
	(compiler_data_hooks::get_current_logical_location): Update.
	(compiler_data_hooks::m_current_fndecl_logical_loc): Replace
	with...
	(compiler_data_hooks::m_logical_location_manager): ...this.
	* tree-logical-location.cc
	(compiler_logical_location::get_short_name_for_tree): Replace
	with...
	(tree_logical_location_manager::get_short_name): ...this.
	(compiler_logical_location::get_name_with_scope_for_tree): Replace
	with...
	(tree_logical_location_manager::get_name_with_scope): ...this.
	(compiler_logical_location::get_internal_name_for_tree): Replace
	with...
	(tree_logical_location_manager::get_internal_name): ...this.
	(compiler_logical_location::get_kind_for_tree): Replace with...
	(tree_logical_location_manager::get_kind): ...this.
	(compiler_logical_location::get_name_for_tree_for_path_output):
	Replace with...
	(tree_logical_location_manager::get_name_for_path_output):
	...this.
	(tree_logical_location::get_short_name): Drop.
	(tree_logical_location::get_name_with_scope): Drop.
	(tree_logical_location::get_internal_name): Drop.
	(tree_logical_location::get_kind): Drop.
	(tree_logical_location::get_name_for_path_output): Drop.
	(current_fndecl_logical_location::get_short_name): Drop.
	(current_fndecl_logical_location::get_name_with_scope): Drop.
	(current_fndecl_logical_location::get_internal_name): Drop.
	(current_fndecl_logical_location::get_kind): Drop.
	(current_fndecl_logical_location::get_name_for_path_output): Drop.
	* tree-logical-location.h (class compiler_logical_location): Drop.
	(class tree_logical_location): Drop.
	(class current_fndecl_logical_location): Drop.
	(class tree_logical_location_manager): New.

2025-05-06  David Malcolm  <dmalcolm@redhat.com>

	* doc/libgdiagnostics/topics/compatibility.rst: New file, based
	on gcc/jit/docs/topics/compatibility.rst.
	* doc/libgdiagnostics/topics/index.rst: Add compatibility.rst.
	* doc/libgdiagnostics/topics/logical-locations.rst (Accessors):
	New section.
	* libgdiagnostics++.h (logical_location::operator bool): New.
	(logical_location::operator==): New.
	(logical_location::operator!=): New.
	(logical_location::get_kind): New.
	(logical_location::get_parent): New.
	(logical_location::get_short_name): New.
	(logical_location::get_fully_qualified_name): New.
	(logical_location::get_decorated_name): New.
	* libgdiagnostics.cc
	(diagnostic_logical_location::get_fully_qualified_name): New.
	(diagnostic_logical_location_get_kind): New entrypoint.
	(diagnostic_logical_location_get_parent): New entrypoint.
	(diagnostic_logical_location_get_short_name): New entrypoint.
	(diagnostic_logical_location_get_fully_qualified_name): New
	entrypoint.
	(diagnostic_logical_location_get_decorated_name): New entrypoint.
	* libgdiagnostics.h
	(LIBDIAGNOSTICS_HAVE_LOGICAL_LOCATION_ACCESSORS): New define.
	(diagnostic_logical_location_get_kind): New entrypoint.
	(diagnostic_logical_location_get_parent): New entrypoint.
	(diagnostic_logical_location_get_short_name): New entrypoint.
	(diagnostic_logical_location_get_fully_qualified_name): New
	entrypoint.
	(diagnostic_logical_location_get_decorated_name): New entrypoint.
	* libgdiagnostics.map (LIBGDIAGNOSTICS_ABI_1): New.

2025-05-06  Shreya Munnangi  <smunnangi1@ventanamicro.com>

	PR middle-end/114512
	* config/riscv/bitmanip.md (bext* patterns): New patterns for
	bext recognition plus splitter for extracting variable bit from
	a constant.
	* config/riscv/predicates.md (bitpos_mask_operand): New predicate.

2025-05-06  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md (*<optab>_vx_<mode>): Add new
	combine to convert vec_duplicate + vadd.vv to vaddvx on GR2VR
	cost.
	* config/riscv/riscv.cc (riscv_rtx_costs): Take care of the cost
	when vec_dup and vadd v, vec_dup(x).
	* config/riscv/vector-iterators.md: Add new iterator for vx.

2025-05-06  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-protos.h (get_gr2vr_cost): Add new decl to
	get the cost of gr2vr.
	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
	Leverage the helper function to get the cost of gr2vr.
	* config/riscv/riscv.cc (riscv_register_move_cost): Ditto.
	(riscv_builtin_vectorization_cost): Ditto.
	(get_gr2vr_cost): Add new impl of the helper function.

2025-05-06  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-opts.h (RVV_GR2VR_COST_UNPROVIDED): Add
	new macro to indicate the param is not provided.
	* config/riscv/riscv.opt: Add new option --pararm=gpr2vr-cost.

2025-05-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/1157777
	* tree-vectorizer.h (_slp_tree::avoid_stlf_fail): New member.
	* tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize it.
	(vect_print_slp_tree): Dump it.
	* tree-vect-data-refs.cc (vect_slp_analyze_instance_dependence):
	For dataflow dependent loads of a store check whether there's
	a cross-iteration data dependence that for sure prohibits
	store-to-load forwarding and mark involved loads.
	* tree-vect-stmts.cc (get_group_load_store_type): For avoid_stlf_fail
	marked loads use VMAT_ELEMENTWISE.

2025-05-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/120074
	* gimple-fold.cc (fold_truth_andor_for_ifcombine): For
	lsignbit && l_xor case, punt if ll_bitsize != lr_bitsize.  Similarly
	for rsignbit && r_xor case, punt if rl_bitsize != rr_bitsize.
	Formatting fix.

2025-05-06  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_tls_index): Add ifdef.

2025-05-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120031
	* match.pd ((nop_outer_cast)-(inner_cast)var -> -(outer_cast)(var)):
	Allow inner conversions that are not widenings when the outer
	type is unsigned.

2025-05-06  LIU Hao  <lh_mouse@126.com>

	PR pch/14940
	* config/i386/host-mingw32.cc (mingw32_gt_pch_use_address):
	Replace the loop that attempted to map the PCH only to its
	original address with more adaptive operations

2025-05-06  Julian Waters  <tanksherman27@gmail.com>
	    Eric Botcazou  <botcazou@adacore.com>
	    Uroš Bizjak  <ubizjak@gmail.com>
	    Liu Hao  <lh_mouse@126.com>

	* config/i386/i386.cc (ix86_legitimate_constant_p): Handle new UNSPEC.
	(legitimate_pic_operand_p): Handle new UNSPEC.
	(legitimate_pic_address_disp_p): Handle new UNSPEC.
	(ix86_legitimate_address_p): Handle new UNSPEC.
	(ix86_tls_index_symbol): New symbol for _tls_index.
	(ix86_tls_index): Handle creation of _tls_index symbol.
	(legitimize_tls_address): Create thread local access sequence.
	(output_pic_addr_const): Handle new UNSPEC.
	(i386_output_dwarf_dtprel): Handle new UNSPEC.
	(i386_asm_output_addr_const_extra): Handle new UNSPEC.
	* config/i386/i386.h (TARGET_WIN32_TLS): Define.
	* config/i386/i386.md: New UNSPEC.
	* config/i386/predicates.md: Handle new UNSPEC.
	* config/mingw/mingw32.h (TARGET_WIN32_TLS): Define.
	(TARGET_ASM_SELECT_SECTION): Define.
	(DEFAULT_TLS_SEG_REG): Define.
	* config/mingw/winnt.cc (mingw_pe_select_section): Select proper TLS section.
	(mingw_pe_unique_section): Handle TLS section.
	* config/mingw/winnt.h (mingw_pe_select_section): Declare.
	* configure: Regenerate.
	* configure.ac: New check for broken linker thread local support

2025-05-05  Jeff Law  <jlaw@ventanamicro.com>

	PR target/119971
	* config/riscv/bitmanip.md (rotation with masked count): Rewrite
	as define_insn patterns.  Fix formatting.
	* config/riscv/riscv.md (shift with masked count): Similarly.

2025-05-05  Uros Bizjak  <ubizjak@gmail.com>
	    Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR target/120019
	* config/i386/i386.cc (ix86_print_operand): Handle 'v' operand
	modifier to emit segment override prefix.
	* config/i386/i386.md (*strmovdi_rex_1): Use %v operand modifier
	to emit segment override prefix.
	(*strmovsi_1): Ditto.
	(*strmovhi_1): Ditto.
	(*strmovqi_1): Ditto.
	(*rep_movdi_rex64): Ditto.
	(*rep_movsi): Ditto.
	(*rep_movqi): Ditto.

2025-05-05  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/120048
	* ipa-cp.cc (ipcp_store_vr_results): Check for UNDEFINED.

2025-05-05  Kyle Huey  <khuey@kylehuey.com>

	* dwarf2out.cc (resolve_addr_in_expr): Propagate dtprel into the address
	table when appropriate.

2025-05-05  Simon Martin  <simon@nasilyan.com>

	PR c++/118163
	PR c++/118392
	* diagnostic.cc (diagnostic_context::initialize): Initialize
	m_diagnostic_groups.m_inhibiting_notes_from.
	(diagnostic_context::inhibit_notes_in_group): New.
	(diagnostic_context::notes_inhibited_in_group): New
	(diagnostic_context::report_diagnostic): Call
	inhibit_notes_in_group and notes_inhibited_in_group.
	(diagnostic_context::end_group): Call inhibit_notes_in_group.
	(diagnostic_context::pop_nesting_level): Ditto.
	* diagnostic.h (diagnostic_context::m_diagnostic_groups): Add
	member to track the depth at which a warning has been inhibited.
	(diagnostic_context::notes_inhibited_in_group): Declare.
	(diagnostic_context::inhibit_notes_in_group): Declare.
	* doc/ux.texi: Document diagnostic_group behavior with regards
	to inhibited warnings.

2025-05-05  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.md (truncsfbf2): Fix comment typo,
	unsafte -> unsafe.

2025-05-05  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/genrvv-type-indexer.cc: Apply clang-format to the
	file.

2025-05-04  Jeff Law  <jlaw@ventanamicro.com>

	* config.gcc (riscv): Add riscv-vect-permcost.o to extra_objs.
	* config/riscv/riscv-passes.def (pass_vector_permcost): Add new pass.
	* config/riscv/riscv-protos.h (make_pass_vector_permconst): Declare.
	* config/riscv/riscv-vect-permconst.cc: New file.
	* config/riscv/t-riscv: Add build rule for riscv-vect-permcost.o

2025-05-04  Jin Ma  <jinma@linux.alibaba.com>
	    Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/riscv/riscv.cc (riscv_print_operand): Add H.
	* doc/extend.texi: Document for H.

2025-05-04  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_register_move_cost): Handle
	subclasses with vector registers as well.

2025-05-04  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119900
	* cgraph.cc (cgraph_edge::maybe_hot_p): Add
	a variant accepting a sreal scale; use reliability of
	profile.
	* cgraph.h (cgraph_edge::maybe_hot_p): Declare
	a varaint accepting a sreal scale.
	* ipa-inline.cc (callee_speedup): New function.
	(want_inline_small_function_p): add early return
	and avoid duplicated lookup of summaries; use scaled
	maybe_hot predicate.

2025-05-04  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_emit_frm_mode_set): Refactor
	the frm mode set by removing fsrmsi_restore_volatile.
	* config/riscv/vector-iterators.md (unspecv): Remove as
	unnecessary.
	* config/riscv/vector.md (fsrmsi_restore_volatile): Ditto.

2025-05-03  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (unspec_pcmp_p): New function.
	(ix86_rtx_costs): Cost VEC_MERGE more realistically.

2025-05-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/120059
	* simplify-rtx.cc (simplify_with_subreg_not): Check the result
	of simplify_gen_subreg.

2025-05-02  Jakub Jelinek  <jakub@redhat.com>
	    Andrew MacLeod  <amacleod@redhat.com>

	PR c/117023
	* gimple-range-infer.cc (gimple_infer_range::gimple_infer_range):
	For nonnull_if_nonzero attribute check also arg2 range if it doesn't
	include zero and in that case call add_nonzero too.

2025-05-02  Jeff Law  <jlaw@ventanamicro.com>

	Revert:
	2025-04-21  Matthew Fortune  <matthew.fortune@imgtec.com>

	* config/mips/mips.cc (mips_option_override): Error out for
	-mmicromips -mmsa.

2025-05-02  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119900
	* config/i386/i386.cc (ix86_can_change_mode_class): Add TODO
	comment.
	(ix86_rtx_costs): Make VEC_SELECT equivalent to SUBREG cost 1.

2025-05-02  Jason Merrill  <jason@redhat.com>

	PR c++/120012
	* doc/invoke.texi: Document C++20 aggregate fix.
	* common.opt: Likewise.

2025-05-02  Jason Merrill  <jason@redhat.com>

	PR c++/60336
	* config/i386/i386.cc (ix86_warn_parameter_passing_abi):
	If no target, check the current TU.

2025-05-02  Richard Biener  <rguenther@suse.de>

	* config/arc/arc.cc (TARGET_LRA_P): Remove define.
	* config/gcn/gcn.cc (TARGET_LRA_P): Likewise.

2025-05-02  Filip Kastl  <fkastl@suse.cz>

	PR middle-end/117091
	* tree-switch-conversion.cc (switch_decision_tree::analyze_switch_statement):
	Remove warning about using different algorithms.

2025-05-02  Filip Kastl  <fkastl@suse.cz>

	* tree-switch-conversion.cc (bit_test_cluster::find_bit_tests):
	Modify the dynamic programming algorithm to take is_beneficial()
	into account earlier.  To do this efficiently, copy some logic
	from is_beneficial() here.  Add detailed comments about how the
	DP algorithm works.
	(bit_test_cluster::can_be_handled): Check that the cluster range
	is >, not >= BITS_IN_WORD.  Remove the
	"vec<cluster *> &, unsigned, unsigned" overloaded variant since
	we no longer need it.
	(bit_test_cluster::is_beneficial): Add a comment that this
	function is closely tied to m_max_case_bit_tests.  Remove the
	"vec<cluster *> &, unsigned, unsigned" overloaded variant since
	we no longer need it.
	* tree-switch-conversion.h: Remove the vec overloaded variants
	of bit_test_cluster::is_beneficial and
	bit_test_cluster::can_be_handled.

2025-05-02  Filip Kastl  <fkastl@suse.cz>

	PR middle-end/117091
	* tree-switch-conversion.cc (bit_test_cluster::find_bit_tests_fast):
	Remove function.
	(bit_test_cluster::find_bit_tests_slow): Remove function.
	(bit_test_cluster::find_bit_tests): We don't need to decide
	between slow and fast so just put the modified (no longer) slow
	algorithm here.

2025-05-02  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve.md (vec_extract<mode><Vel>):
	Prevent the emission of pfalse+lastb for VLS.

2025-05-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118617
	* tree-vect-generic.cc (expand_vector_conversion): Have 2 elements
	as internal storage for converts.
	* tree-vect-stmts.cc (vectorizable_conversion): Likewise.

2025-05-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118659
	* tree-ssanames.cc (get_known_nonzero_bits_1): Use
	wi::bit_and_not instead of `a & ~b`.

2025-05-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/118090
	* ccmp.cc (get_compare_parts): Remove the up argument.
	(expand_ccmp_next): Update call to get_compare_parts.
	(expand_ccmp_expr_1): Likewise.

2025-05-02  Richard Biener  <rguenther@suse.de>

	* common.opt.urls: Regenerate.

2025-05-01  Jason Merrill  <jason@redhat.com>

	* doc/invoke.texi: Add -fabi-version detail.
	* common.opt: Likewise.

2025-05-01  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (phiopt_early_allow): Only allow a sequence
	with one statement for MIN/MAX and the op was MIN/MAX.

2025-05-01  Ayan Shafqat  <ayan.x.shafqat@gmail.com>

	* config/aarch64/arm_acle.h (__sqrt, __sqrtf): New function.

2025-05-01  Ayan Shafqat  <ayan.x.shafqat@gmail.com>

	* config/aarch64/aarch64-simd-builtins.def: Change
	BUILTIN_VHSDF_DF to BUILTIN_VHSDF_HSDF.

2025-05-01  Jason Merrill  <jason@redhat.com>

	PR c++/119162
	* fold-const.cc (maybe_nonzero_address): Return 1 for non-symtab
	vars if folding_cxx_constexpr.

2025-05-01  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_conversion): Remove non-SLP
	paths.

2025-05-01  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_remove_slp_scalar_calls): Look
	at the original stmt.

2025-05-01  Jakub Jelinek  <jakub@redhat.com>

	* combine.cc (try_combine): Sets which satisfy set_noop_p can go
	to i2 unless i3 is a jump and the other set is not.

2025-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/120042
	* tree-vectorizer.h: Include dominance.h.

2025-04-30  David Malcolm  <dmalcolm@redhat.com>

	* prime-paths.cc (limit_checked_add): Remove redundant trailing
	';'.
	(enters_through_p): Likewise.

2025-04-30  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(sarif_serialization_format_json::write_to_file): New.
	(sarif_builder::m_formatted): Replace field with...
	(sarif_builder::m_serialization_format): ...this.
	(sarif_builder::sarif_builder): Update for field change.
	(sarif_builder::flush_to_file): Call m_serialization_format's
	write_to_file vfunc.
	(sarif_output_format::sarif_output_format): Replace param
	"formatted" with "serialization_format".
	(sarif_stream_output_format::sarif_output_format): Likewise.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Make a
	sarif_serialization_format_json and pass it to
	diagnostic_output_format_init_sarif.
	(diagnostic_output_format_open_sarif_file): Split out into...
	(diagnostic_output_file::try_to_open): ...this, adding
	"serialization_kind" param.
	(diagnostic_output_format_init_sarif_file): Update for new param
	to diagnostic_output_format_open_sarif_file.  Make a
	sarif_serialization_format_json and pass it to
	diagnostic_output_format_init_sarif.
	(diagnostic_output_format_init_sarif_stream): Make a
	sarif_serialization_format_json and pass it to
	diagnostic_output_format_init_sarif.
	(make_sarif_sink): Replace param "formatted" with "serialization".
	(selftest::test_make_location_object): Update for changes to
	sarif_builder ctor.
	* diagnostic-format-sarif.h (enum class sarif_serialization): New.
	(diagnostic_output_format_open_sarif_file): Add param
	"serialization_kind".
	(class sarif_serialization_format): New.
	(class sarif_serialization_format_json): New.
	(make_sarif_sink): Replace param "formatted" with
	"serialization_format".
	* diagnostic-output-file.h (diagnostic_output_file::try_to_open):
	New decl.
	* diagnostic.h (enum diagnostics_output_format): Tweak comments.
	* doc/invoke.texi (-fdiagnostics-add-output): Add "serialization"
	param to sarif scheme.
	* libgdiagnostics.cc (sarif_sink::sarif_sink): Update for change
	to make_sarif_sink.
	* opts-diagnostic.cc (sarif_scheme_handler::make_sink): Add
	"serialization" param and pass it on to make_sarif_sink.

2025-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119960
	* tree-vect-slp.cc (vect_schedule_slp_node): Sanity
	check dominance check on operand defs.

2025-04-30  Richard Biener  <rguenther@suse.de>

	Revert:
	2025-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119960
	* tree-vect-slp.cc (vect_slp_can_convert_to_external):
	Handle cases where defs from multiple BBs are ordered
	by their dominance relation.

2025-04-30  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (get_later_stmt): Robustify against
	stmts in different BBs, assert when they are unordered.

2025-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119960
	* tree-vect-slp.cc (vect_slp_can_convert_to_external):
	Handle cases where defs from multiple BBs are ordered
	by their dominance relation.

2025-04-30  Richard Biener  <rguenther@suse.de>

	PR ipa/120006
	* tree-ssa-structalias.cc (find_func_clobbers): Handle
	strdup, strndup, realloc, index, strchr, strrchr, memchr,
	strstr, strpbrk builtins like find_func_aliases does.

2025-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120003
	* tree-ssa-threadbackward.cc (back_threader::find_paths_to_names):
	Allow block re-use but do not enlarge the path beyond such a
	re-use.

2025-04-30  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2025-04-30  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (xload_<mode>_libgcc): Clobber R21, Z.

2025-04-30  Kito Cheng  <kito.cheng@sifive.com>

	PR target/119832
	* config/riscv/riscv.cc (riscv_dynamic_frm_mode_p): New.
	(riscv_mode_confluence): New.
	(TARGET_MODE_CONFLUENCE): Define to riscv_mode_confluence.

2025-04-30  Jerry Zhang Jian  <jerry.zhangjian@sifive.com>

	* common/config/riscv/riscv-common.cc: Add Zve32x depends on Zicsr

2025-04-30  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64.cc (aarch64_emit_sve_pred_move):
	Fold LD1/ST1 with ptrue to LDR/STR for 128-bit VLS.

2025-04-30  yulong  <shiyulong@iscas.ac.cn>

	* config/riscv/constraints.md (Ou01): New constraint.
	(Ou02): Ditto.
	* config/riscv/generic-vector-ooo.md (vec_sf_vcp): New reservation.
	* config/riscv/genrvv-type-indexer.cc (main): New type.
	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Add xsfvcp strings.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct sf_vcix_se_def):
	New function.
	(struct sf_vcix_def): Ditto.
	(SHAPE): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_X2_U_OPS): New type.
	(DEF_RVV_X2_WU_OPS): Ditto.
	(vuint8mf8_t): Ditto.
	(vuint8mf4_t): Ditto.
	(vuint8mf2_t): Ditto.
	(vuint8m1_t): Ditto.
	(vuint8m2_t): Ditto.
	(vuint8m4_t): Ditto.
	(vuint16mf4_t): Ditto.
	(vuint16mf2_t): Ditto.
	(vuint16m1_t): Ditto.
	(vuint16m2_t): Ditto.
	(vuint16m4_t): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_X2_U_OPS): New builtins
	def.
	(DEF_RVV_X2_WU_OPS): Ditto.
	(rvv_arg_type_info::get_scalar_float_type): Ditto.
	(function_instance::modifies_global_state_p): Ditto.
	* config/riscv/riscv-vector-builtins.def (v_x): New base type.
	(i): Ditto.
	(v_i): Ditto.
	(xv): Ditto.
	(iv): Ditto.
	(fv): Ditto.
	(vvv): Ditto.
	(xvv): Ditto.
	(ivv): Ditto.
	(fvv): Ditto.
	(vvw): Ditto.
	(xvw): Ditto.
	(ivw): Ditto.
	(fvw): Ditto.
	(v_vv): Ditto.
	(v_xv): Ditto.
	(v_iv): Ditto.
	(v_fv): Ditto.
	(v_vvv): Ditto.
	(v_xvv): Ditto.
	(v_ivv): Ditto.
	(v_fvv): Ditto.
	(v_vvw): Ditto.
	(v_xvw): Ditto.
	(v_ivw): Ditto.
	(v_fvw): Ditto.
	(x2_vector): Ditto.
	(scalar_float): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext): New extension.
	(required_ext_to_isa_name): Ditto.
	(required_extensions_specified): Ditto.
	(struct rvv_arg_type_info): Ditto.
	(struct function_group_info): Ditto.
	* config/riscv/riscv.md: New attr.
	* config/riscv/sifive-vector-builtins-bases.cc (class sf_vc): New function.
	(BASE): New base_name.
	* config/riscv/sifive-vector-builtins-bases.h: New function_base.
	* config/riscv/sifive-vector-builtins-functions.def
	(REQUIRED_EXTENSIONS): New intrinsics def.
	(sf_vc): Ditto.
	* config/riscv/sifive-vector.md (@sf_vc_x_se<mode>): New RTL mode.
	(@sf_vc_v_x_se<mode>): Ditto.
	(@sf_vc_v_x<mode>): Ditto.
	(@sf_vc_i_se<mode>): Ditto.
	(@sf_vc_v_i_se<mode>): Ditto.
	(@sf_vc_v_i<mode>): Ditto.
	(@sf_vc_vv_se<mode>): Ditto.
	(@sf_vc_v_vv_se<mode>): Ditto.
	(@sf_vc_v_vv<mode>): Ditto.
	(@sf_vc_xv_se<mode>): Ditto.
	(@sf_vc_v_xv_se<mode>): Ditto.
	(@sf_vc_v_xv<mode>): Ditto.
	(@sf_vc_iv_se<mode>): Ditto.
	(@sf_vc_v_iv_se<mode>): Ditto.
	(@sf_vc_v_iv<mode>): Ditto.
	(@sf_vc_fv_se<mode>): Ditto.
	(@sf_vc_v_fv_se<mode>): Ditto.
	(@sf_vc_v_fv<mode>): Ditto.
	(@sf_vc_vvv_se<mode>): Ditto.
	(@sf_vc_v_vvv_se<mode>): Ditto.
	(@sf_vc_v_vvv<mode>): Ditto.
	(@sf_vc_xvv_se<mode>): Ditto.
	(@sf_vc_v_xvv_se<mode>): Ditto.
	(@sf_vc_v_xvv<mode>): Ditto.
	(@sf_vc_ivv_se<mode>): Ditto.
	(@sf_vc_v_ivv_se<mode>): Ditto.
	(@sf_vc_v_ivv<mode>): Ditto.
	(@sf_vc_fvv_se<mode>): Ditto.
	(@sf_vc_v_fvv_se<mode>): Ditto.
	(@sf_vc_v_fvv<mode>): Ditto.
	(@sf_vc_vvw_se<mode>): Ditto.
	(@sf_vc_v_vvw_se<mode>): Ditto.
	(@sf_vc_v_vvw<mode>): Ditto.
	(@sf_vc_xvw_se<mode>): Ditto.
	(@sf_vc_v_xvw_se<mode>): Ditto.
	(@sf_vc_v_xvw<mode>): Ditto.
	(@sf_vc_ivw_se<mode>): Ditto.
	(@sf_vc_v_ivw_se<mode>): Ditto.
	(@sf_vc_v_ivw<mode>): Ditto.
	(@sf_vc_fvw_se<mode>): Ditto.
	(@sf_vc_v_fvw_se<mode>): Ditto.
	(@sf_vc_v_fvw<mode>): Ditto.
	* config/riscv/vector-iterators.md: New iterator.
	* config/riscv/vector.md: New vtype.

2025-04-29  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-cp.cc (cs_interesting_for_ipcp_p): Fix handling of uninitialized
	counts and 0 IPA cost wrt flag_profile_partial_training.

2025-04-29  Pengfei Li  <Pengfei.Li2@arm.com>

	* simplify-rtx.cc (non_paradoxical_subreg_not_p): New function
	for pattern match of (subreg (not X)).
	(simplify_with_subreg_not): New function for simplification.

2025-04-29  Uros Bizjak  <ubizjak@gmail.com>

	PR target/111657
	* config/i386/i386-expand.cc (alg_usable_p): For Pmode != word_mode
	reject rep_prefix_{1,4,8}_byte algorithms with src_as in the
	non-default address space.
	* config/i386/i386-protos.h (ix86_check_movs): New prototype.
	* config/i386/i386.cc (ix86_check_movs): New function.
	(ix86_print_operand) [case '^']: Remove excess check for TARGET_64BIT.
	* config/i386/i386.md (strmov): For Pmode != word_mode expand with
	gen_strmov_single only when operands[3] (source) is in the default
	address space.
	(*strmovdi_rex_1) Use ix86_check_movs.  Remove %^ from asm template.
	(*strmovsi_1): Ditto.
	(*strmovhi_1): DItto.
	(*strmovqi_1): Ditto.
	(*rep_movdi_rex64): Ditto.
	(*rep_movsi): Ditto.
	(*rep_movqi): Ditto.

2025-04-29  Zhijin Zeng  <zengzhijin@linux.spacemit.com>

	* config/riscv/riscv.cc (riscv_register_move_cost): Use
	reg_class_subset_p to check the reg class.

2025-04-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119997
	* vec.h (vec<T, A, vl_embed>::last): Provide const overload.
	(vec<T, va_heap, vl_ptr>::last): Likewise.
	* tree-ssa-sccvn.h (vn_pp_nary_for_addr): Declare.
	* tree-ssa-sccvn.cc (vn_pp_nary_for_addr): Split out from ...
	(vn_reference_lookup): ... here.
	(vn_reference_insert): ... and duplicate here.  Do not handle
	zero offset as POINTER_PLUS_EXPR.
	* tree-ssa-pre.cc (compute_avail): Implement
	ADDR_EXPR-as-POINTER_PLUS_EXPR special casing.

2025-04-29  Uros Bizjak  <ubizjak@gmail.com>

	PR target/111657
	* config/i386/i386-expand.cc (alg_usable_p): Remove have_as bool
	argument and add dst_as and src_as address space arguments.  Reject
	libcall algorithm with dst_as and src_as in the non-default address
	spaces.  Reject rep_prefix_{1,4,8}_byte algorithms with dst_as in
	the non-default address space.
	(decide_alg): Remove have_as bool argument and add dst_as and src_as
	address space arguments.  Update calls to alg_usable_p.
	(ix86_expand_set_or_cpymem): Update call to decide_alg.
	* config/i386/i386.md (strmov): Do not fail if operand[3] (source)
	is in the non-default address space.  Expand with gen_strmov_singleop
	only when operand[1] (destination) is in the default address space.
	(*strmovdi_rex_1): Determine memory operands from insn pattern.
	Allow only when destination is in the default address space.
	Rewrite asm template to use explicit operands.
	(*strmovsi_1): Ditto.
	(*strmovhi_1): DItto.
	(*strmovqi_1): Ditto.
	(*rep_movdi_rex64): Ditto.
	(*rep_movsi): Ditto.
	(*rep_movqi): Ditto.
	(*strsetdi_rex_1): Determine memory operands from insn pattern.
	Allow only when destination is in the default address space.
	(*strsetsi_1): Ditto.
	(*strsethi_1): Ditto.
	(*strsetqi_1): Ditto.
	(*rep_stosdi_rex64): Ditto.
	(*rep_stossi): Ditto.
	(*rep_stosqi): Ditto.

2025-04-29  H.J. Lu  <hjl.tools@gmail.com>

	PR target/119985
	* target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference.
	* doc/tm.texi: Regenerated.

2025-04-29  hongtao.liu  <hongtao.liu@intel.com>

	PR gcov-profile/118581
	* auto-profile.cc (autofdo_source_profile::get_count_info):
	Overload the function with parameter gimple location instead
	of stmt.
	(afdo_set_bb_count): For !has_annotated BB, Check single
	successors PHIs corresponding to the block and use those
	count.

2025-04-29  Richard Biener  <rguenther@suse.de>

	PR debug/78685
	* doc/invoke.texi (-Og): Reword.

2025-04-29  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.cc (ix86_update_stack_alignment): Skip sub-RTXes
	of the memory operand if stack access register is not mentioned in
	the operand.

2025-04-29  H.J. Lu  <hjl.tools@gmail.com>

	PR target/92080
	PR target/117839
	* config/i386/i386-features.cc (ix86_place_single_vector_set):
	New function.
	(remove_partial_avx_dependency): Use it.
	(ix86_get_vector_load_mode): New function.
	(replace_vector_const): Likewise.
	(remove_redundant_vector_load): Likewise.
	(pass_data_remove_redundant_vector_load): Likewise.
	(pass_remove_redundant_vector_load): Likewise.
	(make_pass_remove_redundant_vector_load): Likewise.
	* config/i386/i386-passes.def: Add
	pass_remove_redundant_vector_load after
	pass_remove_partial_avx_dependency.
	* config/i386/i386-protos.h
	(make_pass_remove_redundant_vector_load): New.
	* config/i386/i386.cc (ix86_modes_tieable_p): Return true for
	narrower non-scalar-integer modes in SSE registers.

2025-04-29  H.J. Lu  <hjl.tools@gmail.com>

	PR target/117547
	* config/i386/i386-expand.cc (ix86_expand_unsigned_small_int_cst_argument):
	New function.
	(ix86_expand_args_builtin): Call
	ix86_expand_unsigned_small_int_cst_argument to expand the argument
	before calling fixup_modeless_constant.
	(ix86_expand_round_builtin): Likewise.
	(ix86_expand_special_args_builtin): Likewise.
	(ix86_expand_builtin): Likewise.

2025-04-29  liuhongt  <hongtao.liu@intel.com>

	* config/i386/x86-tune.def (X86_TUNE_DEST_FALSE_DEP_FOR_GLC):
	Remove other processor except for GLC since this one is only
	for GLC.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/97111
	* doc/invoke.texi: Add -Wanalyzer-throw-of-unexpected-type.
	* gimple.h (gimple_call_nothrow_p): Make arg const.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc: Drop include of "make-unique.h".
	Replace uses of ::make_unique with std::make_unique.
	* diagnostic-format-sarif.cc: Likewise.
	* diagnostic-format-text.cc: Likewise.
	* diagnostic.cc: Likewise.
	* dumpfile.cc: Likewise.
	* gcc-attribute-urlifier.cc: Likewise.
	* gcc-urlifier.cc: Likewise.
	* json-parsing.cc: Likewise.
	* json.cc: Likewise.
	* lazy-diagnostic-path.cc: Likewise.
	* libgdiagnostics.cc: Likewise.
	* libsarifreplay.cc: Likewise.
	* lto-wrapper.cc: Likewise.
	* make-unique.h: Delete.
	* opts-diagnostic.cc: Drop include of "make-unique.h".
	Replace uses of ::make_unique with std::make_unique.
	* pretty-print.cc: Likewise.
	* text-art/style.cc: Likewise.
	* text-art/styled-string.cc: Likewise.
	* text-art/table.cc: Likewise.
	* text-art/tree-widget.cc: Likewise.
	* text-art/widget.cc: Likewise.
	* timevar.cc: Likewise.
	* toplev.cc: Likewise.
	* tree-diagnostic-client-data-hooks.cc: Likewise.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	* pass_manager.h (class pass_manager): Add "m_" prefix to all pass
	fields.
	* passes.cc (pass_manager::execute_early_local_passes): Update
	for added "m_" prefix.
	(pass_manager::execute_pass_mode_switching): Likewise.
	(pass_manager::finish_optimization_passes): Likewise.
	(pass_manager::pass_manager): Likewise.
	(pass_manager::dump_profile_report): Likewise.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.h (diagnostic_context::m_opt_permissive): Convert
	from int to diagnostic_option_id.  Update comment.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.h (diagnostic_context::set_abort_on_error): New.
	(diagnostic_context::m_abort_on_error): Make private.
	(diagnostic_abort_on_error): Delete.
	* opts.cc (setup_core_dumping): Update for above changes.

2025-04-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_builder::get_opts): New
	accessor.
	(sarif_builder::get_version): Update for...
	(sarif_builder::m_version): Replace this field...
	(sarif_builder::m_m_sarif_gen_opts): ...with this.
	(sarif_builder::sarif_builder): Replace version with
	sarif_gen_opts throughout.
	(sarif_builder::make_top_level_object): Use get_version.
	(sarif_output_format::sarif_output_format): Replace version with
	sarif_gen_opts throughout.
	(sarif_stream_output_format::sarif_stream_output_format):
	Likewise.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Drop version param
	and use default for sarif_generation_options instead.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(make_sarif_sink): Replace version with sarif_gen_opts throughout.
	(sarif_generation_options::sarif_generation_options): New.
	(selftest::test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Replace version with sarif_gen_opts throughout.
	(selftest::test_make_location_object): Likewise.
	(selftest::test_simple_log): Likewise.
	(selftest::test_simple_log_2): Likewise.
	(selftest::test_message_with_embedded_link): Likewise.
	(selftest::test_message_with_braces): Likewise.
	(selftest::test_buffering): Likewise.
	(selftest::run_tests_per_version): Replace with...
	(selftest::for_each_sarif_gen_option): ...this...
	(selftest::run_line_table_case_tests_per_version): ...and this.
	(selftest::diagnostic_format_sarif_cc_tests): Update to use
	for_each_sarif_gen_option and
	run_line_table_case_tests_per_version.
	* diagnostic-format-sarif.h (enum class sarif_version): Move lower
	down.
	(diagnostic_output_format_init_sarif_stderr): Drop "version"
	param.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(struct sarif_generation_options): New.
	(make_sarif_sink): Add "formatted" param.  Replace version param
	with sarif_gen_opts.
	* diagnostic.cc (diagnostic_output_format_init): Drop hardcoded
	sarif_version::v2_1_0 arguments from calls, which instead use
	the default ctor for sarif_generation_options internally.
	* libgdiagnostics.cc (sarif_sink::sarif_sink): Replace version
	param with sarif_gen_opts, and update for changes to
	make_sarif_sink.
	(diagnostic_manager_add_sarif_sink): Use sarif_gen_opts rather
	than version.
	* opts-diagnostic.cc (sarif_scheme_handler::make_sink): Likewise.
	Pass "true" for "formatted" param.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	* value-relation.cc (value_relation::swap): New.
	(value_relation::negate): Remove.
	(dom_oracle::next_relation): New.
	(block_relation_iterator::block_relation_iterator): New.
	(block_relation_iterator::get_next_relation): New.
	(dom_oracle::dump): Use iterator.
	* value-relation.h (relation_oracle::next_relation): New.
	(dom_oracle::next_relation): New prototype.
	(class block_relation_iterator): New.
	(FOR_EACH_RELATION_BB): New.
	(FOR_EACH_RELATION_NAME): New.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	* range-op-ptr.cc (range_operator::lhs_op1_relation): Add
	prange/prange/irange (PPI) default.
	(pointer_plus_operator::lhs_op1_relation): New.
	* range-op.cc (range_op_handler::lhs_op1_relation): Add RO_PPI case.
	* range-op.h (range_op_handler::lhs_op1_relation): Add prototype.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-fold.cc (fold_using_range::range_of_range_op): Use a
	new local variable for intermediate relation results.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::apply_inferred_ranges): Pass
	'this' as the range-query to the inferred range constructor.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/95801
	* range-op.cc (operator_div::op2_range): New.

2025-04-28  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/119712
	* value-range.cc (range_bitmask::adjust_range): Delete.
	(irange::set_range_from_bitmask): Integrate adjust_range.
	(irange::update_bitmask): Do nothing if bitmask doesnt change.
	(irange:intersect_bitmask): Do not call adjust_range. Exit if there
	is no second bitmask.
	* value-range.h (adjust_range): Remove prototype.

2025-04-28  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/67797
	* tree-tailcall.cc (find_tail_calls): Add support for ERF_RETURNS_ARG.

2025-04-28  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-cfg.cc (verify_gimple_cond): Error out if the comparison
	throws.

2025-04-28  Andrew Pinski  <quic_apinski@quicinc.com>

	PR c/119432
	* tree-pretty-print.cc (op_symbol_code): For LROTATE_EXPR,
	output __ROTATE_LEFT for gimple.
	For RROTATE_EXPR output __ROTATE_RIGHT for gimple.

2025-04-28  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl.h (native_decode_int): Declare.
	* simplify-rtx.cc (native_decode_int): New function, split out from...
	(native_decode_rtx): ...here.

2025-04-28  H.J. Lu  <hjl.tools@gmail.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR target/109780
	PR target/109093
	* config/i386/i386.cc (stack_access_data): New.
	(ix86_update_stack_alignment): Likewise.
	(ix86_find_all_reg_use_1): Likewise.
	(ix86_find_all_reg_use): Likewise.
	(ix86_find_max_used_stack_alignment): Also check memory accesses
	from registers defined by stack or frame registers.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR ipa/119973
	* tree-ssa-structalias.cc (create_variable_info_for):
	Build constraints from DECL_INITIAL directly rather than
	the IPA reference list which is incomplete.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR lto/113207
	* ipa-free-lang-data.cc (fld_type_variant): Add extra checking.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119044
	* tree-predcom.cc (ref_at_iteration): Copy alias info
	from the original ref.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119103
	* tree-ssa-loop-im.cc (in_loop_pipeline): Globalize.
	(compute_invariantness): Override costing when we run
	right before PRE and PRE is enabled.
	(pass_lim::execute): Adjust.
	* tree-vect-patterns.cc (vect_determine_precisions_from_users):
	For variable shift amounts use range information.

2025-04-28  Richard Biener  <rguenther@suse.de>

	* genmatch.cc (::gen_transform): Add in_place parameter.
	Assert it isn't set in unexpected places.
	(possible_noop_convert): New.
	(expr::gen_transform): Support in_place and emit code to
	compute a child in-place when the operation is a conversion.
	(dt_simplify::gen_1): Arrange for an outermost conversion
	to be elided by generating the transform of the operand
	in-place.
	* match.pd (__real cepxi (x) -> cos (x)): Use single_use.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/60779
	* common.opt (fcx-method=): New, map to flag_complex_method.
	(Enum complex_method): New.
	(fcx-limited-range): Alias to -fcx-method=limited-range.
	(fcx-fortran-rules): Alias to -fcx-medhot=fortran.
	* ipa-inline-transform.cc (inline_call): Check flag_complex_method.
	* ipa-inline.cc (can_inline_edge_by_limits_p): Likewise.
	* opts.cc (finish_options): Adjust.
	(set_fast_math_flags): Likewise.
	* doc/invoke.texi (fcx-method=): Document.

2025-04-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/116083
	* stor-layout.cc (layout_type): Compute TYPE_SIZE and
	TYPE_SIZE_UNIT for vector types from the component mode
	sizes.

2025-04-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_analyze_loop_operations): Prune
	all actual analysis and only fail when we discover a not
	SLP covered stmt.
	(vect_analyze_loop_2): Remove path trying without SLP.

2025-04-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_loop_kill_debug_uses): Remove.
	(maybe_set_vectorized_backedge_value): Likewise.
	(vect_transform_loop_stmt): Likewise.  Move dump printing
	to vect_transform_stmt.
	(vect_transform_loop): Remove loop over loop stmts transforming
	them, but retain some DCE code still necessary.
	* tree-vect-stmts.cc (vect_transform_stmt): Dump that
	we're vectorizing a stmt.

2025-04-28  Richard Biener  <rguenther@suse.de>

	* params.opt (--param=vect-force-slp): Remove.
	* doc/invoke.texi (--param=vect-force-slp): Likewise.
	* tree-vect-loop.cc (vect_analyze_loop_2): Assume
	param_vect_force_slp is 1.
	* tree-vect-stmts.cc (vect_analyze_stmt): Likewise.

2025-04-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119493
	* tree-tailcall.cc (find_tail_calls): Handle non-gimple_reg_type
	arguments which aren't just passed through for tail recursions
	even for non-musttail calls.

2025-04-28  LIU Hao  <lh_mouse@126.com>

	PR target/111107
	* config/i386/cygming.h (STACK_REALIGN_DEFAULT): Copy from sol2.h.

2025-04-27  H.J. Lu  <hjl.tools@gmail.com>

	PR c/48274
	PR middle-end/112877
	PR middle-end/118288
	* gimple.cc (gimple_builtin_call_types_compatible_p): Remove the
	targetm.calls.promote_prototypes call.
	* tree.cc (tree_builtin_call_types_compatible_p): Likewise.

2025-04-27  H.J. Lu  <hjl.tools@gmail.com>

	PR middle-end/112877
	* calls.cc (initialize_argument_information): Promote small integer
	arguments if TARGET_PROMOTE_PROTOTYPES returns true.

2025-04-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Extract
	const vector stepped into separated func.
	(expand_const_vector_single_step_npatterns): Add new func
	to take care of single step.
	(expand_const_vector_interleaved_stepped_npatterns): Add new
	func to take care of interleaved step.
	(expand_const_vector_stepped): Add new func to take care of
	const vector stepped.

2025-04-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_const_vector_duplicate_repeating):
	Add new func to take care of vector duplicate with repeating.
	(expand_const_vector_duplicate_default): Add new func to take
	care of default const vector duplicate.
	(expand_const_vector_duplicate): Add new func to take care
	of all const vector duplicate.
	(expand_const_vector): Extract const vector duplicate into
	separated function.

2025-04-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
	func to take care of the const vec_series.
	(expand_const_vector): Extract const vec_series into separated
	function.

2025-04-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Extract
	const vec_duplicate into separated function.
	(expand_const_vec_duplicate): Add new func to take care
	of the const vec_duplicate.

2025-04-27  liuhongt  <hongtao.liu@intel.com>

	PR target/119549
	* common/config/i386/i386-common.cc (ix86_handle_option):
	Refactor msse4 and mno-sse4.
	* config/i386/i386.opt (msse4): Remove RejectNegative.
	(mno-sse4): Remove the entry.
	* config/i386/i386-options.cc
	(ix86_valid_target_attribute_inner_p): Remove special code
	which handles mno-sse4.

2025-04-26  Jan Hubicka  <hubicka@ucw.cz>

	PR target/105275
	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Fix cost of FP scalar
	MAX_EXPR and MIN_EXPR

2025-04-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config.gcc (LIST): --enable-obsolete for m32c-elf.

2025-04-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* simplify-rtx.cc (simplify_context::simplify_unary_operation_1) <case ZERO_EXTEND>:
	Add simplifcation for and with a constant.

2025-04-25  Dimitar Dimitrov  <dimitar@dinux.eu>

	* doc/sourcebuild.texi: Document variadic_mi_thunk effective
	target check.

2025-04-25  Dimitar Dimitrov  <dimitar@dinux.eu>

	* doc/sourcebuild.texi: Document effective target
	using_sjlj_exceptions.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>

	* match.pd: Move `(cmp (cond @0 @1 @2) @3)` simplifcation after
	the bool comparison simplifications.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple.h (gimple_cond_make_false): Fix comment.
	(gimple_cond_make_true): Likewise.
	(gimple_cond_true_p): Fix spello for statement in comment.

2025-04-25  Jason Merrill  <jason@redhat.com>

	* common.opt: Add ABI v21.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>

	* ipa-icf.cc (sem_function::sem_function): Remove
	the obstack argument version one.
	(sem_variable::sem_variable): Likewise.
	* ipa-icf.h (sem_function): Remove ctor for
	obstack argument only one.
	(sem_variable): Likewise.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>

	* ipa-icf.cc (sem_function::init): Remove assignment of node from itself.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/119811
	* tree-ssa-phiopt.cc: Remove calls.h include.

2025-04-25  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR rtl-optimization/116479
	* modulo-sched.cc (doloop_register_get): Reject conditions with
	decrements that are not 1.

2025-04-25  Jakub Jelinek  <jakub@redhat.com>

	PR target/119873
	* config/s390/s390.cc (s390_call_saved_register_used): Don't return
	true if default definition of PARM_DECL SSA_NAME of the same register
	is passed in call saved register in the PARALLEL case either.

2025-04-25  Andrew Pinski  <quic_apinski@quicinc.com>
	    Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/119737
	* config/gcn/gcn.cc (gcn_hsa_declare_function_name): Properly
	switch sections.

2025-04-25  Yuriy Kolerov  <Yuriy.Kolerov@synopsys.com>

	PR target/119122
	* common/config/riscv/riscv-common.cc (riscv_implied_info): Add a rule
	for Zca to C implication.

2025-04-24  Jakub Jelinek  <jakub@redhat.com>
	    Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/119873
	* config/s390/s390.cc (s390_call_saved_register_used): Don't return
	true if default definition of PARM_DECL SSA_NAME of the same register
	is passed in call saved register.
	(s390_function_ok_for_sibcall): Adjust comment.

2025-04-24  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119919
	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Account
	correctly cond_expr and min/max when one of operands is 0 or -1.

2025-04-24  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/119924
	* ipa-cp.cc (update_counts_for_self_gen_clones): Use nonzero_p.
	(update_profiling_info): Likewise.
	(update_specialized_profile): Likewise.

2025-04-24  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/119610
	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
	Add a bytes_below_sp parameter and use it to calculate the CFA
	offsets.  Attach the first SVE CFA note to the move into the
	associated temporary register.
	(aarch64_allocate_and_probe_stack_space): Update calls accordingly.
	Start out with bytes_per_sp set to the frame size and decrement
	it after each allocation.

2025-04-24  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* opts.cc (validate_ipa_reorder_locality_lto_partition): Check opts
	instead of opts_set for x_flag_ipa_reorder_for_locality.
	(finish_options): Update call site.

2025-04-24  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* common.opt (LTO_PARTITION_DEFAULT): Delete.
	(flto-partition=): Change default back to balanced.
	* flag-types.h (lto_partition_model): Remove LTO_PARTITION_DEFAULT.
	* opts.cc (validate_ipa_reorder_locality_lto_partition):
	Check opts_set->x_flag_lto_partition instead of LTO_PARTITION_DEFAULT.
	(finish_options): Remove handling of LTO_PARTITION_DEFAULT.

2025-04-24  Jakub Jelinek  <jakub@redhat.com>

	PR debug/119711
	* dwarf2out.h (struct dw_val_node): Add u member.
	(struct dw_loc_descr_node): Remove dw_loc_opc, dtprel,
	frame_offset_rel and dw_loc_addr members.
	(dw_loc_opc, dw_loc_dtprel, dw_loc_frame_offset_rel, dw_loc_addr):
	Define.
	(struct dw_attr_struct): Remove dw_attr member.
	(dw_attr): Define.
	* dwarf2out.cc (loc_descr_equal_p_1): Use dw_loc_dtprel instead of
	dtprel.
	(output_loc_operands, new_addr_loc_descr, loc_checksum,
	loc_checksum_ordered): Likewise.
	(resolve_args_picking_1): Use dw_loc_frame_offset_rel instead of
	frame_offset_rel.
	(loc_list_from_tree_1): Likewise.
	(resolve_addr_in_expr): Use dw_loc_dtprel instead of dtprel.
	(copy_deref_exprloc): Copy val_class, val_entry and v members
	instead of whole dw_loc_oprnd1 and dw_loc_oprnd2.
	(optimize_string_length): Copy val_class, val_entry and v members
	instead of whole dw_attr_val.
	(hash_loc_operands): Use dw_loc_dtprel instead of dtprel.
	(compare_loc_operands, compare_locs): Likewise.

2025-04-24  liuhongt  <hongtao.liu@intel.com>

	PR target/103750
	* config/i386/sse.md (*<avx512>_cmp<mode>3_and15): New define_insn.
	(*<avx512>_ucmp<mode>3_and15): Ditto.
	(*<avx512>_cmp<mode>3_and3): Ditto.
	(*avx512vl_ucmpv2di3_and3): Ditto.
	(*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
	Change operands[3] predicate to <cmp_imm_predicate>.
	(*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
	Ditto.
	(*<avx512>_cmp<mode>3): Add GET_MODE_NUNITS (<MODE>mode) >= 8
	to the condition.
	(*<avx512>_ucmp<mode>3): Ditto.
	(V48_AVX512VL_4): New mode iterator.
	(VI48_AVX512VL_4): Ditto.
	(V8_AVX512VL_2): Ditto.

2025-04-23  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-cp.cc (base_count): Remove.
	(struct caller_statistics): Rename n_hot_calls to n_interesting_calls;
	add called_without_ipa_profile.
	(init_caller_stats): Update.
	(cs_interesting_for_ipcp_p): New function.
	(gather_caller_stats): collect n_interesting_calls and
	called_without_profile.
	(ipcp_cloning_candidate_p): Use n_interesting-calls rather then hot.
	(good_cloning_opportunity_p): Rewrite heuristics when IPA profile is
	present
	(estimate_local_effects): Update.
	(value_topo_info::propagate_effects): Update.
	(compare_edge_profile_counts): Remove.
	(ipcp_propagate_stage): Do not collect base_count.
	(get_info_about_necessary_edges): Record whether function is called
	without profile.
	(decide_about_value): Update.
	(ipa_cp_cc_finalize): Do not initialie base_count.
	* profile-count.cc (profile_count::operator*): New.
	(profile_count::operator*=): New.
	* profile-count.h (profile_count::operator*): Declare
	(profile_count::operator*=): Declare.
	* params.opt: Remove ipa-cp-profile-count-base.
	* doc/invoke.texi: Likewise.

2025-04-23  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Cost truth_value
	exprs.

2025-04-23  liuhongt  <hongtao.liu@intel.com>

	* config/i386/predicates.md (vector_or_0_or_1s_operand): New predicate.
	(nonimm_or_0_or_1s_operand): Ditto.
	* config/i386/sse.md (vcond_mask_<mode><sseintvecmodelower>):
	Extend the predicate of operands1 to accept 0 or allones
	operands.
	(vcond_mask_<mode><sseintvecmodelower>): Ditto.
	(vcond_mask_v1tiv1ti): Ditto.
	(vcond_mask_<mode><sseintvecmodelower>): Ditto.
	* config/i386/i386.md (mov<mode>cc): Ditto for operands[2] and
	operands[3].
	* config/i386/i386-expand.cc (ix86_expand_sse_fp_minmax):
	Force immediate_operand to register.

2025-04-22  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Add special cases
	for COND_EXPR; make MIN_EXPR, MAX_EXPR, ABS_EXPR and ABSU_EXPR more realistic.

2025-04-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/119327
	* config/rs6000/rs6000.cc (rs6000_can_inline_p): Ignore also
	OPTION_MASK_SAVE_TOC_INDIRECT differences.

2025-04-22  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_FAMINMAX.

2025-04-22  Spencer Abson  <spencer.abson@arm.com>

	* tree-vect-loop.cc (vectorizable_induction): Add target support
	checks for vectorized MULT_EXPR and FLOAT_EXPR where necessary for
	scalable types.
	Prefer target_supports_op_p over directly_supports_p for these tree
	codes.
	(vectorizable_nonlinear_induction): Fix a doc comment while I'm
	here.

2025-04-22  Spencer Abson  <spencer.abson@arm.com>

	* config/aarch64/aarch64.md: Update cbranch, cstore, fcmp
	and fcmpe to use the GPF_F16 iterator for floating-point
	modes.

2025-04-22  Spencer Abson  <spencer.abson@arm.com>

	PR target/117013
	* config/aarch64/aarch64-protos.h (aarch64_expand_fp_spaceship):
	Declare optab expander function for floating-point types.
	* config/aarch64/aarch64.cc (aarch64_expand_fp_spaceship):
	Define optab expansion for floating-point types (new function).
	* config/aarch64/aarch64.md (spaceship<mode>4):
	Add define_expands for spaceship<mode>4 on integer and
	floating-point types.

2025-04-22  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/aarch64-cores.def (olympus): Add fp8fma, fp8dot4
	explicitly.

2025-04-22  Yixuan Chen  <chenyixuan@iscas.ac.cn>

	* config/riscv/riscv-cores.def (RISCV_TUNE): Add xt-c908, xt-c908v,
	xt-c910, xt-c910v2, xt-c920, xt-c920v2.
	(RISCV_CORE): Add xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c920,
	xt-c920v2.
	* doc/invoke.texi: Add xt-c908, xt-c908v, xt-c910, xt-c910v2,
	xt-c920, xt-c920v2.

2025-04-22  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* doc/invoke.texi (lto-partition-locality-frequency-cutoff,
	lto-partition-locality-size-cutoff, lto-max-locality-partition):
	Document.

2025-04-22  Alexandre Oliva  <oliva@adacore.com>

	PR target/118182
	* config/riscv/vector.md (@pred_broadcast<mode>): Expand to
	_zero and _imm variants without vec_duplicate.

2025-04-21  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119879
	* config/i386/i386.cc (fp_conversion_stmt_cost): Inline to ...
	(ix86_vector_costs::add_stmt_cost): ... here; fix handling of NOP_EXPR.

2025-04-21  Matthew Fortune  <matthew.fortune@imgtec.com>

	* config/mips/mips.cc (mips_option_override): Error out for
	-mmicromips -mmsa.

2025-04-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/119507
	* except.cc (switch_to_exception_section): Don't use the cached section if
	the current function is in comdat.

2025-04-21  Andrew Pinski  <quic_apinski@quicinc.com>

	* vec.h (array_slice::begin): Assert that the
	slice is valid.
	(array_slice::end): Likewise.

2025-04-21  hongtao.liu  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc (ix86_emit_swdivsf): Generate 2
	FMA instructions when TARGET_FMA.

2025-04-19  Jeff Law  <jlaw@ventanamicro.com>

	PR target/119865
	* config/riscv/riscv.cc (parse_features_for_version): Do not
	explicitly free the architecture string.

2025-04-19  Jeff Law  <jlaw@ventanamicro.com>

	PR target/118410
	* config/riscv/bitmanip.md (logical with constant argument): New
	splitter for cases where synthesizing ~C is cheaper than synthesizing
	the original constant C.

2025-04-19  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.cc (vec_fp_conversion_cost): New function.
	(ix86_rtx_costs): Use it for SSE/AVX FP conversoins.
	(ix86_builtin_vectorization_cost): Fix indentation;
	and use vec_fp_conversion_cost in vec_promote_demote.
	(fp_conversion_stmt_cost): New function.
	(ix86_vector_costs::add_stmt_cost): Use it to cost NOP_EXPR
	and vec_promote_demote.
	* config/i386/i386.h (struct processor_costs):
	* config/i386/x86-tune-costs.h (struct processor_costs):

2025-04-19  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/111949
	* combine.cc (find_split_point): Add a split point
	for `(and (not X) Y)` if not in the outer set already.

2025-04-19  Jiaxun Yang  <jiaxun.yang@flygoat.com>

	PR target/111814
	* config/sh/sh-modes.def (RESET_FLOAT_FORMAT): Use mips format.
	(FLOAT_MODE): Use mips mode.

2025-04-19  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha.cc
	(alpha_get_mem_rtx_alignment_and_offset): Recurse into
	COMPONENT_REF nodes.

2025-04-18  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (*bext<mode>_mask_pos): New pattern
	for extracting a single bit at masked bit position.

2025-04-18  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/87901
	* tree-ssa-dse.cc (maybe_trim_constructor_store): Add was_integer_cst argument.
	Check for was_integer_cst instead of `{}` when was_integer_cst is true.
	(maybe_trim_partially_dead_store): Handle INTEGER_CST stores of 0 as stores of `{}`.
	Udpate call to maybe_trim_constructor_store for CONSTRUCTOR.

2025-04-18  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/87901
	* tree-ssa-dse.cc (maybe_trim_constructor_store): Strip over useless type
	conversions after taking the address of the MEM_REF.

2025-04-18  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118902
	* fold-const.cc (tree_swap_operands_p): Place invariants in the first operand
	if not used with constants.

2025-04-18  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118947
	* gimple-fold.cc (optimize_memcpy_to_memset): Walk back until we get a
	statement that may clobber the read.

2025-04-18  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/78408
	PR tree-optimization/118947
	* gimple-fold.cc (optimize_memcpy_to_memset): Handle STRING_CST case too.

2025-04-18  Richard Braun  <rbraun@sceen.net>

	* config/c6x/c6x.h (ASM_PREFERRED_EH_DATA_FORMAT): Remove the
	DW_EH_PE_indirect flag.

2025-04-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119858
	* tree-vect-loop.cc (vectorizable_live_operation): Convert
	pointer offset to sizetype.

2025-04-18  Hakan Candar  <hakancandar@protonmail.com>

	* config.gcc: Recognize riscv*-*-gnu* targets.
	* config/riscv/gnu.h: New file.

2025-04-18  Alexey Merzlyakov  <alexey.merzlyakov@samsung.com>

	PR middle-end/108016
	PR middle-end/108016
	* config/riscv/riscv.md (addv<mode>4, uaddv<mode>4, subv<mode>4,
	usubv<mode>4): Tunes for unnecessary sext.w elimination.

2025-04-18  kelefth  <konstantinos.eleftheriou@vrull.eu>

	PR rtl-optimization/119160
	* avoid-store-forwarding.cc (process_store_forwarding):
	Zero-extend the value stored in the base register, in case
	of load-elimination, only when the mode of the destination
	is wider.

2025-04-18  kelefth  <konstantinos.eleftheriou@vrull.eu>

	* doc/cfg.texi: Update the exception handling section for the
	REG_EH_REGION notes to make it clear that the note is attached
	to the instruction throwing the exception.

2025-04-17  翁愷邑  <kaiweng9487@gmail.com>

	* config/riscv/riscv-target-attr.cc
	(riscv_target_attr_parser::update_settings):
	Do not manually free any arch string.

2025-04-17  Eric Botcazou  <ebotcazou@gcc.gnu.org>

	* tree.def (BOOLEAN_TYPE): Add more details.

2025-04-17  Sam James  <sam@gentoo.org>

	* doc/invoke.texi: Use "compatible types" term. Rephrase to be
	more precise (and correct).

2025-04-17  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/119351
	* tree-vect-stmts.cc (vectorizable_early_exit): Mask both operands of
	the gcond for partial masking support.

2025-04-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/119834
	* config/s390/s390.md (define_split after *cpymem_short): Use
	(clobber (match_scratch N)) instead of (clobber (scratch)).  Use
	(match_dup 4) and operands[4] instead of (match_dup 3) and operands[3]
	in the last of those.
	(define_split after *clrmem_short): Use (clobber (match_scratch N))
	instead of (clobber (scratch)).
	(define_split after *cmpmem_short): Likewise.

2025-04-17  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.cc (TARGET_ASM_NEED_VAR_DECL_BEFORE_USE):
	Don't '#define'.

2025-04-17  Hans-Peter Nilsson  <hp@axis.com>

	* combine.cc: Correct comments about combine_validate_cost.

2025-04-16  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/88382
	* doc/extend.texi (Syntax Extensions): Adjust menu.
	(Raw String Literals): New section.

2025-04-16  Keith Packard  <keithp@keithp.com>

	* config/rx/rx.md (cmpstrnsi): Allow constant length.  For
	static length 0, just store 0 into the output register.
	For dynamic zero, set C/Z appropriately.
	(rxcmpstrn): No longer set C/Z.

2025-04-16  Eric Botcazou  <ebotcazou@gcc.gnu.org>

	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Do not
	bypass the int_fits_type_p test for boolean types whose precision
	is not 1.

2025-04-16  Sandra Loosemore  <sloosemore@baylibre.com>

	* common.opt.urls: Regenerated.

2025-04-16  Ard Biesheuvel  <ardb@kernel.org>

	PR target/119386
	* config/i386/i386-options.cc: Permit -mnop-mcount when
	using -fpic with PLTs.

2025-04-16  Ard Biesheuvel  <ardb@kernel.org>

	PR target/119386
	* config/i386/i386.cc (x86_print_call_or_nop): Add @PLT suffix
	where appropriate.
	(x86_function_profiler): Fall through to x86_print_call_or_nop()
	for PIC codegen when flag_plt is set.

2025-04-16  Sandra Loosemore  <sloosemore@baylibre.com>

	PR driver/90465
	* doc/invoke.texi (Overall Options): Add a @cindex for -Q in
	connection with --help=.
	(Developer Options): Point at --help= documentation for the
	other use of -Q.

2025-04-16  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/97106
	* config/nvptx/nvptx.cc (nvptx_asm_output_def_from_decls)
	[ACCEL_COMPILER]: Make sure to emit C++ constructor, destructor
	aliases.

2025-04-16  Jan Hubicka  <hubicka@ucw.cz>

	PR tree-optimization/119614
	* ipa-prop.cc (ipa_write_return_summaries): New function.
	(ipa_record_return_value_range_1): Break out from ....
	(ipa_record_return_value_range): ... here.
	(ipa_read_return_summaries): New function.
	(ipa_prop_read_section): Read return summaries.
	(read_ipcp_transformation_info): Read return summaries.
	(ipcp_write_transformation_summaries): Write return summaries;
	do not stream stray 0.

2025-04-16  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/119351
	* tree-vectorizer.h (LOOP_VINFO_MASK_NITERS_PFA_OFFSET,
	LOOP_VINFO_NON_LINEAR_IV): New.
	(class _loop_vec_info): Add mask_skip_niters_pfa_offset and
	nonlinear_iv.
	* tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize them.
	(vect_analyze_scalar_cycles_1): Record non-linear inductions.
	(vectorizable_induction): If early break and PFA using masking create a
	new phi which tracks where the scalar code needs to start...
	(vectorizable_live_operation): ...and generate the adjustments here.
	(vect_use_loop_mask_for_alignment_p): Reject non-linear inductions and
	early break needing peeling.

2025-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/119808
	* gimple-lower-bitint.cc (gimple_lower_bitint): Don't set
	m_single_use_names bits for SSA_NAMEs which have single use but
	their SSA_NAME_DEF_STMT is a copy from another SSA_NAME which doesn't
	have a single use, or single use which is such a copy etc.

2025-04-16  Jesse Huang  <jesse.huang@sifive.com>

	* config/riscv/riscv.cc (riscv_file_end): Fix .p2align value.

2025-04-16  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.h (JUMP_TABLES_IN_TEXT_SECTION): Check if
	large code model.

2025-04-16  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-sve.md (vec_extract<vpred><Vel>): Fix operand
	order to gen_vcond_mask_*.

2025-04-16  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_valid_sysreg_name_p): Remove feature check.
	(aarch64_retrieve_sysreg): Ditto.

2025-04-15  Sandra Loosemore  <sloosemore@baylibre.com>

	PR tree-optimization/71094
	* doc/invoke.texi (Optimize Options): Document that -fivopts is
	enabled at -O1 and higher.  Add blurb about -O0 causing GCC to
	completely ignore most optimization options.

2025-04-15  Iain Sandoe  <iain@sandoe.co.uk>

	* configure: Regenerate.
	* configure.ac: Recognise PROJECT:ld-mmmm.nn.aa as an identifier
	for Darwin's static linker.

2025-04-15  Iain Sandoe  <iainsandoe@mini-05-seq.local>

	PR target/116827
	* ginclude/stddef.h: Undefine __PTRDIFF_T and __SIZE_T for module-
	enabled c++ on Darwin/macOS platforms.

2025-04-15  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* common.opt.urls: Regenerate.

2025-04-15  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Set
	to 4 for znver5.

2025-04-15  Jan Hubicka  <hubicka@ucw.cz>

	PR target/119298
	* config/i386/x86-tune-costs.h (znver5_cost): Set ADDSS cost to 3.

2025-04-15  Vineet Gupta  <vineetg@rivosinc.com>

	PR target/119533
	* config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): Check for
	EDGE_ABNOMAL.
	(pre_vsetvl::compute_lcm_local_properties): Initialize kill
	bitmap.
	Debug dump skipped edge.

2025-04-15  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/119547
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info):
	Do not perform lift if block is not transparent.

2025-04-15  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* Makefile.in (OBJS): Add ipa-locality-cloning.o.
	* cgraph.h (set_new_clone_decl_and_node_flags): Declare prototype.
	* cgraphclones.cc (set_new_clone_decl_and_node_flags): Remove static
	qualifier.
	* common.opt (fipa-reorder-for-locality): New flag.
	(LTO_PARTITION_DEFAULT): Declare.
	(flto-partition): Change default to LTO_PARTITION_DFEAULT.
	* doc/invoke.texi: Document -fipa-reorder-for-locality.
	* flag-types.h (enum lto_locality_cloning_model): Declare.
	(lto_partitioning_model): Add LTO_PARTITION_DEFAULT.
	* lto-cgraph.cc (lto_set_symtab_encoder_in_partition): Add dumping of
	node and index.
	* opts.cc (validate_ipa_reorder_locality_lto_partition): Define.
	(finish_options): Handle LTO_PARTITION_DEFAULT.
	* params.opt (lto_locality_cloning_model): New enum.
	(lto-partition-locality-cloning): New param.
	(lto-partition-locality-frequency-cutoff): Likewise.
	(lto-partition-locality-size-cutoff): Likewise.
	(lto-max-locality-partition): Likewise.
	* passes.def: Register pass_ipa_locality_cloning.
	* timevar.def (TV_IPA_LC): New timevar.
	* tree-pass.h (make_pass_ipa_locality_cloning): Declare.
	* ipa-locality-cloning.cc: New file.
	* ipa-locality-cloning.h: New file.

2025-04-15  Martin Jambor  <mjambor@suse.cz>
	    Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119803
	* ipa-cp.cc (ipcp_bits_lattice::meet_with_1): Move m_value adjustmed
	according to m_mask below the adjustment of the latter according to
	cap_mask.  Optimize the  calculation of cap_mask a bit.
	(ipcp_bits_lattice::meet_with): Optimize the calculation of cap_mask a
	bit.

2025-04-15  Jakub Jelinek  <jakub@redhat.com>

	* ipa-cp.cc (ipcp_print_widest_int): Print values with all ones in
	bits 128+ with "0xf..f" prefix instead of "all ones folled by ".
	Simplify wide_int check for -1 or all ones above least significant
	128 bits.

2025-04-15  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/119801
	* sanitizer.def (BUILT_IN_TSAN_FUNC_EXIT): Use BT_FN_VOID rather
	than BT_FN_VOID_PTR.
	* tree-tailcall.cc: Include attribs.h and asan.h.
	(struct tailcall): Add has_tsan_func_exit member.
	(empty_eh_cleanup): Add eh_has_tsan_func_exit argument, set what
	it points to to 1 if there is exactly one __tsan_func_exit call
	and ignore that call otherwise.  Adjust recursive call.
	(find_tail_calls): Add RETRY_TSAN_FUNC_EXIT argument, pass it
	to recursive calls.  When seeing __tsan_func_exit call with
	RETRY_TSAN_FUNC_EXIT 0, set it to -1.  If RETRY_TSAN_FUNC_EXIT
	is 1, initially ignore __tsan_func_exit calls.  Adjust
	empty_eh_cleanup caller.  When looking through stmts after the call,
	ignore exactly one __tsan_func_exit call but remember it in
	t->has_tsan_func_exit.  Diagnose if EH cleanups didn't have
	__tsan_func_exit and normal path did or vice versa.
	(optimize_tail_call): Emit __tsan_func_exit before the tail call
	or tail recursion.
	(tree_optimize_tail_calls_1): Adjust find_tail_calls callers.  If
	find_tail_calls changes retry_tsan_func_exit to -1, set it to 1
	and call it again with otherwise the same arguments.

2025-04-15  Sandra Loosemore  <sloosemore@baylibre.com>

	PR ipa/113203
	* doc/extend.texi (Common Function Attributes): Explain how to
	use always_inline in programs that have multiple translation
	units, and that LTO inlining additionally needs optimization
	enabled.

2025-04-15  liuhongt  <hongtao.liu@intel.com>

	PR target/108134
	* doc/extend.texi: Remove documents from r11-344-g0fec3f62b9bfc0.

2025-04-15  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/42683
	* doc/invoke.texi (x86 Options): Clarify that -march=pentiumpro
	doesn't include MMX.

2025-04-14  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/118794
	* config/gcn/gcn.opt (-mfake-exceptions): Support.
	* config/nvptx/nvptx.opt (-mfake-exceptions): Likewise.
	* config/gcn/gcn.md (define_expand "exception_receiver"): Use it.
	* config/nvptx/nvptx.md (define_expand "exception_receiver"):
	Likewise.
	* config/gcn/mkoffload.cc (main): Set it.
	* config/nvptx/mkoffload.cc (main): Likewise.
	* config/nvptx/nvptx.cc (nvptx_assemble_integer)
	<in_section == exception_section>: Special handling for
	'SYMBOL_REF's.
	* except.cc (expand_dw2_landing_pad_for_region): Don't generate
	bogus code for (default)
	'#define EH_RETURN_DATA_REGNO(N) INVALID_REGNUM'.

2025-04-14  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119785
	* expmed.cc (init_expmed): Always pass QImode rather than mode to
	set_src_cost passed to set_zero_cost.

2025-04-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119718
	* tree-pretty-print.cc (dump_generic_node) <case CALL_EXPR>: Dump
	also CALL_EXPR_MUST_TAIL_CALL flag.
	* calls.cc (maybe_complain_about_tail_call): Emit error about
	CALL_EXPR_MUST_TAIL_CALL only after emitting dump message, not before
	it.

2025-04-14  Arthur Cohen  <arthur.cohen@embecosm.com>

	* doc/install.texi: Add requirements for building gccrs.

2025-04-14  H.J. Lu  <hjl.tools@gmail.com>

	PR target/119784
	* config/i386/i386.cc (ix86_using_red_zone): Don't use red-zone
	with 32 GPRs and no caller-saved registers.

2025-04-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118097
	* ipa-cp.cc (ipa_get_jf_arith_result): Require res_operand for
	anything except NOP_EXPR or ADDR_EXPR, document it and remove the code
	trying to deduce it.
	(ipa_value_from_jfunc): Use the stored and streamed type of arithmetic
	pass-through functions.
	(ipa_agg_value_from_jfunc): Use the stored and streamed type of
	arithmetic pass-through functions, convert to the type used to store
	the value if necessary.
	(get_val_across_arith_op): New parameter op_type, pass it to
	ipa_get_jf_arith_result.
	(propagate_vals_across_arith_jfunc): New parameter op_type, pass it to
	get_val_across_arith_op.
	(propagate_vals_across_pass_through): Use the stored and streamed type
	of arithmetic pass-through functions.
	(propagate_aggregate_lattice): Likewise.
	(push_agg_values_for_index_from_edge): Use the stored and streamed
	type of arithmetic pass-through functions, convert to the type used to
	store the value if necessary.

2025-04-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118785
	* ipa-cp.cc (ipa_vr_intersect_with_arith_jfunc): Use the stored
	and streamed type of arithmetic pass-through functions.

2025-04-14  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.cc (ipcp_print_widest_int): Also add a truncated form of
	dumping of widest ints which only have zeros in the lowest 128 bits.
	Update the comment.
	(ipcp_bits_lattice::print): Also dump the mask using
	ipcp_print_widest_int.
	(ipcp_store_vr_results): Likewise.

2025-04-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/119318
	* ipa-cp.cc (ipcp_bits_lattice::meet_with_1): Set all mask bits
	not covered by precision to one.
	(ipcp_bits_lattice::meet_with): Likewise.
	(propagate_bits_across_jump_function): Use the stored operation
	type to perform meet with other lattices.

2025-04-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118097
	PR ipa/118785
	PR ipa/119318
	* lto-streamer.h (lto_variably_modified_type_p): Declare.
	* ipa-prop.h (ipa_pass_through_data): New field op_type.
	(ipa_get_jf_pass_through_op_type): New function.
	* ipa-prop.cc: Include lto-streamer.h.
	(ipa_dump_jump_function): Dump also pass-through
	operation types, if any.  Dump pass-through operands only if not NULL.
	(ipa_set_jf_simple_pass_through): Set op_type accordingly.
	(compute_complex_assign_jump_func): Set op_type of arithmetic
	pass-through jump_functions.
	(analyze_agg_content_value): Update lhs when walking assighment
	copies.  Set op_type of aggregate arithmetic pass-through
	jump_functions.
	(update_jump_functions_after_inlining): Also transfer the operation
	type from the source arithmentic pass-through jump function to the
	destination jump function.
	(ipa_write_jump_function): Stream also the op_type when necessary.
	(ipa_read_jump_function): Likewise.
	(ipa_agg_pass_through_jf_equivalent_p): Also compare operation types.
	* lto-streamer-out.cc (lto_variably_modified_type_p): Make public.

2025-04-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119757
	* tree-vect-slp.cc (vect_build_slp_tree_1): Record and compare
	whether a stmt uses a maks.

2025-04-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119778
	* tree-inline.cc (copy_edges_for_bb): Mark calls that are
	source of abnormal edges as altering control-flow.

2025-04-14  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/119779
	* doc/gm2.texi (Interface to assembly language): Use eax
	rather than rax in both examples.

2025-04-14  Jakub Jelinek  <jakub@redhat.com>

	PR driver/119727
	* configure.ac (HOST_HAS_PERSONALITY_ADDR_NO_RANDOMIZE): New check.
	* gcc.cc: Include sys/personality.h if
	HOST_HAS_PERSONALITY_ADDR_NO_RANDOMIZE is defined.
	(try_generate_repro): Call
	personality (personality (0xffffffffU) | ADDR_NO_RANDOMIZE)
	if HOST_HAS_PERSONALITY_ADDR_NO_RANDOMIZE is defined.
	* config.in: Regenerate.
	* configure: Regenerate.

2025-04-13  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc: Add z17 scheduler description.
	* config/s390/s390.h: Ditto.
	* config/s390/s390.md: Ditto.
	* config/s390/9175.md: New file.

2025-04-13  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* common/config/s390/s390-common.cc: Rename arch15 to z17.
	* config.gcc: Add z17.
	* config/s390/driver-native.cc: Detect z17 machine.
	* config/s390/s390-builtins.def (B_VXE3): Rename arch15 to z17.
	* config/s390/s390-c.cc (s390_resolve_overloaded_builtin): Ditto.
	* config/s390/s390-opts.h (enum processor_type): Ditto.
	* config/s390/s390.cc: Ditto.
	* config/s390/s390.h: Ditto.
	* config/s390/s390.md: Ditto.
	* config/s390/s390.opt: Add z17.
	* doc/invoke.texi: Ditto.

2025-04-12  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/97585
	* doc/invoke.texi (x86 Options): Document list of extensions
	supported by -march=x86_64, according to the declaration of
	PTA_X86_64_BASELINE in config/i386/i386.h.

2025-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR driver/119727
	* gcc.cc (files_equal_p): Rewritten using fopen/fgets/fclose instead
	of open/fstat/read/close.  At the start of lines, ignore lowercase
	hexadecimal addresses followed by space.

2025-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119722
	* gimple-lower-bitint.h (build_bitint_stmt_ssa_conflicts): Add
	CLEAR argument.
	* gimple-lower-bitint.cc (build_bitint_stmt_ssa_conflicts): Add
	CLEAR argument.  Call clear on gimple_assign_copy_p rhs1 if lhs
	is large/huge bitint unless lhs is not in names.
	* tree-ssa-coalesce.cc (build_ssa_conflict_graph): Adjust
	build_bitint_stmt_ssa_conflicts caller.  Move gimple_assign_copy_p
	handling to after the build_bitint_stmt_ssa_conflicts call.

2025-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119718
	* tree-tailcall.cc (maybe_error_musttail): Dump the GIMPLE at the
	end of the Cannot tail-call line rather than on the line before it.
	* calls.cc (maybe_complain_about_tail_call): Dump the GENERIC
	at the end of the ;; Cannot tail-call line rather than on the
	line before it.

2025-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119718
	* tree-tailcall.cc (maybe_error_musttail): Only dump into dump_file
	if dump_flags & TDF_DETAILS.  Use "Cannot tail-call: " prefix instead
	of "Cannot convert: ".
	(find_tail_calls, tree_optimize_tail_calls_1): Formatting fixes
	for maybe_error_musttail calls.
	* calls.cc (maybe_complain_about_tail_call): Emit also a message
	into dump_file when dump_flags & TDF_DETAILS for CALL_EXPR_TAILCALL
	calls.
	(initialize_argument_information): Formatting fix for
	maybe_complain_about_tail_call calls.
	(can_implement_as_sibling_call_p, expand_call): Likewise.

2025-04-11  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/106618
	* doc/invoke.texi (Option Summary): Remove -fargs-in-order, add
	-fstrong-eval-order.
	(C++ Dialect Options): Explicitly document that -fstrong-eval-order
	takes an optional argument and what the choices are.  Generalize
	references to C++17.

2025-04-11  Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/105548
	* doc/invoke.texi (Optimize Options): Delete misleading sentence
	about conversions.

2025-04-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119707
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Only use
	m_data[save_data_cnt] instead of m_data[save_data_cnt + 1] if
	idx is odd and equal to low + 1.  Remember tree_to_uhwi (idx) in
	a temporary instead of calling the function multiple times.

2025-04-11  Sandra Loosemore  <sloosemore@baylibre.com>

	PR tree-optimization/87909
	* common.opt.urls: Regenerate.
	* doc/invoke.texi (Option Summary): Add -ftree-cselim.
	(Optimize Options): Likewise.

2025-04-11  Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/14708
	* doc/invoke.texi (Optimize Options): List -fexcess-precision
	before -ffloat-store, moving some background discussion to the
	former from the latter.  Recommend using -fexcess-precision=standard
	instead of -ffloat-store.

2025-04-10  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (LINK_SPEC): Add support for
	-static-libgcobol.

2025-04-10  Richard Biener  <rguenther@suse.de>

	PR middle-end/119706
	* gimple-expr.cc (is_gimple_mem_ref_addr): Also allow
	POLY_INT_CST.

2025-04-10  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/119399
	* tree-data-ref.cc (create_waw_or_war_checks): Use a MINUS_EXPR
	on two converted pointers, rather than converting a POINTER_DIFF_EXPR
	on the pointers.

2025-04-10  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/multilib-generator: Remove the compact code model
	and check large code model for RV32.

2025-04-09  Jakub Jelinek  <jakub@redhat.com>

	* pretty-print.cc (pretty_printer::format): Use %.Ns instead of
	%Ns in function comment.

2025-04-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/119664
	* config/h8300/jumpcall.md (bit test and jump define_insn_and_split):
	Use HSI iterator rather than QHSI.

2025-04-09  Jakub Jelinek  <jakub@redhat.com>

	* config/riscv/riscv-vector-builtins.cc (verify_type_context):
	Diagnose RVV types for a given OpenMP context.

2025-04-09  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/119689
	PR rtl-optimization/115568
	* lra-remat.cc (create_cands): Use prev_nonnote_nondebug_insn
	to check whether insn2 is directly before insn.

2025-04-09  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/116595
	* expr.cc (categorize_ctor_elements_1): Use
	constant_lower_bound.

2025-04-09  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/gen-evolution.awk: remove
	usage of "asort".
	* config/loongarch/genopts/genstr.sh: replace sed with awk.

2025-04-08  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/90468
	* doc/invoke.texi (Warning Options): Clean up text describing
	-Wno-xxx.

2025-04-08  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119672
	* simplify-rtx.cc (simplify_context::simplify_relational_operation_1):
	For POPCOUNT == 0 or != 0 optimizations use
	CONST0_RTX (GET_MODE (XEXP (op0, 0))) rather than const0_rtx.

2025-04-08  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/119662
	* gimplify.cc (modify_call_for_omp_dispatch): Fix GOMP_interop
	arg passing; add location info to function calls.

2025-04-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/119678
	* config/riscv/freebsd.h (LINK_SPEC): Use FBSD_LINK_PG_NOTE rather
	than non-existing FBSD_LINK_PG_NOTES.

2025-04-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.cc (nvptx_asm_output_def_from_decls)
	[!ACCEL_COMPILER]: Don't define label 'emit_ptx_alias'.

2025-04-08  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119594
	* cse.cc (count_reg_usage): Count even x == dest regs if they have
	non-zero counts already and incr is positive.

2025-04-08  Jakub Jelinek  <jakub@redhat.com>

	PR lto/119625
	* lto-opts.cc (lto_write_options): Mask of CF_SET from
	global_options.x_flag_cf_protection.

2025-04-08  Tejas Belagod  <tejas.belagod@arm.com>
	    Andrea Corallo  <andrea.corallo@arm.com>

	* target.h (type_context_kind): Add new context kinds for target clauses.
	(omp_type_context): Query if the context is of OMP kind.
	* config/aarch64/aarch64-sve-builtins.cc (verify_type_context): Diagnose
	SVE types for a given OpenMP context.
	(omp_type_context): New.
	* gimplify.cc (omp_notice_variable): Diagnose implicitly-mapped SVE
	objects in OpenMP regions.
	(gimplify_scan_omp_clauses): Diagnose SVE types for various target
	clauses.

2025-04-08  Tejas Belagod  <tejas.belagod@arm.com>

	* tree.h (strip_pointer_types): New.

2025-04-08  Richard Sandiford  <richard.sandiford@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>

	PR middle-end/101018
	* poly-int.h (can_and_p): New function.
	* fold-const.cc (poly_int_binop): Use it to optimize BIT_AND_EXPRs
	involving POLY_INT_CSTs.
	* gimplify.cc (omp_notice_variable): Use poly_int_tree_p instead
	of INTEGER_CST when checking for constant-sized omp data.
	(gimplify_adjust_omp_clauses_1): Likewise.
	(gimplify_adjust_omp_clauses): Likewise.
	* omp-low.cc (scan_sharing_clauses): Likewise.

2025-04-08  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.h (PTA_DIAMONDRAPIDS): Add PTA_AVX10_1_256.

2025-04-08  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/vector.md: Disable vsext/vzext for XTheadVector.

2025-04-07  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/113257
	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Apple-a12,
	Apple-M1, Apple-M2, Apple-M3 with expanded names to allow for the
	LITTLE.big versions.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi: Add apple-m1,2 and 3 cores to the ones listed
	for arch and tune selections.

2025-04-07  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.opt (-mfake-ptx-alloca): Update.

2025-04-07  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/118924
	* tree-sra.cc (create_total_scalarization_access): Set
	grp_same_access_path flag to zero.

2025-04-07  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/118924
	* tree-ssa-alias-compare.h (types_equal_for_same_type_for_tbaa_p):
	Declare.
	* tree-ssa-alias.cc: Include ipa-utils.h.
	(types_equal_for_same_type_for_tbaa_p): New public overloaded variant.
	* tree-sra.cc: Include tree-ssa-alias-compare.h.
	(create_access): Initialzie grp_same_access_path to true.
	(build_accesses_from_assign): Detect tbaa hazards and clear
	grp_same_access_path fields of involved accesses when they occur.
	(sort_and_splice_var_accesses): Take previous values of
	grp_same_access_path into account.

2025-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119640
	* tree-vect-stmts.cc (vectorizable_shift): Always insert code
	for one of our SLP operands before the code for the vector
	shift itself.

2025-04-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119614
	* tree-tailcall.cc (find_tail_calls): Remember edges which have been
	walked through if !ass_var.  Perform IPA-VRP workaround even when
	ret_var is not TREE_CONSTANT, in that case check in a loop if it is
	a PHI result and in that case look at the PHI argument from
	corresponding edge in the edge vector.

2025-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR testsuite/116398
	* params.opt (-param=max-combine-search-insns=): New param.
	* doc/invoke.texi: Document it.
	* combine.cc (insn_link::insn_count): New field.
	(alloc_insn_link): Initialize it.
	(distribute_links): Add a limit parameter.
	(try_combine): Use the new param to limit distribute_links
	when only i3 has changed.

2025-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR testsuite/116398
	* combine.cc (distribute_links): Take an optional start point.
	(try_combine): If only i3 has changed, only distribute i3's links,
	not i2's.  Start the search for the new use from i3 rather than
	from the definition instruction.  Likewise start the search for
	the new use from i2 when distributing i2's links.

2025-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR testsuite/116398
	* combine.cc (try_combine): Shortcut the split_i2i3 handling if
	i2 is unchanged.

2025-04-07  Richard Sandiford  <richard.sandiford@arm.com>
	    Richard Biener  <rguenther@suse.de>

	PR testsuite/116398
	* combine.cc (try_combine): Reallow 2->2 combinations.  Detect when
	only i3 has changed and restart from i3 in that case.

2025-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	* simplify-rtx.cc (simplify_const_relational_operation): Generalize
	the constant checks in the fold-via-minus path to match the
	INTEGRAL_MODE_P condition.

2025-04-06  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Boolean Type): Further clarify support for
	_Bool in C23 and C++.

2025-04-06  Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/78874
	* doc/invoke.texi (Warning Options): Fix description of
	-Wno-aggressive-loop-optimizations to reflect that this turns
	off the warning, and the default is for it to be enabled.

2025-04-06  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/81831
	* doc/invoke.texi (Option Summary): Add -Wno-psabi.
	(Warning Options): Document -Wpsabi separately from -Wabi.
	Note it's enabled by default, not just implied by -Wabi.
	Replace the detailed example for a GCC 4.4 change for x86
	(which is unlikely to be very interesting nowadays) with
	just a list of all targets that presently diagnose these
	warnings.
	(RS/6000 and PowerPC Options): Add cross-references for
	-Wno-psabi.

2025-04-05  Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/112589
	* common.opt (-fcf-protection): Add documentation string.
	* doc/invoke.texi (Option Summary): Add entry for -fcf-protection
	without argument.
	(Instrumentation Options): Tidy the -fcf-protection entry and
	and add documention for the form without an argument.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR lto/119625
	* lto-opts.cc (lto_write_options): If neither flag_pic nor
	flag_pie are set, check first for flag_pie and only later
	for flag_pic rather than the other way around, use a temporary
	variable.  If flag_cf_protection is not set, don't append anything
	if flag_cf_protection is none of CF_{NONE,FULL,BRANCH,RETURN} and
	use a temporary variable.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR gcov-profile/119618
	* profile.cc (branch_prob): Only check for musttail calls if
	cfun->has_musttail.  Use gsi_last_nondebug_bb instead of gsi_last_bb.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119616
	* tree-tailcall.cc (suitable_for_tail_call_opt_p): Move checking
	for addressable parameters from here ...
	(find_tail_calls): ... here.  If cfun->has_musttail, don't clear
	opt_tailcalls for it, instead set a local flag and punt if we can't
	tail recurse optimize it.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/119613
	* cfgrtl.cc (purge_dead_edges): Remove REG_EH_REGION notes from
	tail calls.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/115910
	* rtlanal.cc (pattern_cost): Return at least COSTS_N_INSNS (1)
	rather than just COSTS_N_INTNS (1) for cost <= 0.
	* config/i386/i386.cc (ix86_rtx_costs): Set *total to 1 for
	TARGET_64BIT x86_64_zext_immediate_operand constants.

2025-04-04  Andrew Pinski  <quic_apinski@quicinc.com>

	PR ipa/119599
	* tree-cfg.cc (pass_warn_function_return::execute): Turn return statements always
	into __builtin_unreachable calls.

2025-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119614
	* tree-tailcall.cc (find_tail_calls): Handle also pointer types in the
	IPA-VRP workaround.

2025-04-03  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/119573
	* config/nvptx/nvptx.cc (nvptx_encode_section_info): Don't set
	'DATA_AREA_CONST' for 'TREE_CONSTANT', or 'TREE_READONLY'.
	(nvptx_asm_declare_constant_name): Use '.global' instead of
	'.const'.

2025-04-03  Peter Bergner  <bergner@linux.ibm.com>

	PR target/119308
	* config/rs6000/rs6000-logue.cc (rs6000_output_function_epilogue):
	Handle GCC COBOL for the tbtab lang field.

2025-04-03  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Statement Attributes): Copy-edit the musttail
	attribute documentation and correct the comment in the last
	example.

2025-04-03  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/x86-tune-costs.h (ix86_size_cost): Fix sizes of move
	instructions

2025-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR cobol/119242
	* fold-const.h (native_encode_wide_int): Declare.
	* fold-const.cc (native_encode_wide_int): New function.
	(native_encode_int): Use it.

2025-04-03  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/genopts/gen-evolution.awk: Avoid using gensub
	that FreeBSD awk lacks.

2025-04-03  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/119539
	* config/i386/i386.md (*<insn><mode>3_mask): Emit NF variant of
	rotate when APX_NF enabled, and use force_lowpart_subreg.
	(*<insn><mode>3_mask_1): Likewise.

2025-04-03  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/101440
	* doc/extend.texi (Common Function Attributes): Clean up some
	confusing language in the description of the "access" attribute.

2025-04-02  Sandra Loosemore  <sloosemore@baylibre.com>
	    GUO Yixuan  <culu.gyx@gmail.com>

	PR driver/58973
	* common.opt (Werror, Werror=): Use less awkward wording in
	description.
	(pedantic-errors): Likewise.
	* doc/invoke.texi (Warning Options): Likewise for -Werror and
	-Werror= here.

2025-04-02  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/119572
	* config/riscv/autovec.md: Mask broadcast value.

2025-04-02  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/bitmanip.md: The optimization can only be applied if
	the high bit of operands[3] is set to 1.

2025-04-02  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/114957
	PR c/78008
	PR c++/60972
	* doc/extend.texi (Structure-Layout Pragmas):  Add @cindex
	entries	and reformat the pragma descriptions to match the markup
	used for other pragmas.  Document what #pragma pack(0) does.
	Add cross-references to similar attributes.

2025-04-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119491
	* tree-tailcall.cc (single_non_eh_succ_edge): New function.
	(independent_of_stmt_p): Use single_non_eh_succ_edge (bb)->dest
	instead of single_succ (bb).
	(empty_eh_cleanup): New function.
	(find_tail_calls): Diagnose throwing of exceptions which do not
	propagate only if there are no EDGE_EH successor edges.  If there are
	and the call is musttail, use empty_eh_cleanup to find if the cleanup
	is not empty.  If not or the call is not musttail, use different
	diagnostics.  Set is_noreturn even if there are successor edges.  Use
	single_non_eh_succ_edge (abb) instead of single_succ_edge (abb).  Punt
	on internal noreturn calls.
	(decrease_profile): Don't assert 0 or 1 successor edges.
	(eliminate_tail_call): Use
	single_non_eh_succ_edge (gsi_bb (t->call_gsi)) instead of
	single_succ_edge (gsi_bb (t->call_gsi)).
	(tree_optimize_tail_calls_1): Also look into basic blocks with
	single succ edge which is EDGE_EH for noreturn musttail calls.

2025-04-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119586
	* tree-vect-stmts.cc (vectorizable_load): Assume we got
	alignment analysis for VMAT_STRIDED_SLP wrong.
	(vectorizable_store): Likewise.

2025-04-02  Jakub Jelinek  <jakub@redhat.com>

	* doc/extend.texi (musttail statement attribute): Hint how
	to avoid -Wmaybe-musttail-local-addr warnings.

2025-04-02  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119376
	* common.opt (Wmusttail-local-addr, Wmaybe-musttail-local-addr): New.
	* tree-tailcall.cc (suitable_for_tail_call_opt_p): Don't fail for
	TREE_ADDRESSABLE PARM_DECLs for musttail calls if diag_musttail.
	Emit -Wmusttail-local-addr warnings.
	(maybe_error_musttail): Use gimple_location instead of directly
	accessing location member.
	(find_tail_calls): For musttail calls if diag_musttail, don't fail
	if address of local could escape to the call, instead emit
	-Wmaybe-musttail-local-addr warnings.  Emit
	-Wmaybe-musttail-local-addr warnings also for address taken
	parameters.
	* common.opt.urls: Regenerate.
	* doc/extend.texi (musttail statement attribute): Clarify local
	variables without non-trivial destruction are considered out of scope
	before the tail call instruction.
	* doc/invoke.texi (-Wno-musttail-local-addr,
	-Wmaybe-musttail-local-addr): Document.

2025-04-02  Andi Kleen  <ak@gcc.gnu.org>

	PR middle-end/119482
	* bitmap.cc (bitmap_set_bit): Write back value unconditionally

2025-04-02  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/118982
	* doc/extend.texi (Common Function Attributes): For the
	constructor/destructory attribute, be more explicit about the
	relationship between the constructor attribute and
	the C++ init_priority attribute, and add a cross-reference.
	Also document that most targets support this.
	(C++ Attributes): Similarly for the init_priority attribute.

2025-04-01  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/118118
	* doc/extend.texi (Boolean Type): New section.

2025-04-01  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/117689
	* doc/extend.texi (Incomplete Enums): Rename to....
	(Enum Extensions): This.  Document support for specifying the
	underlying type of an enum as an extension in all earlier C
	and C++ standards.  Document that a forward declaration with
	underlying type is not an incomplete type, and which dialects
	GCC supports that in.

2025-04-01  Tom Tromey  <tromey@adacore.com>

	* dwarf2out.cc (modified_type_die): Use mod_scope for
	ranged types, base types, and array types.

2025-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119493
	* tree-tailcall.cc (find_tail_calls): Don't punt on tail recusion
	if some arguments don't have is_gimple_reg_type, only punt if they
	have non-POD types, or volatile, or addressable or (for now) it is
	not a musttail call.  Set tailr_arg_needs_copy in those cases too.
	(eliminate_tail_call): Copy call arguments to params if they don't
	have is_gimple_reg_type, use temporaries if the argument is used
	later.
	(tree_optimize_tail_calls_1): Skip !is_gimple_reg_type
	tailr_arg_needs_copy parameters.  Formatting fix.

2025-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119291
	* combine.cc (try_combine): For splitting of PARALLEL with
	2 independent SETs into i2 and i3 sets check reg_used_between_p
	of the SET_DESTs rather than just modified_between_p.

2025-04-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119534
	* tree-vect-stmts.cc (get_load_store_type): Reject
	VECTOR_BOOLEAN_TYPE_P offset vector type for emulated gathers.

2025-04-01  Martin Uecker  <uecker@tugraz.at>

	PR c/119173
	* doc/invoke.texi (Warning Options): Move to general options.

2025-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR gcov-profile/119535
	* profile.cc (branch_prob): Ignore any edges from bbs ending with
	musttail call, rather than only EDGE_FAKE edges from those to EXIT.

2025-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119493
	* tree-tailcall.cc (tree_optimize_tail_calls_1): Ignore tail recursion
	candidates which need accumulators if there is at least one musttail
	non-recursive call.

2025-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/119537
	* gimplify.cc (find_used_user_labels): New function.
	(gimplify_call_expr): Don't remove complex assume expression at -O0
	if it defines any user labels.
	* gimple-low.cc: Include diagnostic-core.h.
	(assume_labels): New variable.
	(diagnose_assume_labels): New function.
	(lower_function_body): Call it via walk_gimple_seq if assume_labels
	is non-NULL, then BITMAP_FREE assume_labels.
	(find_assumption_locals_r): Record in assume_labels uids of user
	labels defined in assume attribute expressions.

2025-04-01  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/119369
	* config/gcn/gcn-protos.h (gcn_asm_weaken_decl): Declare.
	* config/gcn/gcn.cc (gcn_asm_weaken_decl): New.
	* config/gcn/gcn-hsa.h (ASM_WEAKEN_DECL): '#define' to this.

2025-04-01  Richard Biener  <rguenther@suse.de>

	PR target/119549
	* common/config/i386/i386-common.cc (ix86_handle_option):
	Assert that both OPT_msse4 and OPT_mno_sse4 are never unset.
	* config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
	Process negated OPT_msse4 as OPT_mno_sse4.

2025-04-01  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/119559
	* gimplify.cc (modify_call_for_omp_dispatch): Reorder checks to avoid
	asserts and bogus diagnostic.

2025-04-01  Hu, Lin1  <lin1.hu@intel.com>
	    Hongyu Wang  <hongyu.wang@intel.com>

	PR target/119473
	* config/i386/sse.md
	(vaesdec_<mode>): Set attr "isa" as "avx,vaes_avx512vl", "type" as
	"sselog1", "mode" as "TI".
	(vaesdeclast_<mode>): Ditto.
	(vaesenc_<mode>): Ditto.
	(vaesenclast_<mode>): Ditto.

2025-04-01  Monk Chiang  <monk.chiang@sifive.com>
	    Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-v.cc: Add restrict for insert LMUL.
	* config/riscv/riscv-vector-builtins-types.def:
	Use RVV_REQUIRE_ELEN_64 to check LMUL number.
	* config/riscv/riscv-vector-switch.def: Likewise.
	* config/riscv/vector-iterators.md: Check TARGET_VECTOR_ELEN_64
	rather than "TARGET_MIN_VLEN > 32" for all iterator.

2025-04-01  Lulu Cheng  <chenglulu@loongson.cn>

	* doc/invoke.texi: Corrected the position of '-mtls-dialect=opt'
	option.

2025-03-31  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/119553
	* path-coverage.cc (find_paths): Return path count, don't
	write to gcno, and rename to ...
	(instrument_prime_paths): ... this.
	* profile.cc (branch_prob): Write path counts to gcno.

2025-03-31  Marek Polacek  <polacek@redhat.com>

	PR c++/116960
	PR c++/119303
	* diagnostic.cc (diagnostic_context::report_diagnostic): Check for
	non-zero m_lock later, after checking diagnostic_enabled.

2025-03-31  Andre Simoes Dias Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64-option-extensions.def (SME): Remove SVE2 as
	prerequisite and add in FCMA and F16FML.
	* config/aarch64/aarch64.cc (aarch64_override_options_internal):
	Diagnose use of SME without SVE2 and implicitly enable SVE2 when
	enabling SME after streaming mode diagnosis.
	* doc/invoke.texi (sme): Document that this can only be used with the
	sve2 extension.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119532
	* tree-tailcall.cc (process_assignment): FAIL for fixed-point
	typed functions.

2025-03-31  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/119541
	* gimplify.cc (modify_call_for_omp_dispatch): Limit interop claues
	processing by the number of append_args arguments.

2025-03-31  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR middle-end/119442
	* expr.cc (store_constructor): Also allow element modes explicitly
	accepted by target vec_duplicate pattern.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep):
	Add mode attribute.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_mov_fp_load,
	znver5_sse_mov_fp_load): Also match ssemov2.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_log_evex_store,
	znver5_sse_log_evex_store): New reservations.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_icvt): Use sseicvt.
	(znver4_sse_icvt_store): Likewise.
	(znver5_sse_icvt_store): Likewise.
	(znver4_sse_icvt2): New.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_div_pd,
	znver4_sse_div_pd_load, znver5_sse_div_pd_load): Handle DFmode.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_cmp_avx128,
	znver5_sse_cmp_avx128): Handle TImode.
	(znver4_sse_cmp_avx256, znver5_sse_cmp_avx256): Handle OImode.
	(znver4_sse_cmp_avx512, znver5_sse_cmp_avx512): Handle XImode.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_test): Drop test of
	prefix_extra attribute.

2025-03-31  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_log1): Rename to
	znver4_sse_log1_store.
	(znver5_sse_log1): Rename to znver5_sse_log1_store.
	(znver4_sse_log1): New memory-less variant.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (New/Delete Builtins): Cleanup up the text and
	explicitly list the builtins being documented.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Numeric Builtins): Move Integer Overflow Builtins
	section here, as a subsection.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Atomic Memory Access): New section.
	(__sync Builtins): Make it a subsection of the above.
	(Atomic Memory Access): Likewise.
	(x86 specific memory model extensions for transactional memory):
	Delete this section, incorporating the text into the discussion
	of __atomic builtins.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Built-in Functions): Incorporate some text
	formerly in "Other Builtins" into the introduction.  Adjust
	menu for new sections.
	(Library Builtins): New section, split from "Other Builtins".
	(Numeric Builtins): Likewise.
	(Stack Allocation): Likewise.
	(Constructing Calls): Move __builtin_call_with_static_chain here.
	(Object Size Checking): Minor copy-editing.
	(Other Builtins): Move text to new sections listed above.  Delete
	duplicate docs for object-size checking builtins.
	* doc/invoke.texi (C dialect options): Update @xref for -fno-builtin.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (C Extensions): Move menu items for
	builtin-related sections to...
	(Built-in Functions): New chapter.
	* doc/gcc.texi (Introduction): Add menu entry for new chapter.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Attributes): New section.
	(Function Attributes): Make it a subsection of the new section.
	(Variable Attributes): Likewise.
	(Type Attributes): Likewise.
	(Label Attributes): Likewise.
	(Enumerator Attributes): Likewise.
	(Attribute Syntax): Likewise.

2025-03-30  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Function Attributes): Merge text from "Target
	Format Checks" into the main discussion of the format and
	format_arg attributes.
	(Target Format Checks): Delete section.

2025-03-30  Maciej W. Rozycki  <macro@orcam.me.uk>

	PR target/117759
	* config/alpha/alpha-protos.h
	(alpha_expand_unaligned_store_safe_partial): New prototype.
	* config/alpha/alpha.cc (alpha_expand_movmisalign)
	(alpha_expand_block_move, alpha_expand_block_clear): Handle
	TARGET_SAFE_PARTIAL.
	(alpha_expand_unaligned_store_safe_partial)
	(alpha_expand_unaligned_store_words_safe_partial)
	(alpha_expand_clear_safe_partial_nobwx): New functions.
	* config/alpha/alpha.md (insvmisaligndi): Handle
	TARGET_SAFE_PARTIAL.
	* config/alpha/alpha.opt (msafe-partial): New option.
	* config/alpha/alpha.opt.urls: Regenerate.
	* doc/invoke.texi (Option Summary, DEC Alpha Options): Document
	the new option.

2025-03-30  Maciej W. Rozycki  <macro@orcam.me.uk>

	PR target/117759
	* config/alpha/alpha-modes.def (OI): New integer mode.
	* config/alpha/alpha-protos.h (alpha_expand_mov_safe_bwa): New
	prototype.
	* config/alpha/alpha.cc (alpha_expand_mov_safe_bwa): New
	function.
	(alpha_secondary_reload): Handle TARGET_SAFE_BWA.
	* config/alpha/alpha.md (aligned_store_safe_bwa)
	(unaligned_store<mode>_safe_bwa, reload_out<mode>_safe_bwa)
	(reload_out<mode>_unaligned_safe_bwa): New expanders.
	(mov<mode>, movcqi, reload_out<mode>_aligned): Handle
	TARGET_SAFE_BWA.
	(reload_out<mode>): Guard against TARGET_SAFE_BWA.
	* config/alpha/alpha.opt (msafe-bwa): New option.
	* config/alpha/alpha.opt.urls: Regenerate.
	* doc/invoke.texi (Option Summary, DEC Alpha Options): Document
	the new option.

2025-03-30  Maciej W. Rozycki  <macro@orcam.me.uk>

	* function.h (struct function): Add
	`split_basic_blocks_after_reload' member.
	* lra.cc (lra): Handle it.
	* reload1.cc (reload): Likewise.

2025-03-30  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha-protos.h (alpha_emit_unlikely_jump): New
	prototype.
	* config/alpha/alpha.cc (emit_unlikely_jump): Rename to...
	(alpha_emit_unlikely_jump): ... this.  Return the insn emitted.
	(alpha_split_atomic_op, alpha_split_compare_and_swap)
	(alpha_split_compare_and_swap_12, alpha_split_atomic_exchange)
	(alpha_split_atomic_exchange_12): Update call sites accordingly.

2025-03-30  LIU Hao  <lh_mouse@126.com>

	* config/mingw/winnt.cc (mingw_pe_file_end): Add `.p2align`.

2025-03-29  Iain Sandoe  <iain@sandoe.co.uk>

	PR cobol/119283
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Check for host memrchr.

2025-03-29  Lulu Cheng  <chenglulu@loongson.cn>

	* doc/invoke.texi: Modify the description of '-mld-seq-sa'.

2025-03-29  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-def.cc
	(la464_align): Add settings for labels.
	(la664_align): Likewise.
	* config/loongarch/loongarch-opts.cc
	(loongarch_target_option_override): Likewise.
	* config/loongarch/loongarch-tune.h
	(struct loongarch_align): Implement the function `label_`.

2025-03-28  Jakub Jelinek  <jakub@redhat.com>

	* common.opt.urls: Regenerate.

2025-03-28  Jakub Jelinek  <jakub@redhat.com>

	* Makefile.in (gcc.srcextra): Use sed to turn .../gcc/gengtype-lex.l
	in #line directives into just gengtype-lex.l.

2025-03-28  Andrew MacLeod  <amacleod@redhat.com>

	* range-op.cc (operator_mult::op1_range): If the LHS does not
	contain zero, return non-zero.

2025-03-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119483
	* tree-tailcall.cc (find_tail_calls): Handle noreturn musttail
	calls.
	(eliminate_tail_call): Likewise.
	(tree_optimize_tail_calls_1): If cfun->has_musttail and
	diag_musttail, handle also basic blocks with no successors
	with noreturn musttail calls.
	* calls.cc (can_implement_as_sibling_call_p): Allow ECF_NORETURN
	calls if they are musttail calls.

2025-03-28  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119484
	* ipa-sra.cc (isra_analyze_call): Don't set m_return_ignored if
	gimple_call_must_tail_p even if it doesn't have lhs.

2025-03-28  Richard Biener  <rguenther@suse.de>

	* fold-const.h (native_encode_real): Export.
	* fold-const.cc (native_encode_real): Change API to take
	mode and REAL_VALUE_TYPE.
	(native_encode_expr): Adjust.

2025-03-27  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.cc (ix86_redzone_clobber): Use integer, not rtx
	as the third argument of plus_constant.

2025-03-27  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_insn_both, znver5_insn_both):
	New reservation for ALU ops with load and store.

2025-03-27  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_add, znver4_sse_add_load,
	znver5_sse_add_load, znver4_sse_add1, znver4_sse_add1_load,
	znver5_sse_add1_load, znver4_sse_mul, znver4_sse_mul_load,
	znver5_sse_mul_load, znver4_sse_cvt, znver4_sse_cvt_load,
	znver5_sse_cvt_load, znver4_sse_shuf, znver5_sse_shuf,
	znver4_sse_shuf_load, znver5_sse_shuf_load,
	znver4_sse_cmp_avx128, znver5_sse_cmp_avx128,
	znver4_sse_cmp_avx128_load, znver5_sse_cmp_avx128_load):
	Also handle DFmode.
	(znver4_sse_muladd_load, znver5_sse_muladd_load): Use
	ssemuladd type.

2025-03-27  Tobias Burnus  <tburnus@baylibre.com>

	* gimplify.cc (modify_call_for_omp_dispatch): Remove sorry.

2025-03-27  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/neon.md (<fmaxmin><mode>3): Move pattern from here...
	* config/arm/vec-common.md (<fmaxmin><mode>3): ... to here.  Convert
	to define_expand and disable the pattern when denormal values might
	get truncated to zero.  Iterate on VF to add V4HF and V8HF variants.

2025-03-27  Hu, Lin1  <lin1.hu@intel.com>

	PR target/119425
	* config/i386/sse.md:
	(vec_set<mode>_0): Set the alternative with constraint "jm"'s
	attribute "addr" to "gpr16".
	(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>):
	Ditto.
	(avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
	(avx2_pblendd<mode>): Ditto.
	(aesenc): Ditto.
	(aesenclast): Ditto.
	(aesdec): Ditto.
	(aesdeclast): Ditto.
	(vaesdec_<mode>): Ditto.
	(vaesdeclast_<mode>): Ditto.
	(vaesenc_<mode>):: Ditto.
	(vaesenclast_<mode>):: Ditto.
	(aes<aesklvariant>u8): Ditto.
	(*aes<aeswideklvariant>u8): Ditto.

2025-03-27  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/119408
	* config/loongarch/loongarch.cc
	(loongarch_c_mode_for_suffix): New.
	(TARGET_C_MODE_FOR_SUFFIX): Define.

2025-03-26  Jørgen Kvalsvik  <j@lambda.is>

	* builtins.cc (expand_builtin_fork_or_exec): Call
	coverage_instrumentation_p.
	* ipa-inline.cc (can_early_inline_edge_p): Likewise.
	* passes.cc (finish_optimization_passes): Likewise.
	* profile.cc (coverage_instrumentation_p): New function.
	* profile.h (coverage_instrumentation_p): New declaration.
	* tree-profile.cc (tree_profiling): Call
	coverage_instrumentation_p.
	(pass_ipa_tree_profile::gate): Likewise.
	* value-prof.h (coverage_instrumentation_p): New declaration.

2025-03-26  Jørgen Kvalsvik  <j@lambda.is>

	* Makefile.in (OBJS): Add prime-paths.o, path-coverage.o.
	(GTFILES): Add prime-paths.cc, path-coverage.cc
	(GCOV_OBJS): Add graphds.o, prime-paths.o, bitmap.o
	* builtins.cc (expand_builtin_fork_or_exec): Check
	path_coverage_flag.
	* collect2.cc (main): Add -fno-path-coverage to OBSTACK.
	* common.opt: Add new options -fpath-coverage,
	-fpath-coverage-limit, -Wcoverage-too-many-paths
	* doc/gcov.texi: Add --prime-paths, --prime-paths-lines,
	--prime-paths-source documentation.
	* doc/invoke.texi: Add -fpath-coverage, -fpath-coverage-limit,
	-Wcoverage-too-many-paths documentation.
	* gcc.cc: Link gcov on -fpath-coverage.
	* gcov-counter.def (GCOV_COUNTER_PATHS): New.
	* gcov-io.h (GCOV_TAG_PATHS): New.
	(GCOV_TAG_PATHS_LENGTH): New.
	(GCOV_TAG_PATHS_NUM): New.
	* gcov.cc (class path_info): New.
	(struct coverage_info): Add paths, paths_covered.
	(find_prime_paths): New.
	(add_path_counts): New.
	(find_arc): New.
	(print_usage): Add -e, --prime-paths, --prime-paths-lines,
	--prime-paths-source.
	(process_args): Likewise.
	(json_set_prime_path_coverage): New.
	(output_json_intermediate_file): Call
	json_set_prime_path_coverage.
	(process_all_functions): Call find_prime_paths.
	(generate_results): Call add_path_counts.
	(read_graph_file): Read path counters.
	(read_count_file): Likewise.
	(function_summary): Print path counts.
	(file_summary): Likewise.
	(print_source_line): New.
	(print_prime_path_lines): New.
	(print_inlined_separator): New.
	(print_prime_path_source): New.
	(output_path_coverage): New.
	(output_lines): Print path coverage.
	* ipa-inline.cc (can_early_inline_edge_p): Check
	path_coverage_flag.
	* passes.cc (finish_optimization_passes): Likewise.
	* profile.cc (branch_prob): Likewise.
	* selftest-run-tests.cc (selftest::run_tests): Run path coverage
	tests.
	* selftest.h (path_coverage_cc_tests): New declaration.
	* tree-profile.cc (tree_profiling): Check path_coverage_flag.
	(pass_ipa_tree_profile::gate): Likewise.
	* path-coverage.cc: New file.
	* prime-paths.cc: New file.

2025-03-26  Jørgen Kvalsvik  <j@lambda.is>

	* gcov.cc (generate_results): Count branches, conditions.
	(function_summary): Output branch, calls, condition count.

2025-03-26  Thomas Schwinge  <thomas@codesourcery.com>

	PR driver/101544
	* gcc.cc (driver_handle_option): Forward host '-lstdc++' to
	offloading compilation.
	* config/gcn/mkoffload.cc (main): Adjust.
	* config/nvptx/mkoffload.cc (main): Likewise.

2025-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119417
	* tree-ssa-math-opts.cc (convert_mult_to_widen): Before changing
	typeN because actual_precision/from_unsignedN differs cast rhsN
	to typeN if it has a different type.
	(convert_plusminus_to_widen): Before changing
	typeN because actual_precision/from_unsignedN differs cast mult_rhsN
	to typeN if it has a different type.

2025-03-26  Jakub Jelinek  <jakub@redhat.com>
	    Andi Kleen  <ak@gcc.gnu.org>

	PR gcov-profile/118442
	* profile.cc (branch_prob): Ignore EDGE_FAKE edges from musttail calls
	to EXIT.

2025-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR target/119450
	* config/i386/i386.md (narrow test peephole2): Test for
	offsettable_memref_p in condition.

2025-03-26  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_mov_fp, znver4_sse_mov_fp_load,
	znver5_sse_mov_fp_load, znver4_sse_mov_fp_store,
	znver5_sse_mov_fp_store): Also match V1SF and DF.

2025-03-26  Richard Biener  <rguenther@suse.de>

	PR target/119010
	* config/i386/zn4zn5.md (znver4_imov_double_store,
	znver5_imov_double_store, znver4_imov_store, znver5_imov_store):
	New reservations for integer stores.

2025-03-26  Richard Biener  <rguenther@suse.de>

	PR middle-end/118795
	* match.pd (vec_perm <vec_perm <a, b>> -> vec_perm <a, b>):
	Use the appropriate check to see whether the original
	outer permute was supported.

2025-03-26  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2-512convertintrin.h (_mm512_mask_cvtx2ps_ph): Formatting fixes
	(_mm512_mask_cvtx_round2ps_ph): Ditto
	(_mm512_maskz_cvtx_round2ps_ph): Ditto
	(_mm512_cvtbiassph_bf8): Rename to _mm512_cvts_biasph_bf8.
	(_mm512_mask_cvtbiassph_bf8): Rename to _mm512_mask_cvts_biasph_bf8.
	(_mm512_maskz_cvtbiassph_bf8): Rename to _mm512_maskz_cvts_biasph_bf8.
	(_mm512_cvtbiassph_hf8): Rename to _mm512_cvts_biasph_hf8.
	(_mm512_mask_cvtbiassph_hf8): Rename to _mm512_mask_cvts_biasph_hf8.
	(_mm512_maskz_cvtbiassph_hf8): Rename to _mm512_maskz_cvts_biasph_hf8.
	(_mm512_cvts2ph_bf8): Rename to _mm512_cvts_2ph_bf8.
	(_mm512_mask_cvts2ph_bf8): Rename to _mm512_mask_cvts_2ph_bf8.
	(_mm512_maskz_cvts2ph_bf8): Rename to _mm512_maskz_cvts_2ph_bf8.
	(_mm512_cvts2ph_hf8): Rename to _mm512_cvts_2ph_hf8.
	(_mm512_mask_cvts2ph_hf8): Rename to _mm512_mask_cvts_2ph_hf8.
	(_mm512_maskz_cvts2ph_hf8): Rename to _mm512_maskz_cvts_2ph_hf8.
	(_mm512_cvtsph_bf8): Rename to _mm512_cvts_ph_bf8.
	(_mm512_mask_cvtsph_bf8): Rename to _mm512_mask_cvts_ph_bf8.
	(_mm512_maskz_cvtsph_bf8): Rename to _mm512_maskz_cvts_ph_bf8.
	(_mm512_cvtsph_hf8): Rename to _mm512_cvts_ph_hf8.
	(_mm512_mask_cvtsph_hf8): Rename to _mm512_mask_cvts_ph_hf8.
	(_mm512_maskz_cvtsph_hf8): Rename to _mm512_maskz_cvts_ph_hf8.
	* config/i386/avx10_2convertintrin.h
	(_mm_cvtbiassph_bf8): Rename to _mm_cvts_biasph_bf8.
	(_mm_mask_cvtbiassph_bf8): Rename to _mm_mask_cvts_biasph_bf8.
	(_mm_maskz_cvtbiassph_bf8): Rename to _mm_maskz_cvts_biasph_bf8.
	(_mm256_cvtbiassph_bf8): Rename to _mm256_cvts_biasph_bf8.
	(_mm256_mask_cvtbiassph_bf8): Rename to _mm256_mask_cvts_biasph_bf8.
	(_mm256_maskz_cvtbiassph_bf8): Rename to _mm256_maskz_cvts_biasph_bf8.
	(_mm_cvtbiassph_hf8): Rename to _mm_cvts_biasph_hf8.
	(_mm_mask_cvtbiassph_hf8): Rename to _mm_mask_cvts_biasph_hf8.
	(_mm_maskz_cvtbiassph_hf8): Rename to _mm_maskz_cvts_biasph_hf8.
	(_mm256_cvtbiassph_hf8): Rename to _mm256_cvts_biasph_hf8.
	(_mm256_mask_cvtbiassph_hf8): Rename to _mm256_mask_cvts_biasph_hf8.
	(_mm256_maskz_cvtbiassph_hf8): Rename to _mm256_maskz_cvts_biasph_hf8.
	(_mm_cvts2ph_bf8): Rename to _mm_cvts_2ph_bf8.
	(_mm_mask_cvts2ph_bf8): Rename to _mm_mask_cvts_2ph_bf8.
	(_mm_maskz_cvts2ph_bf8): Rename to _mm_maskz_cvts_2ph_bf8.
	(_mm256_cvts2ph_bf8): Rename to _mm256_cvts_2ph_bf8.
	(_mm256_mask_cvts2ph_bf8): Rename to _mm256_mask_cvts_2ph_bf8.
	(_mm256_maskz_cvts2ph_bf8): Rename to _mm256_maskz_cvts_2ph_bf8.
	(_mm_cvts2ph_hf8): Rename to _mm_cvts_2ph_hf8.
	(_mm_mask_cvts2ph_hf8): Rename to _mm_mask_cvts_2ph_hf8.
	(_mm_maskz_cvts2ph_hf8): Rename to _mm_maskz_cvts_2ph_hf8.
	(_mm256_cvts2ph_hf8): Rename to _mm256_cvts_2ph_hf8.
	(_mm256_mask_cvts2ph_hf8): Rename to _mm256_mask_cvts_2ph_hf8.
	(_mm256_maskz_cvts2ph_hf8): Rename to _mm256_maskz_cvts_2ph_hf8.
	(_mm_cvtsph_bf8): Rename to _mm_cvts_ph_bf8.
	(_mm_mask_cvtsph_bf8): Rename to _mm_mask_cvts_ph_bf8.
	(_mm_maskz_cvtsph_bf8): Rename to _mm_maskz_cvts_ph_bf8.
	(_mm256_cvtsph_bf8): Rename to _mm256_cvts_ph_bf8.
	(_mm256_mask_cvtsph_bf8): Rename to _mm256_mask_cvts_ph_bf8.
	(_mm256_maskz_cvtsph_bf8): Rename to _mm256_maskz_cvts_ph_bf8.
	(_mm_cvtsph_hf8): Rename to _mm_cvts_ph_hf8.
	(_mm_mask_cvtsph_hf8): Rename to _mm_mask_cvts_ph_hf8.
	(_mm_maskz_cvtsph_hf8): Rename to _mm_maskz_cvts_ph_hf8.
	(_mm256_cvtsph_hf8): Rename to _mm256_cvts_ph_hf8.
	(_mm256_mask_cvtsph_hf8): Rename to _mm256_mask_cvts_ph_hf8.
	(_mm256_maskz_cvtsph_hf8): Rename to _mm256_maskz_cvts_ph_hf8.

2025-03-25  Iain Sandoe  <iain@sandoe.co.uk>

	* gcov.cc (get_gcov_intermediate_filename): Use lbasename().

2025-03-25  Iain Sandoe  <iain@sandoe.co.uk>

	PR other/119250
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Match the configure test in libiberty when checking
	the basename decl.

2025-03-25  Sandra Loosemore  <sloosemore@baylibre.com>
	    Tobias Burnus  <tburnus@baylibre.com>

	* gimplify.cc (modify_call_for_omp_dispatch): Adjust arguments.
	Remove the "sorry" for the case where new interop objects must be
	constructed, and add code to make it work instead.
	(expand_variant_call_expr): Adjust arguments and call to
	modify_call_for_omp_dispatch.
	(gimplify_variant_call_expr): Simplify logic for calling
	expand_variant_call_expr.

2025-03-25  Jakub Jelinek  <jakub@redhat.com>

	PR target/96226
	PR target/119428
	* config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask,
	splitter after *<rotate_insn><mode>3_mask_1): Revert 2020-12-05
	changes.

2025-03-25  Vineet Gupta  <vineetg@rivosinc.com>

	PR target/119224
	* config/riscv/autovec.md: Disable abd splitter.

2025-03-25  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/119325
	* doc/install.texi (gcn): Change ROCm > 6.3.2 to >6.3.3 for generic
	support; mention Newlib commit that fixes a SIMD math issue.

2025-03-25  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/118627
	* omp-general.cc (omp_parse_access_method): Change to return void.
	(omp_parse_access_methods): Return void; remove 'if' around a
	function call.
	(omp_parse_expr): Remove 'if' around a function call.

2025-03-25  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.md (<US>mull): Add alternatives that allow Rs
	to be tied to either Rdlo or Rdhi.

2025-03-25  Richard Earnshaw  <rearnsha@arm.com>

	PR middle-end/117811
	* optabs.cc (expand_binop_directly): Remove LAST as an argument,
	instead record the last insn on entry.  Only delete insns if
	we need to restart and restart by calling ourself, not expand_binop.
	(expand_binop): Update callers to expand_binop_directly.  If it
	fails to expand the operation, delete back to LAST.

2025-03-25  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119376
	* tree-tailcall.cc (suitable_for_tail_opt_p): Add DIAG_MUSTTAIL
	argument, propagate it down to maybe_error_musttail.
	(suitable_for_tail_call_opt_p): Likewise.
	(maybe_error_musttail): Add DIAG_MUSTTAIL argument.  Don't emit error
	for gimple_call_must_tail_p calls if it is false.
	(find_tail_calls): Add DIAG_MUSTTAIL argument, propagate it down to
	maybe_error_musttail, suitable_for_tail_opt_p,
	suitable_for_tail_call_opt_p and find_tail_calls calls.
	(tree_optimize_tail_calls_1): Add DIAG_MUSTTAIL argument, propagate
	it down to find_tail_calls and if set, clear cfun->has_musttail flag
	at the end.  Rename OPT_MUSTCALL argument to OPT_MUSTTAIL.
	(execute_tail_calls): Pass true to DIAG_MUSTTAIL
	tree_optimize_tail_calls_1 argument.
	(pass_tail_recursion::execute): Pass false to DIAG_MUSTTAIL
	tree_optimize_tail_calls_1 argument.
	(pass_musttail::gate): Don't test flag_optimize_sibling_calls.
	(pass_musttail::execute): Pass true to DIAG_MUSTTAIL
	tree_optimize_tail_calls_1 argument.

2025-03-24  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118616
	* tree-vect-generic.cc (expand_vector_conversion): Add
	an assert that converts vect is non empty if
	supportable_indirect_convert_operation returns true.

2025-03-24  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/101544
	* config/nvptx/nvptx.cc (nvptx_asm_output_def_from_decls)
	[ACCEL_COMPILER]: Special-case certain host-setup symbol aliases.
	* varasm.cc (do_assemble_alias) [ACCEL_COMPILER]: Adjust.

2025-03-24  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.cc (default_ptx_version_option): Default at
	least to '-mptx=6.3'.
	* doc/invoke.texi (Nvidia PTX Options): Update '-mptx=[...]'.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h
	(get_available_features): Change to FEATURE_AVX10_1.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX10_1_512_SET): Renamed to ...
	(OPTION_MASK_ISA2_AVX10_1_SET): ... this.
	(OPTION_MASK_ISA2_AVX10_2_SET): Use renamed macro.
	(OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
	(ix86_handle_option): Ditto.
	(processor_alias_table): Use P_PROC_AVX10_1.
	* common/config/i386/i386-cpuinfo.h
	(enum feature_priority): Rename from AVX10_1_512 to AVX10_1.
	(enum processor_features): Ditto.
	* common/config/i386/i386-isas.h: Add avx10.1.
	* config/i386/driver-i386.cc
	(host_detect_local_cpu): Use renamed enum.
	* config/i386/i386-c.cc
	(ix86_target_macros_internal): Rename to avx10.1.
	* config/i386/i386-isa.def (AVX10_1_512): Rename to ...
	(AVX10_1): ... this.
	* config/i386/i386-options.cc (isa2_opts): Rename to avx10.1.
	(ix86_valid_target_attribute_inner_p): Add avx10.1.
	(ix86_option_override_internal): Rename to AVX10_1.
	Revise warnings to mention behavior change for option
	combination in GCC 16.
	* config/i386/i386.h (PTA_DIAMONDRAPIDS): Use AVX10_1.
	* config/i386/i386.opt: Add avx10.1.
	Add deprecate warnings for mevex512 and mavx10.1-256/512.
	* config/i386/i386.opt.urls: Add avx10.1.
	* doc/extend.texi: Ditto.
	* doc/sourcebuild.texi: Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h
	(get_available_features): Revise the logic AVX10 version.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX10_2_256_SET): Removed.
	(OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto.
	(OPTION_MASK_ISA2_AVX10_2_SET): New.
	(OPTION_MASK_ISA2_AMX_AVX512_SET): Use AVX10.2 macro.
	(OPTION_MASK_ISA2_AVX10_2_UNSET): Ditto.
	(ix86_handle_option): Remove avx10.2-256 part. Adjust avx10.2.
	* common/config/i386/i386-cpuinfo.h
	(enum processor_features): Remove FEATURE_AVX10_2_256 and skip
	the value for it. Change the name from FEATURE_AVX10_2_512 to
	FEATURE_AVX10_2.
	* common/config/i386/i386-isas.h: Remove avx10.2-256/512.
	* config/i386/avx10_2-512bf16intrin.h: Use avx10.2 instead of
	avx10.2-256/512.
	* config/i386/avx10_2-512convertintrin.h: Ditto.
	* config/i386/avx10_2-512mediaintrin.h: Ditto.
	* config/i386/avx10_2-512minmaxintrin.h: Ditto.
	* config/i386/avx10_2-512satcvtintrin.h: Ditto.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/avx10_2convertintrin.h: Ditto.
	* config/i386/avx10_2mediaintrin.h: Ditto.
	* config/i386/avx10_2minmaxintrin.h: Ditto.
	* config/i386/avx10_2satcvtintrin.h: Ditto.
	* config/i386/movrsintrin.h: Ditto.
	* config/i386/sm4intrin.h: Ditto.
	* config/i386/cpuid.h (bit_AVX10_256): Removed.
	(bit_AVX10_512): Ditto.
	* config/i386/driver-i386.cc (host_detect_local_cpu): Adjust
	Diamond Rapids and -march=native condition.
	* config/i386/i386-builtin.def (BDESC): Use AVX10.2 macro
	instead of AVX10.2-256/512.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
	* config/i386/i386-expand.cc
	(ix86_expand_branch): Use TARGET_AVX10_2 instead of specifying
	vector size.
	(ix86_prepare_fp_compare_args): Ditto.
	(ix86_expand_fp_compare): Ditto.
	(ix86_ssecom_setcc): Ditto.
	(ix86_expand_sse_comi): Ditto.
	(ix86_expand_sse_comi_round): Ditto.
	(ix86_check_builtin_isa_match): Ditto.
	* config/i386/i386.cc (ix86_fp_compare_code_to_integer): Ditto.
	(ix86_get_mask_mode): Ditto.
	* config/i386/i386.h (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P): Ditto.
	* config/i386/i386.md: Ditto.
	* config/i386/mmx.md: Ditto.
	* config/i386/sse.md: Ditto.
	* config/i386/predicates.md: Ditto.
	* config/i386/i386-isa.def (AVX10_2_256): Removed.
	(AVX10_2_512): Removed.
	(AVX10_2): New.
	* config/i386/i386-options.cc
	(isa2_opts): Remove avx10.2-256/512.
	(ix86_valid_target_attribute_inner_p): Ditto.
	(PTA_DIAMONDRAPIDS): Use PTA_AVX10_2.
	* config/i386/i386.opt: Remove avx10.2-256/512.
	* config/i386/i386.opt.urls: Ditto.
	* doc/extend.texi: Ditto.
	* doc/invoke.texi: Ditto.
	* doc/sourcebuild.texi: Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config.gcc: Add avx10_2roundingintrin.h.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT, V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT,
	V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT, UQI_FTYPE_V4DF_V4DF_INT_UQI_INT,
	UHI_FTYPE_V16HF_V16HF_INT_UHI_INT, UQI_FTYPE_V8SF_V8SF_INT_UQI_INT.
	* config/i386/immintrin.h: Include avx10_2roundingintrin.h.
	* config/i386/sse.md: Change subst_attr name due to renaming.
	* config/i386/subst.md:
	(<round_mode512bit_condition>): Add condition check for avx10.2
	rounding control 256bit intrins and renamed to ...
	(<round_mode_condition>): ...this.
	(round_saeonly_mode512bit_condition): Add condition check for
	avx10.2 rounding control 256 bit intris and renamed to ...
	(round_saeonly_mode_condition): ...this.
	* config/i386/avx10_2roundingintrin.h: New file.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: Add new intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8SI_V8SF_UQI_INT, V4SF_FTYPE_V4DF_V4SF_UQI_INT,
	V8HF_FTYPE_V8SI_V8HF_UQI_INT, V8HF_FTYPE_V4DF_V8HF_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode><mask_name><round_name>):
	Add condition check.
	(avx512fp16_vcvtpd2ph_v4df_mask_round): New expand.
	(*avx512fp16_vcvt<castmode>2ph_<mode>_mask): Change name to
	avx512fp16_vcvt<castmode>2ph_<mode>_mask<round_name>_1
	and extend pattern to generate 256bit insns.
	(avx_cvtpd2ps256<mask_name>): Change name to
	avx_cvtpd2ps256<mask_name><round_name> and extend pattern to
	generate 256bit insns.
	* config/i386/subst.md (round_applied): New condition.
	(round_suff): New iterator.
	(round_mode_condition): Add V32HI check for 512bit.
	(round_saeonly_mode_condition): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: Add new intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DI_FTYPE_V4DF_V4DI_UQI_INT, V4SI_FTYPE_V4DF_V4SI_UQI_INT.
	* config/i386/sse.md:
	(avx_cvtpd2dq256<mask_name>): Change name to
	avx_cvtpd2dq256<mask_name><round_name> and extend pattern to
	generate 256bit insns.
	(fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
	Add round_mode_condition.
	* config/i386/subst.md (round_pd2udqsuff): New iterator.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8HF_V8SF_UQI_INT, V8SI_FTYPE_V8HF_V8SI_UQI_INT,
	V4DF_FTYPE_V8HF_V4DF_UQI_INT, V4DI_FTYPE_V8HF_V4DI_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_float_extend_ph<mode>2<mask_name><round_saeonly_name>):
	Add condition check.
	(avx512fp16_vcvtph2<sseintconvertsignprefix><sseintconvert>_<mode>
	<mask_name><round_name>):
	Ditto.
	(avx512fp16_float_extend_ph<mode>2<mask_name>): Extend round saeonly.
	(vcvtph2ps256<mask_name>): Ditto.
	* config/i386/subst.md
	(round_saeonly_applied): New condition.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HI_FTYPE_V16HF_V16HI_UHI_INT, V4DF_FTYPE_V4SF_V4DF_UQI_INT
	V8HF_FTYPE_V8SF_V8HF_UQI_INT.
	* config/i386/sse.md
	(avx512fp16_vcvt<castmode>2ph_<mode><mask_name><round_name>):
	Add round condition check.
	* config/i386/subst.md (round_mode_condition): Add V16HI check for
	256bit.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SI_FTYPE_V8SF_V8SI_UQI_INT, V4DI_FTYPE_V4SF_V4DI_UQI_INT.
	* config/i386/sse.md
	(<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>):
	Extend to round.
	(<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
	Add round condition check.
	* config/i386/subst.md (round_constraint4): New.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DF_FTYPE_V4DI_V4DF_UQI_INT, V4SF_FTYPE_V4DI_V4SF_UQI_INT,
	V8HF_FTYPE_V4DI_V8HF_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_vcvt<floatsuffix>qq2ph_v4di_mask_round): New expand.
	(*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask):
	Extend round control and add "_1" suffix.
	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
	Add condition check.
	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
	Ditto.
	(float<floatunssuffix><mode><ssePSmode2lower>2<mask_name><round_name>):
	Limit suffix output.
	(unspec_fix_truncv4dfv4si2<mask_name>): Extend round control.
	(unspec_fixuns_truncv4dfv4si2<mask_name>): Ditto.
	* config/i386/subst.md (round_qq2pssuff): New iterator.
	(round_saeonly_suff): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md (avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name>):
	Extend round control for 256bit.
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<mask_name>):
	Ditto.
	(avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name><round_saeonly_name>):
	Add condition check.
	* config/i386/subst.md
	(round_saeonly_mode_condition): Add V16HI check for 256bit.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md
	(unspec_fix_truncv8sfv8si2<mask_name>): Extend rounding control.
	(<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
	Ditto.
	(<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):
	Add condition check.
	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
	Remove round_saeonly_name.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HF_FTYPE_V16HI_V16HF_UHI_INT.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HF_FTYPE_V16HF_V16HF_INT, V16HF_FTYPE_V16HF_V16HF_V16HF_INT,
	V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT,
	V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT,
	V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT.
	* config/i386/sse.md:
	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmadd_<mode>_mask3<round_name>): Add condition check.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmaddsub_<mode>_mask<round_name>): Add condition check.
	(<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmsub_<mode>_mask<round_name>): Add condition check.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fnmsub_<mode>_mask3<round_name>): Add condition check.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8SF_V8SF_UQI_INT, V4DF_FTYPE_V4DF_V4DF_UQI_INT,
	V16HF_FTYPE_V16HF_V16HF_UHI_INT, V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT,
	V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT, V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT.
	* config/i386/sse.md:
	(<avx512>_getexp<mode><mask_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_getmant<mode><mask_name><round_saeonly_name>):
	Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin):
	Handle V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI_INT,
	V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI_INT.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_rndscale<mode><mask_name><round_saeonly_name>): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/sse.md:
	(<avx512>_scalef<mode><mask_name><round_name>): Add condition check.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	Revert:
	2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx10_2satcvtintrin.h: Remove rounding intrins.
	Use non-round intrins.
	* config/i386/i386-builtin.def (BDESC): Ditto.

2025-03-24  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx10_2convertintrin.h: Remove rounding intrins.
	Use non-round builtins.
	* config/i386/avx10_2minmaxintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/i386-builtin-types.def: Remove unused type.
	* config/i386/i386-expand.cc
	(ix86_expand_args_builtin): Ditto.
	(ix86_expand_round_builtin): Ditto.

2025-03-23  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Nonlocal Gotos): Group with other built-ins
	sections.
	(Constructing Calls): Likewise.
	(Pragmas): Move earlier in the section, before the built-ins docs.
	(Thread-Local): Likewise.
	(OpenMP): Likewise.
	(OpenACC): Likewise.

2025-03-23  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Syntax Extensions): New section.
	(Statement Exprs): Make it a subsection of the above.
	(Local Labels): Likewise.
	(Labels as Values): Likewise.
	(Nested Functions): Likewise.
	(Typeof): Likewise.
	(Offsetof): Likewise.
	(Alignment): Likewise.
	(Incomplete Enums): Likewise.
	(Variadic Macros): Likewise.
	(Conditionals): Likewise.
	(Case Ranges): Likewise.
	(Mixed Labels and Declarations): Likewise.
	(C++ Comments): Likewise.
	(Escaped Newlines): Likewise.
	(Hex Floats): Likewise.
	(Binary constants): Likewise.
	(Dollar Signs): Likewise.
	(Character Escapes): Likewise.
	(Alternate Keywords): Likewise.
	(Function Names): Likewise.
	(Semantic Extensions): New section.
	(Function Prototypes): Make it a subsection of the above.
	(Pointer Arith): Likewise.
	(Variadic Pointer Args): Likewise.
	(Pointers to Arrays): Likewise.
	(Const and Volatile Functions): Likewise.

2025-03-23  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Aggregate Types): New section.
	(Variable Length): Make it a subsection of the above.
	(Zero Length): Likewise.
	(Empty Structures): Likewise.
	(Flexible Array Members in Unions): Likewise.
	(Flexible Array Members alone in Structures): Likewise.
	(Unnamed Fields): Likewise.
	(Cast to Union): Likewise.
	(Subscripting): Likewise.
	(Initializers): Likewise.
	(Compound Literals): Likewise.
	(Designated Inits): Likewise.

2025-03-23  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/42270
	* doc/extend.texi (Additional Numeric Types): New section.
	(__int128): Make it a subsection of the above.
	(Long Long): Likewise.
	(Complex): Likewise.
	(Floating Types): Likewise.
	(Half-Precision): Likewise.
	(Decimal Float): Likewise.
	(Fixed-Point): Likewise.

2025-03-23  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-mcus.def: Add AVR32SD20, AVR32SD28, AVR32SD32,
	AVR64SD28, AVR64SD32, AVR64SD48.
	* doc/avr-mmcu.texi: Rebuild.

2025-03-23  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Optimization Options)
	<-maccumulate-args>: Refer to -fdefer-pop.
	<-muse-nonzero-bits>: Re-formulate what the option does.

2025-03-22  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_option_override): Use
	"avr-peep2-after-fuse-move" as dump name instead of "peephole2".

2025-03-22  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt.urls: Add -muse-nonzero-bits.

2025-03-22  Georg-Johann Lay  <avr@gjlay.de>

	PR target/119421
	* config/avr/avr.opt (-muse-nonzero-bits): New option.
	* config/avr/avr-protos.h (avr_nonzero_bits_lsr_operands_p): New.
	(make_avr_pass_split_nzb): New.
	* config/avr/avr.cc (avr_nonzero_bits_lsr_operands_p): New function.
	(avr_rtx_costs_1): Return costs for the new insns.
	* config/avr/avr.md (nzb): New insn attribute.
	(*nzb=1.<code>...): New insns to better support some bit
	operations for <code> in AND, IOR, XOR.
	* config/avr/avr-passes.def (avr_pass_split_nzb): Insert pass
	atfer combine.
	* config/avr/avr-passes.cc (avr_pass_data_split_nzb). New pass data.
	(avr_pass_split_nzb): New pass.
	(make_avr_pass_split_nzb): New function.
	* common/config/avr/avr-common.cc (avr_option_optimization_table):
	Enable -muse-nonzero-bits for -O2 and higher.
	* doc/invoke.texi (AVR Options): Document -muse-nonzero-bits.

2025-03-22  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_attrs_section_name): New function.
	(avr_insert_attributes): Add "used" attribute to functions
	in .initN and .finiN.

2025-03-22  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (DL_LIBRARY): New.

2025-03-22  Jakub Jelinek  <jakub@redhat.com>

	* gimplify.cc (warn_switch_unreachable_and_auto_init_r): Add missing
	space in the middle of diagnostics.
	* tree-vect-stmts.cc (vectorizable_load): Add missing space in the
	middle of debug dump message.
	* sym-exec/sym-exec-state.cc (state::check_args_compatibility):
	Likewise.

2025-03-21  Surya Kumari Jangala  <jskumari@linux.ibm.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/116028
	PR rtl-optimization/118615
	* lra-constraints.cc (first_call_insn): New variable.
	(split_reg): Spill register before first_call_insn if call_save_p
	and the call is in a different bb in the ebb.
	(split_if_necessary): Formatting fix.
	(inherit_in_ebb): Set first_call_insn when handling a CALL_INSN.
	For successful split_if_necessary with before_p, only change
	use_insn if it emitted any new instructions before curr_insn.
	Clear first_call_insn before returning.

2025-03-21  Paul-Antoine Arras  <parras@baylibre.com>
	    Tobias Burnus  <tburnus@baylibre.com>

	* builtin-types.def
	(BT_FN_VOID_INT_INT_PTR_PTR_PTR_INT_PTR_INT_PTR_UINT_PTR): New.
	* gimple-low.cc (lower_stmt): Handle GIMPLE_OMP_INTEROP.
	* gimple-pretty-print.cc (dump_gimple_omp_interop): New function.
	(pp_gimple_stmt_1): Handle GIMPLE_OMP_INTEROP.
	* gimple.cc (gimple_build_omp_interop): New function.
	(gimple_copy): Handle GIMPLE_OMP_INTEROP.
	* gimple.def (GIMPLE_OMP_INTEROP): Define.
	* gimple.h (gimple_build_omp_interop): Declare.
	(gimple_omp_interop_clauses): New function.
	(gimple_omp_interop_clauses_ptr): Likewise.
	(gimple_omp_interop_set_clauses): Likewise.
	(gimple_return_set_retval): Handle GIMPLE_OMP_INTEROP.
	* gimplify.cc (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_INIT,
	OMP_CLAUSE_USE and OMP_CLAUSE_DESTROY.
	(gimplify_omp_interop): New function.
	(gimplify_expr): Replace sorry with call to gimplify_omp_interop.
	* omp-builtins.def (BUILT_IN_GOMP_INTEROP): Define.
	* omp-low.cc (scan_sharing_clauses): Handle OMP_CLAUSE_INIT,
	OMP_CLAUSE_USE and OMP_CLAUSE_DESTROY.
	(scan_omp_1_stmt): Handle GIMPLE_OMP_INTEROP.
	(lower_omp_interop_action_clauses): New function.
	(lower_omp_interop): Likewise.
	(lower_omp_1): Handle GIMPLE_OMP_INTEROP.

2025-03-21  Jason Merrill  <jason@redhat.com>

	PR c++/114992
	* multiple_target.cc (create_dispatcher_calls):
	remove_from_same_comdat_group before add_to_same_comdat_group.

2025-03-21  Dhruv Chawla  <dhruvc@nvidia.com>

	* config/aarch64/aarch64-cores.def (olympus): New entry.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi (AArch64 Options): Document the above.

2025-03-21  Antoni Boucher  <bouanto@zoho.com>

	* config/i386/i386-rust-and-jit.inc: New file.
	* config/i386/i386-rust.cc: Move code to i386-rust-and-jit.inc.

2025-03-21  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119376
	* ipa-icf-gimple.cc (func_checker::compare_gimple_call): Return false
	for gimple_call_must_tail_p mismatches.

2025-03-21  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119376
	* ipa-split.cc (split_function): Call gimple_call_set_must_tail
	on the call to outlined partition if has_musttail and
	!add_tsan_func_exit.

2025-03-21  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/119376
	* tree-inline.cc (remap_gimple_stmt): Silently clear
	gimple_call_must_tail_p on inlined call stmts if id->call_stmt
	is a call without that flag set.

2025-03-21  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/119235
	* config/s390/s390.cc (s390_hard_regno_mode_ok): Accept only
	Pmode for registers AP/FP/RA.

2025-03-21  Richard Biener  <rguenther@suse.de>

	* cgraphunit.cc (symbol_table::finalize_compilation_unit):
	Put early debug generation under TV_SYMOUT.

2025-03-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/118914
	* combine.cc (recog_for_combine): Add old_nregs and new_nregs
	argument (defaulting to 0). Update call to recog_for_combine_1.
	(combine_split_insns): Add old_nregs and new_nregs arguments,
	store the old and new max registers to them.
	(try_combine): Update calls to combine_split_insns and
	pass old_nregs and new_nregs for the i3 call to recog_for_combine.
	(find_split_point): Update call to combine_split_insns; ignoring
	the values there.
	(recog_for_combine_1): Add old_nregs and new_nregs arguments,
	if the insn was recognized (and not to no-op move), add the
	REG_DEAD notes to pnotes argument.

2025-03-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119389
	* tree-ssa-sccvn.cc (dominated_by_p_w_unex): Limit the number
	of predecessors of a CFG merge we try to skip.

2025-03-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Revert:
	2025-03-11  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config.gcc: Fail in case of option --with-mode=esa.
	* config/s390/s390.cc (s390_option_override_internal): Default
	to z/Architecture mode.
	* config/s390/s390.h (DRIVER_SELF_SPECS): Ditto.
	* config/s390/s390.opt: Emit a warning for option -mesa.
	* doc/invoke.texi: Document the change.

2025-03-20  Filip Kastl  <fkastl@suse.cz>

	* gimple-ssa-sccopy.cc (scc_copy_prop::propagate): Don't
	increment after vec::unordered_remove().

2025-03-20  Richard Biener  <rguenther@suse.de>

	* tree-core.h (function_decl_type): Make a scoped enum.
	* tree.h (set_function_decl_type): Adjust.
	(DECL_IS_OPERATOR_NEW_P): Likewise.
	(DECL_SET_IS_OPERATOR_NEW): Likewise.
	(DECL_IS_OPERATOR_DELETE_P): Likewise.
	(DECL_SET_IS_OPERATOR_DELETE): Likewise.
	(DECL_LAMBDA_FUNCTION_P): Likewise.
	(DECL_SET_LAMBDA_FUNCTION): Likewise.
	* lto-streamer-out.cc (hash_tree): Hash all of
	FUNCTION_DECL_DECL_TYPE.
	* tree-streamer-out.cc (pack_ts_function_decl_value_fields):
	Adjust.
	* config/aarch64/aarch64-simd-pragma-builtins.def (vcombine_mf8):
	Use literal zero instead of NONE.

2025-03-20  liuhongt  <hongtao.liu@intel.com>

	PR target/117452
	* config/i386/i386.md (cbranchbf4): Use
	ix86_fp_comparison_operator instead of comparison_operator.

2025-03-20  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2-512satcvtintrin.h: Add "s_" before
	intrinsics' core name.
	* config/i386/avx10_2satcvtintrin.h: Ditto.

2025-03-20  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2-512satcvtintrin.h: Add new intrinsics.
	* config/i386/avx10_2satcvtintrin.h: Ditto.
	* config/i386/i386-builtin-types.def:
	Add DEF_FUNCTION_TYPE (V32HI, V32HF, V32HI, USI),
	(V16SI, V16SF, V16SI, UHI), (V8DI, V8SF, V8DI, UQI),
	(V8DI, V8DF, V8DI, UQI), (V8SI, V8DF, V8SI, UQI).
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-expand.cc: Handle V16SI_FTYPE_V16SF_V16SI_UHI,
	V32HI_FTYPE_V32HF_V32HI_USI, V8DI_FTYPE_V8SF_V8DI_UQI,
	V8DI_FTYPE_V8DF_V8DI_UQI, V8SI_FTYPE_V8DF_V8SI_UQI.

2025-03-20  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2-512satcvtintrin.h: Change *i[u]bs's type suffix
	of intrin name.
	* config/i386/avx10_2satcvtintrin.h: Ditto.

2025-03-19  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/119270
	* ira-costs.cc (calculate_equiv_gains): Ignore equiv init insns
	only for invariants.

2025-03-19  David Malcolm  <dmalcolm@redhat.com>

	PR c/119366
	* diagnostic-format-sarif.cc (test_message_with_embedded_link):
	Convert diagnostic_context from one urlifier to a stack of
	urlifiers, where each node in the stack tracks whether the
	urlifier is owned or borrowed.
	* diagnostic.cc (diagnostic_context::initialize): Likewise.
	(diagnostic_context::finish): Likewise.
	(diagnostic_context::set_urlifier): Delete.
	(diagnostic_context::push_owned_urlifier): New.
	(diagnostic_context::push_borrowed_urlifier): New.
	(diagnostic_context::pop_urlifier): New.
	(diagnostic_context::get_urlifier): Reimplement in terms of stack.
	(diagnostic_context::override_urlifier): Delete.
	* diagnostic.h (diagnostic_context::set_urlifier): Delete decl.
	(diagnostic_context::override_urlifier): Delete decl.
	(diagnostic_context::push_owned_urlifier): New decl.
	(diagnostic_context::push_borrowed_urlifier): New decl.
	(diagnostic_context::pop_urlifier): New decl.
	(diagnostic_context::get_urlifier): Make return value const; hide
	implementation.
	(diagnostic_context::m_urlifier): Replace with...
	(diagnostic_context::urlifier_stack_node): ... this and...
	(diagnostic_context::m_urlifier_stack): ...this.
	* gcc-urlifier.cc
	(auto_override_urlifier::auto_override_urlifier): Reimplement.
	(auto_override_urlifier::~auto_override_urlifier): Reimplement.
	* gcc-urlifier.h (class auto_override_urlifier): Reimplement.
	(auto_urlify_attributes::auto_urlify_attributes): Update for
	pass-by-reference.
	* gcc.cc (driver::global_initializations): Update for
	reimplementation of urlifiers in terms of a stack.
	* toplev.cc (general_init): Likewise.

2025-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/119357
	* config/i386/sse.md (pmovmskb 0xffff to ptest splitter,
	*pmovsk_ptest_<mode>_avx512): Force operands[0] into a REG.

2025-03-19  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/aarch64-arches.def (...): Add SVE2p1.
	* doc/invoke.texi (AArch64 Options): Document +sve2p1 in
	-march=armv9.4-a.

2025-03-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add
	fa0-fa7, ft0-ft16, and fs0-fs7.

2025-03-18  Georg-Johann Lay  <avr@gjlay.de>

	PR target/119355
	* config/avr/avr-passes.cc (memento_t::apply): Only
	read values[p.arg] when it is actually used.

2025-03-18  Iain Sandoe  <iain@sandoe.co.uk>

	PR cobol/119301
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Add check for get_current_dir_name.

2025-03-18  Jakub Jelinek  <jakub@redhat.com>

	PR c/116545
	* doc/extend.texi (musttail statement attribute): Document
	that musttail GNU attribute can be used as well.

2025-03-18  Michael Matz  <matz@suse.de>

	* config/rs6000/rs6000.opt.urls: Regenerate.

2025-03-18  Jakub Jelinek  <jakub@redhat.com>

	* doc/sourcebuild.texi (dg-output-file): Document.

2025-03-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-ssa-sccopy.cc (scc_copy_prop::replace_scc_by_value): Dump
	what is being replaced with what.

2025-03-18  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119307
	* lra.cc (lra_rtx_hash): Handle SUBREG.

2025-03-18  Richard Biener  <rguenther@suse.de>

	PR debug/101533
	* dwarf2out.cc (gen_type_die_with_usage): When we have
	output the typedef already do nothing for a typedef variant.
	Do not set TREE_ASM_WRITTEN on the type.

2025-03-18  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md (equality shifted-arith splitter): Do not
	create op AND -1 as it won't be cleaned up post-reload.

2025-03-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* configure: Regenerate.
	* configure.ac: s/gcc_cv_ld64_macosx_version_min/gcc_cv_ld64_macos_version_min/.

2025-03-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (*<or_optab>i<mode>_extrabit): Reject cases
	where we only need to twiddle one bit.  Fix formatting.
	(*andi<mode>extrabit): Likewise.

2025-03-17  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/119285
	* ira-costs.cc (equiv_can_be_consumed_p): Use 2 ways for
	recognizing a valid insn after equiv insertion.

2025-03-17  Michael Matz  <matz@suse.de>

	PR target/112980
	* config/rs6000/rs6000.opt (msplit-patch-nops): New option.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document it.
	* config/rs6000/rs6000.h (machine_function.stop_patch_area_print):
	New member.
	* config/rs6000/rs6000.cc (rs6000_print_patchable_function_entry):
	Emit split nops under control of that one.
	* config/rs6000/rs6000-logue.cc (rs6000_output_function_prologue):
	Add handling of split patch nops.

2025-03-17  Michal Jires  <mjires@suse.cz>

	* common.opt.urls: Regenerate.

2025-03-17  Michal Jires  <mjires@suse.cz>

	* doc/invoke.texi: (Optimize Options):
	Add incremental LTO flags.

2025-03-17  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/119114
	* config/riscv/autovec.md: Apply & 0x1 mask when initializing
	bitmask vector.

2025-03-17  Ayan Shafqat  <ayan.x.shafqat@gmail.com>

	* config/aarch64/arm_acle.h (__fma, __fmaf): New functions.

2025-03-17  Richard Biener  <rguenther@suse.de>

	* opts.cc (gen_producer_string): Record -D and -U
	with _FORTIFY_SOURCE prefix.

2025-03-16  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116256
	* config/riscv/riscv.md (reassociation splitters): Do not load the
	adjusted addend into a register if it fits in a simm12.

2025-03-16  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/113546
	* tree-cfg.cc (first_non_label_stmt): Rename to ...
	(first_non_label_nondebug_stmt): This and use gsi_start_nondebug_after_labels_bb.
	(assign_discriminators): Update call to first_non_label_nondebug_stmt.

2025-03-16  Iain Sandoe  <iain@sandoe.co.uk>

	Backported from master:
	2025-03-16  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/119172
	* config.in: Regenerate.
	* config/darwin.h (DARWIN_PLATFORM_ID): Add the option to
	use -macos_version_min where available.
	* configure: Regenerate.
	* configure.ac: Check for ld64 support of -macos_version_min.

2025-03-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/116572
	* cgraph.cc (cgraph_update_edges_for_call_stmt): Do not update
	edges of clones that are unexpanded thunk.  Assert that the node
	passed as the parameter is not an unexpanded thunk.

2025-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119287
	* match.pd (((X >> C1) & C2) * (1 << C1) to X & (C2 << C1)): Use
	(convert @0) instead of @0 in the substitution.

2025-03-14  Thomas Schwinge  <thomas@codesourcery.com>

	PR target/92713
	PR target/101544
	* config/gcn/gcn.h (LIBSTDCXX): Don't set.
	* config/nvptx/nvptx.h (LIBSTDCXX): Likewise.

2025-03-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119274
	* tree-ssa-sccvn.cc (dominated_by_p_w_unex): Handle the
	top block being the only executable forwarder to a CFG
	merge.

2025-03-14  Richard Sandiford  <richard.sandiford@arm.com>

	* tree-vect-slp.cc (vect_build_slp_instance): Pass the new group
	size (i) rather than 1 to vect_slp_prefer_store_lanes_p.
	(vect_analyze_slp): Only force the use of load-lanes and
	store-lanes if that is preferred for at least one load/store pair.

2025-03-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119155
	* tree-vect-stmts.cc (vectorizable_store): Do not always
	use vector element alignment for VMAT_STRIDED_SLP but
	a more correct alignment towards both ends.
	(vectorizable_load): Likewise.

2025-03-14  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Alternate Keywords): Clean up text and remove
	discussion of "restrict", which is not a GNU extension at all.
	* doc/invoke.texi (C Dialect Options): Remove detailed discussion.

2025-03-13  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/119147
	* ipa-inline.cc: Include ipa-modref-tree.h and
	ipa-modref.h.
	(speculation_useful_p): If target is a clone, speculation is usef;
	fix mixup of caller and callee; speculate also calls not considered
	hot; consider modref summary also possibly useful for optimization.
	* ipa-profile.cc (ipa_profile): Keep non-hot speculations.

2025-03-13  Richard Biener  <rguenther@suse.de>

	* tree.h (DECL_NOT_GIMPLE_REG_P): Update description.

2025-03-13  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* common/config/aarch64/cpuinfo.h: Remove FEAT_PREDRES and FEAT_LS64*.
	* config/aarch64/aarch64-option-extensions.def: Remove FMV support
	for PREDRES.

2025-03-13  Richard Sandiford  <richard.sandiford@arm.com>

	* match.pd: Extend pointer alignment folds so that they handle
	the case where a constant is added before or after the alignment.

2025-03-13  Richard Sandiford  <richard.sandiford@arm.com>

	* match.pd: Fold ((X >> C1) & C2) * (1 << C1) to X & (C2 << C1).

2025-03-13  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/119115
	* config/riscv/riscv-vsetvl.cc (reg_used): New function.
	(reg_single_use_in_avl): Ditto.
	(pre_vsetvl::fuse_local_vsetvl_info): Use reg_single_use_in_avl
	when checking if vsetvl can be deleted.

2025-03-13  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/117955
	* config/riscv/riscv-vsetvl.cc: Use LMUL/ratio from vsetvl with
	larger SEW.

2025-03-13  Matthias Klose  <doko@ubuntu.com>

	* configure.ac: Add option --enable-versioned-jit.
	* configure: Regenerate.
	* Makefile.in: Move from jit/Make-lang.in, setting value from
	configure.ac.
	* doc/install.texi: Document option --enable-versioned-jit.

2025-03-13  Xi Ruoyao  <xry111@xry111.site>

	PR target/119238
	* config/loongarch/simd.md (<su>dot_prod<wvec_half><mode>):
	Stop using structured binding.

2025-03-12  Alex Coplan  <alex.coplan@arm.com>

	PR rtl-optimization/116564
	* df-problems.cc (df_simulate_defs): For partial defs, mark the
	register live (treat it as a RMW operation).

2025-03-12  Richard Earnshaw  <rearnsha@arm.com>

	PR target/115439
	* config/arm/predicates.md (vpr_register_operand): Allow type-punning
	subregs.

2025-03-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/116901
	* config/aarch64/aarch64.cc (aarch64_vector_costs::count_ops): Allow
	stmt_info to be null.
	(aarch64_vector_costs::add_stmt_cost): Call count_ops even if
	stmt_info is null.

2025-03-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/116901
	* tree-vect-loop.cc (vectorizable_reduction): Set ncopies to
	SLP_TREE_NUMBER_OF_VEC_STMTS for SLP.

2025-03-12  Jakub Jelinek  <jakub@redhat.com>

	* tree.def (RAW_DATA_CST): Document meaning of NULL RAW_DATA_OWNER.
	(CONSTRUCTOR): Document meaning of RAW_DATA_CST used as element
	value.

2025-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/119204
	PR middle-end/119219
	* builtins.cc (fold_builtin_2): Pass type as another argument
	to fold_builtin_strspn and fold_builtin_strcspn.
	(fold_builtin_strspn): Add type argument, use it instead of
	size_type_node.
	(fold_builtin_strcspn): Add type argument, use it instead of
	TREE_TYPE (expr).

2025-03-12  Jeff Law  <jlaw@ventanamicro.com>

	Revert:
	2025-03-09  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/117467
	* ext-dce.cc (ext_dce_process_uses): When trivially possible advance
	the iterator over the destination of a SET.

2025-03-11  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/119131
	* config/aarch64/aarch64.cc (aarch64_valid_fp_move): Remove check
	for !DECIMAL_FLOAT_MODE_P.
	(aarch64_float_const_representable_p): Reject decimal floating modes.
	* config/aarch64/aarch64.md (mov<mode>): Likewise.

2025-03-11  Jonathan Wakely  <jwakely@redhat.com>

	* doc/extend.texi (Common Variable Attributes): Fix grammar in
	final sentence of -ftrivial-auto-var-init description.

2025-03-11  Juergen Christ  <jchrist@linux.ibm.com>

	* config/s390/s390.cc (s390_delegitimize_address): Add missing case.

2025-03-11  Martin Jambor  <mjambor@suse.cz>

	* tree-ssa-alias.cc (ao_compare::compare_ao_refs): Fix a
	copy-and-paste error.

2025-03-11  Jakub Jelinek  <jakub@redhat.com>

	* dwarf2out.cc (gen_compile_unit_die): Use DW_LANG_Cobol85 if
	language_string is "GCC COBOL" rather than "Cobol".

2025-03-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/119204
	* builtins.cc (fold_builtin_strcspn): Preserve the original
	expression type.

2025-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR c/119183
	* tree.cc (skip_simple_arithmetic): If first operand of binary
	expr is TREE_CONSTANT or TREE_READONLY with no side-effects, call
	tree_invariant_p on that operand first instead of on the second.

2025-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR debug/119190
	* tree-complex.cc (update_complex_assignment, tree_lower_complex):
	Perform simple dce on dce_worklist only if optimize.

2025-03-11  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config.gcc: Fail in case of option --with-mode=esa.
	* config/s390/s390.cc (s390_option_override_internal): Default
	to z/Architecture mode.
	* config/s390/s390.h (DRIVER_SELF_SPECS): Ditto.
	* config/s390/s390.opt: Emit a warning for option -mesa.
	* doc/invoke.texi: Document the change.

2025-03-11  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/115835
	* config/s390/s390.cc (s390_insn_cost): Implement.
	(TARGET_INSN_COST): Define.

2025-03-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119166
	* tree-vect-stmts.cc (get_load_store_type): Guard SLP tree
	access.

2025-03-11  James K. Lowden  <jklowden@symas.com>

	* doc/contrib.texi: Update for gcobol.
	* doc/frontends.texi: Likewise.
	* doc/install.texi: Likewise.
	* doc/invoke.texi: Likewise.
	* doc/sourcebuild.texi: Likewise.
	* doc/standards.texi: Likewise.

2025-03-11  James K. Lowden  <jklowden@symas.com>

	* Makefile.in (installdirs): Create man3 directory.
	* common.opt (static-libgcobol): New driver option.
	* dwarf2out.cc (gen_compile_unit_die): Support Cobol as
	source language.

2025-03-10  Richard Sandiford  <richard.sandiford@arm.com>
	    Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	PR target/115258
	* config/aarch64/aarch64.cc (aarch64_vectorize_vec_perm_const): Use
	d.one_vector_p to decide whether op1 should be a copy of op0.

2025-03-10  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/114991
	* ira-costs.cc (equiv_can_be_consumed_p): Add new argument invariant_p.
	Add code for dealing with the invariant.
	(calculate_equiv_gains): Don't consider init insns.  Pass the new
	argument to equiv_can_be_consumed_p.  Don't treat invariant as
	memory.

2025-03-10  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/invoke.texi (Instrumentation Options): Fix typo introduced
	in commit 313edeeeb607fe32da5633cfb6f91977add446f6.

2025-03-10  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/115439
	* config/arm/mve.md (vec_vcmp, vec_vcmpu, vcond_mask): Use
	vpr_register_operand predicate for MVE_VPRED operands.

2025-03-10  Xi Ruoyao  <xry111@xry111.site>

	PR target/119127
	* config/loongarch/loongarch.cc
	(loongarch_reassoc_shift_bitwise): Sign extend mask to mode,
	specially handle the case it's extended to -1.
	* config/loongarch/loongarch.md
	(loongarch_reassoc_shift_bitwise): Update the comment for the
	special case.

2025-03-10  Jakub Jelinek  <jakub@redhat.com>

	PR c/117178
	* gimple-ssa-warn-access.cc (maybe_warn_nonstring_arg): Look through
	multi-dimensional array types, stop at the innermost ARRAY_TYPE.

2025-03-09  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/117467
	* ext-dce.cc (ext_dce_process_sets): Handle FP destinations better.

2025-03-09  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/117467
	* ext-dce.cc (ext_dce_process_uses): When trivially possible advance
	the iterator over the destination of a SET.

2025-03-09  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118922
	* tree-ssa-phiopt.cc (value_replacement): Set empty_or_with_defined_p
	to false when there is phi nodes for the middle bb.

2025-03-09  Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/118457
	* gimplify.cc (modify_call_for_omp_dispatch): New, containing
	code split from gimplify_call_expr and modified to emit tree
	instead of gimple.  Remove the error for falling through to a call
	to the base function.
	(expand_variant_call_expr): New, split from gimplify_variant_call_expr.
	Call modify_call_for_omp_dispatch on calls to
	variants in a dispatch construct context.
	(gimplify_variant_call_expr): Make it call expand_variant_call_expr
	to do the actual work.
	(gimplify_call_expr): Remove sorry for calls involving both
	dynamic/late selectors and adjust_args/append_args, and adjust
	for new interface.  Move adjust_args/append_args code to
	modify_call_for_omp_dispatch.
	(gimplify_omp_dispatch): Add some comments.

2025-03-08  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Basic Asm): Document that AssemblerInstructions
	can be an asm constexpr.
	(Extended Asm): Move the notes about asm constexprs for
	AssemblerTemplate and Clobbers to the corresponding subsections.
	Remove the notes for OutputOperands and InputOperands and reword
	misleading descriptions of the list item syntax.  Note that
	constraint strings can be asm constexprs.
	(Asm constexprs): Use "title case" for subsection name.  Be
	explicit about what parts of the asm syntax this applies to and
	that the parentheses are required.  Correct markup and terminology.

2025-03-08  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/67301
	* doc/extend.texi (Extended Asm): Clarify that the square brackets
	around the asmSymbolicName of operands are a required part of
	the syntax.

2025-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR c/117178
	* tree.cc (get_attr_nonstring_decl): Look through all ARRAY_REFs, not
	just one and handle COMPONENT_REF and MEM_REF after skipping those
	rather than only when there wasn't ARRAY_REF.  Formatting fix.

2025-03-07  Kees Cook  <kees@kernel.org>
	    Jakub Jelinek  <jakub@redhat.com>

	PR c/117178
	* doc/invoke.texi (Wunterminated-string-initialization): Document
	the new interaction between this warning and -Wc++-compat and that
	initialization of decls with nonstring attribute aren't warned about.

2025-03-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR sanitizer/56682
	* doc/invoke.texi (Instrumentation Options): Document that -g
	is useful with -fsanitize=thread and -fsanitize=address.
	Also mention -fno-omit-frame-pointer per the asan wiki.

2025-03-07  Richard Sandiford  <richard.sandiford@arm.com>
	    Jan Hubicka  <hubicka@ucw.cz>
	    H.J. Lu  <hjl.tools@gmail.com>

	PR rtl-optimization/117477
	* config/aarch64/aarch64.cc (aarch64_count_saves): New function.
	(aarch64_count_above_hard_fp_saves, aarch64_callee_save_cost)
	(aarch64_frame_allocation_cost): Likewise.
	(TARGET_CALLEE_SAVE_COST): Define.
	(TARGET_FRAME_ALLOCATION_COST): Likewise.
	* config/i386/i386.cc (ix86_ira_callee_saved_register_cost_scale):
	Replace with...
	(ix86_callee_save_cost): ...this new hook.
	(TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST): Define.
	* target.h (spill_cost_type, frame_cost_type): New enums.
	* target.def (callee_save_cost, frame_allocation_cost): New hooks.
	(ira_callee_saved_register_cost_scale): Delete.
	* doc/tm.texi.in (TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST, TARGET_FRAME_ALLOCATION_COST): New hooks.
	* doc/tm.texi: Regenerate.
	* hard-reg-set.h (hard_reg_set_popcount): New function.
	* ira-color.cc (allocated_memory_p): New variable.
	(allocated_callee_save_regs): Likewise.
	(record_allocation): New function.
	(assign_hard_reg): Use targetm.frame_allocation_cost to model
	the cost of the first spill or first caller save.  Use
	targetm.callee_save_cost to model the cost of using new callee-saved
	registers.  Apply the exit rather than entry frequency to the cost
	of restoring a register or deallocating the frame.  Update the
	new variables above.
	(improve_allocation): Use record_allocation.
	(color): Initialize allocated_callee_save_regs.
	(ira_color): Initialize allocated_memory_p.
	* targhooks.h (default_callee_save_cost): Declare.
	(default_frame_allocation_cost): Likewise.
	* targhooks.cc (default_callee_save_cost): New function.
	(default_frame_allocation_cost): Likewise.

2025-03-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/116708
	* doc/invoke.texi (x86 Options): Clarify how -msse4 and -mno-sse4
	interact with other SSE options.

2025-03-07  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118318
	* ipa-cp.cc (adjust_clone_incoming_counts): Add a compatible_p check.

2025-03-07  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm_neon.h: Try harder to detect if we have
	the softfp ABI enabled.

2025-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR c/112960
	PR c/117029
	* doc/extend.texi (Complex): Add I and J suffixes to the list of
	complex suffixes, adjust for all of those being part of ISO C2Y,
	clarify that for -fno-ext-numeric-literals none of those are
	recognized as GNU extensions and for C++14 i is considered UDL
	even for -fext-numeric-literals when <complex> is included.

2025-03-07  Simon Martin  <simon@nasilyan.com>

	* tree-vect-data-refs.cc: Define INCLUDE_ALGORITHM.

2025-03-07  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/118464
	PR tree-optimization/116855
	* doc/invoke.texi (min-pagesize): Update docs with vectorizer use.
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Delay
	checks.
	(vect_compute_data_ref_alignment): Remove alignment checks and move to
	get_load_store_type, increase group access alignment.
	(vect_enhance_data_refs_alignment): Add note to comment needing
	investigating.
	(vect_analyze_data_refs_alignment): Likewise.
	(vect_supportable_dr_alignment): For group loads look at first DR.
	* tree-vect-stmts.cc (get_load_store_type):
	Perform safety checks for early break pfa.
	* tree-vectorizer.h (dr_set_safe_speculative_read_required,
	dr_safe_speculative_read_required, DR_SCALAR_KNOWN_BOUNDS): New.
	(need_peeling_for_alignment): Renamed to...
	(safe_speculative_read_required): .. This
	(class dr_vec_info): Add scalar_access_known_in_bounds.

2025-03-07  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/118464
	PR tree-optimization/116855
	* config/aarch64/aarch64-sve.md (@extract_<last_op>_<mode>,
	@fold_extract_<last_op>_<mode>,
	@aarch64_fold_extract_vector_<last_op>_<mode>): Change SVE_FULL to
	SVE_ALL.
	* config/aarch64/iterators.md (vccore): Add more partial types.

2025-03-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119145
	* tree-vectorizer.cc (try_vectorize_loop_1): Avoid BB
	vectorizing an if-converted loop body when there's a .MASK_CALL
	in the loop body.

2025-03-07  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/115485
	* config/arm/arm.cc (require_pic_register): Fix typos in
	comment. Handle fixed arm_pic_register.

2025-03-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/116125
	* tree-vect-data-refs.cc (vect_prune_runtime_alias_test_list): Make
	the dr_with_seg_len alignment fields describe tha access sizes as
	well as the pointer alignment.
	* tree-data-ref.cc (create_intersect_range_checks): Don't compensate
	for invalid alignment fields here.

2025-03-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/119133
	* config/aarch64/aarch64.md
	(*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): Use
	force_lowpart_subreg.

2025-03-07  Richard Biener  <rguenther@suse.de>

	PR middle-end/118801
	* tree-ssa-dce.cc (eliminate_unnecessary_stmts): Prune
	sequences of uninterrupted DEBUG BEGIN_STMTs, keeping only
	the last of a set with unique location.

2025-03-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/113515
	* doc/invoke.texi (Warning Options): Improve -Wstringop-overflow
	documentation.

2025-03-07  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx10_2-512convertintrin.h
	(_mm512_mask_cvtbf8_ph): Correct mask width.
	(_mm512_maskz_cvtbf8_ph): Ditto.
	* config/i386/avx10_2convertintrin.h
	(_mm256_mask_cvtbf8_ph): Ditto.
	(_mm256_maskz_cvtbf8_ph): Ditto.

2025-03-06  Alexey Merzlyakov  <alexey.merzlyakov@samsung.com>

	PR rtl-optimization/119099
	* ext-dce.cc (ext_dce_rd_transfer_n): Do not allow the livein
	set to shrink.

2025-03-06  Simon Martin  <simon@nasilyan.com>

	* config/i386/x86-tune-sched.cc (ix86_fuse_mov_alu_p): Fix
	comment typo, paramter -> parameter.
	* config/lm32/lm32.cc (lm32_std_gimplify_va_arg_expr): Likewise.

2025-03-06  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/118351
	PR other/38768
	* common/config/aarch64/aarch64-common.cc: Enable early scheduling with
	-O3 and higher.
	* doc/invoke.texi (-fschedule-insns): Update comment.

2025-03-06  Richard Sandiford  <richard.sandiford@arm.com>

	Revert:
	2025-03-06  Richard Sandiford  <richard.sandiford@arm.com>
		    Jan Hubicka  <hubicka@ucw.cz>

	PR rtl-optimization/117477
	* config/aarch64/aarch64.cc (aarch64_count_saves): New function.
	(aarch64_count_above_hard_fp_saves, aarch64_callee_save_cost)
	(aarch64_frame_allocation_cost): Likewise.
	(TARGET_CALLEE_SAVE_COST): Define.
	(TARGET_FRAME_ALLOCATION_COST): Likewise.
	* config/i386/i386.cc (ix86_ira_callee_saved_register_cost_scale):
	Replace with...
	(ix86_callee_save_cost): ...this new hook.
	(TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST): Define.
	* target.h (spill_cost_type, frame_cost_type): New enums.
	* target.def (callee_save_cost, frame_allocation_cost): New hooks.
	(ira_callee_saved_register_cost_scale): Delete.
	* doc/tm.texi.in (TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST, TARGET_FRAME_ALLOCATION_COST): New hooks.
	* doc/tm.texi: Regenerate.
	* hard-reg-set.h (hard_reg_set_popcount): New function.
	* ira-color.cc (allocated_memory_p): New variable.
	(allocated_callee_save_regs): Likewise.
	(record_allocation): New function.
	(assign_hard_reg): Use targetm.frame_allocation_cost to model
	the cost of the first spill or first caller save.  Use
	targetm.callee_save_cost to model the cost of using new callee-saved
	registers.  Apply the exit rather than entry frequency to the cost
	of restoring a register or deallocating the frame.  Update the
	new variables above.
	(improve_allocation): Use record_allocation.
	(color): Initialize allocated_callee_save_regs.
	(ira_color): Initialize allocated_memory_p.
	* targhooks.h (default_callee_save_cost): Declare.
	(default_frame_allocation_cost): Likewise.
	* targhooks.cc (default_callee_save_cost): New function.
	(default_frame_allocation_cost): Likewise.

2025-03-06  Richard Biener  <rguenther@suse.de>

	PR lto/114501
	* ipa-free-lang-data.cc (find_decls_types_r): Explicitly
	handle CONSTRUCTORs as walk_tree handling of those is
	incomplete.

2025-03-06  Alex Coplan  <alex.coplan@arm.com>

	PR rtl-optimization/114492
	* pair-fusion.cc (pair_fusion_bb_info::fuse_pair): Check for singleton
	move range before calling restrict_movement.
	(pair_fusion::try_promote_writeback): Likewise.

2025-03-06  Richard Sandiford  <richard.sandiford@arm.com>
	    Jan Hubicka  <hubicka@ucw.cz>

	PR rtl-optimization/117477
	* config/aarch64/aarch64.cc (aarch64_count_saves): New function.
	(aarch64_count_above_hard_fp_saves, aarch64_callee_save_cost)
	(aarch64_frame_allocation_cost): Likewise.
	(TARGET_CALLEE_SAVE_COST): Define.
	(TARGET_FRAME_ALLOCATION_COST): Likewise.
	* config/i386/i386.cc (ix86_ira_callee_saved_register_cost_scale):
	Replace with...
	(ix86_callee_save_cost): ...this new hook.
	(TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST): Define.
	* target.h (spill_cost_type, frame_cost_type): New enums.
	* target.def (callee_save_cost, frame_allocation_cost): New hooks.
	(ira_callee_saved_register_cost_scale): Delete.
	* doc/tm.texi.in (TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Delete.
	(TARGET_CALLEE_SAVE_COST, TARGET_FRAME_ALLOCATION_COST): New hooks.
	* doc/tm.texi: Regenerate.
	* hard-reg-set.h (hard_reg_set_popcount): New function.
	* ira-color.cc (allocated_memory_p): New variable.
	(allocated_callee_save_regs): Likewise.
	(record_allocation): New function.
	(assign_hard_reg): Use targetm.frame_allocation_cost to model
	the cost of the first spill or first caller save.  Use
	targetm.callee_save_cost to model the cost of using new callee-saved
	registers.  Apply the exit rather than entry frequency to the cost
	of restoring a register or deallocating the frame.  Update the
	new variables above.
	(improve_allocation): Use record_allocation.
	(color): Initialize allocated_callee_save_regs.
	(ira_color): Initialize allocated_memory_p.
	* targhooks.h (default_callee_save_cost): Declare.
	(default_frame_allocation_cost): Likewise.
	* targhooks.cc (default_callee_save_cost): New function.
	(default_frame_allocation_cost): Likewise.

2025-03-06  Richard Biener  <rguenther@suse.de>

	PR middle-end/119119
	* gimplify.cc (is_gimple_mem_rhs_or_call): All empty CTORs
	are OK when not a register type.

2025-03-05  Hannes Braun  <hannes@hannesbraun.net>

	PR target/118942
	* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
	uint16_t.
	(vld1q_s16_x3): Use int16_t instead of uint16_t.
	(vld1q_s8_x4): Likewise.
	(vld1q_s16_x4): Likewise.

2025-03-05  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR rtl-optimization/119046
	* config/aarch64/aarch64.cc (aarch64_evpc_dup): Use VOIDmode for
	PARALLEL.

2025-03-05  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR rtl-optimization/119046
	* rtlanal.cc (may_trap_p_1): Don't mark FP-mode PARALLELs as trapping.

2025-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118953
	* value-range.cc (irange::union_bitmask): Update m_bitmask if
	get_bitmask () is unknown_p and m_bitmask is not even when the
	semantic bitmask didn't change and returning false.

2025-03-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/97323
	* tree.cc (gimple_canonical_types_compatible_p): Ignore
	TYPE_MODE also for ARRAY_TYPE.
	(verify_type): Likewise.

2025-03-05  Xi Ruoyao  <xry111@xry111.site>

	PR target/119084
	* config/loongarch/lasx.md (UNSPEC_LASX_XVLDX): Remove.
	(lasx_xvldx): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_VLDX): Remove.
	(lsx_vldx): Remove.
	* config/loongarch/simd.md (QIVEC): New define_mode_iterator.
	(<simd_isa>_<x>vldx): New define_expand.
	* config/loongarch/loongarch.cc (loongarch_address_insns_1): New
	static function with most logic factored out from ...
	(loongarch_address_insns): ... here.  Call
	loongarch_address_insns_1 with reg_reg_cost = 1.
	(loongarch_address_cost): Call loongarch_address_insns_1 with
	reg_reg_cost = la_addr_reg_reg_cost.

2025-03-04  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Optimization Options): New @subsubsection
	for pure optimization options.

2025-03-04  Oscar Gustafsson  <oscar.gustafsson@gmail.com>

	* doc/extend.texi: Improve example for __builtin_bswap16.

2025-03-04  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.h (TARGET_AVOID_FALSE_DEP_FOR_TZCNT): New macro.
	(TARGET_AVOID_FALSE_DEP_FOR_BLS): New macro.
	* config/i386/i386.md (*bmi_blsi_<mode>): Add splitter for false
	dependency.
	(*bmi_blsi_<mode>_ccno): Add splitter for false dependency.
	(*bmi_blsi_<mode>_falsedep): New pattern.
	(*bmi_blsmsk_<mode>): Add splitter for false dependency.
	(*bmi_blsmsk_<mode>_falsedep): New pattern.
	(*bmi_blsr_<mode>): Add splitter for false dependency.
	(*bmi_blsr_<mode>_cmp): Add splitter for false dependency
	(*bmi_blsr_<mode>_cmp_falsedep): New pattern.
	* config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_TZCNT): New tune.
	(X86_TUNE_AVOID_FALSE_DEP_FOR_BLS): New tune.

2025-03-04  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386.h (TARGET_FUSE_ALU_AND_BRANCH_MEM): New macro.
	(TARGET_FUSE_ALU_AND_BRANCH_MEM_IMM): New macro.
	(TARGET_FUSE_ALU_AND_BRANCH_RIP_RELATIVE): New macro.
	* config/i386/x86-tune-sched.cc (ix86_fuse_mov_alu_p): Support
	non-single-set.
	(ix86_macro_fusion_pair_p): Allow ALU which only clobbers;
	be more careful about immediates; check TARGET_FUSE_ALU_AND_BRANCH_MEM,
	TARGET_FUSE_ALU_AND_BRANCH_MEM_IMM, TARGET_FUSE_ALU_AND_BRANCH_RIP_RELATIVE;
	verify that we never use unsigned checks with inc/dec.
	* config/i386/x86-tune.def (X86_TUNE_FUSE_ALU_AND_BRANCH): New tune.
	(X86_TUNE_FUSE_ALU_AND_BRANCH_MEM): New tune.
	(X86_TUNE_FUSE_ALU_AND_BRANCH_MEM_IMM): New tune.
	(X86_TUNE_FUSE_ALU_AND_BRANCH_RIP_RELATIVE): New tune.

2025-03-04  Tamar Christina  <tamar.christina@arm.com>

	PR target/118892
	* config/aarch64/aarch64.md (copysign<GPF:mode>3): Use
	force_lowpart_subreg instead of lowpart_subreg.

2025-03-04  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/118976
	* fold-const.cc (const_unop): Use ~ rather than - for BIT_NOT_EXPR.
	* config/aarch64/aarch64.cc (aarch64_test_sve_folding): New function.
	(aarch64_run_selftests): Run it.

2025-03-04  Richard Sandiford  <richard.sandiford@arm.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119002
	* simplify-rtx.cc
	(simplify_context::simplify_logical_relational_operation): Handle
	comparisons between CC values.  If there is no evidence that the
	CC values are unsigned, restrict the fold to always-true or
	always-false results.

2025-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119096
	* tree-vect-loop.cc (vect_transform_reduction): Use the
	correct else value for .COND_fn.

2025-03-03  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(struct aarch64_extension_info): Add field.
	(aarch64_get_required_features): New.
	* config/aarch64/aarch64-builtins.cc
	(aarch64_simd_switcher::aarch64_simd_switcher): Rename to...
	(aarch64_target_switcher::aarch64_target_switcher): ...this,
	and extend to handle sve, nosimd and target pragmas.
	(aarch64_simd_switcher::~aarch64_simd_switcher): Rename to...
	(aarch64_target_switcher::~aarch64_target_switcher): ...this,
	and extend to handle sve, nosimd and target pragmas.
	(handle_arm_acle_h): Use aarch64_target_switcher.
	(handle_arm_neon_h): Rename switcher and pass explicit flags.
	(aarch64_general_init_builtins): Ditto.
	* config/aarch64/aarch64-protos.h
	(class aarch64_simd_switcher): Rename to...
	(class aarch64_target_switcher): ...this, and add new members.
	(aarch64_get_required_features): New prototype.
	* config/aarch64/aarch64-sve-builtins.cc
	(sve_switcher::sve_switcher): Delete
	(sve_switcher::~sve_switcher): Delete
	(sve_alignment_switcher::sve_alignment_switcher): New
	(sve_alignment_switcher::~sve_alignment_switcher): New
	(register_builtin_types): Use alignment switcher
	(init_builtins): Rename switcher.
	(handle_arm_neon_sve_bridge_h): Ditto.
	(handle_arm_sme_h): Ditto.
	(handle_arm_sve_h): Ditto, and use alignment switcher.
	* config/aarch64/aarch64-sve-builtins.h
	(class sve_switcher): Delete.
	(class sme_switcher): Delete.
	(class sve_alignment_switcher): New.
	* config/aarch64/t-aarch64 (aarch64-builtins.o): Add $(REGS_H).
	(aarch64-sve-builtins.o): Remove $(REG_H).

2025-03-03  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/thumb1.md (split patterns for GEU and LEU): New.

2025-03-03  Uros Bizjak  <ubizjak@gmail.com>

	Revert:
	2025-03-03  Uros Bizjak  <ubizjak@gmail.com>

	* combine.cc (distribute_notes):
	Reverse negative logic in ternary operators.

2025-03-03  Uros Bizjak  <ubizjak@gmail.com>

	* combine.cc (distribute_notes):
	Reverse negative logic in ternary operators.

2025-03-03  Uros Bizjak  <ubizjak@gmail.com>

	PR rtl-optimization/118739
	* combine.cc (distribute_notes) <case REG_UNUSED>: Correct the
	logic when the register is used by I3.

2025-03-03  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118785
	* ipa-cp.cc (ipa_vr_intersect_with_arith_jfunc): Handle non-conversion
	unary operations separately before doing any conversions.  Check
	expr_type_first_operand_type_p for non-unary operations too.  Fix type
	of op_res.

2025-03-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/119057
	* tree-vect-loop.cc (check_reduction_path): Add argument
	specifying whether we're analyzing the inner loop of a
	double reduction.  Do not allow extra uses outside of the
	double reduction cycle in this case.
	(vect_is_simple_reduction): Adjust.

2025-03-03  Richard Biener  <rguenther@suse.de>

	PR ipa/119067
	* ipa-devirt.cc (odr_types_equivalent_p): Check
	TYPE_VECTOR_SUBPARTS for vectors.

2025-03-02  Jeff Law  <jlaw@ventanamicro.com>

	PR target/118934
	* config/riscv/corev.md (cv_branch): Adjust output template.
	(branch): Likewise.
	* config/riscv/riscv.md (branch): Likewise.
	* config/riscv/riscv.cc (riscv_asm_output_opcode): Handle 'r' rather
	than 'n'.

2025-03-02  Jakub Jelinek  <jakub@redhat.com>

	PR translation/118991
	* config/avr/avr.cc (avr_print_operand): Print ival into
	a temporary buffer and use %s in output_operand_lossage to make
	the diagnostics translatable.

2025-03-02  Filip Kastl  <fkastl@suse.cz>

	PR tree-optimization/117919
	* gimple-ssa-sccopy.cc (scc_copy_prop::propagate): Prune
	statements that 'replace_uses_by ()' removed.

2025-03-01  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific, *-*-freebsd*): Simplify description.

2025-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR jit/117047
	* ggc-common.cc (ggc_internal_cleared_alloc_no_dtor): Pass size
	rather than s as the first argument to ggc_internal_cleared_alloc.

2025-03-01  Yuriy Kolerov  <Yuriy.Kolerov@synopsys.com>

	PR target/118906
	* common/config/riscv/riscv-common.cc: fix zce to zcf
	implication.

2025-03-01  Jan Dubiec  <jdx@o2.pl>

	PR target/114222
	* config/h8300/h8300.cc (h8300_init_libfuncs): For HImode override
	calls to external ffs() (from newlib) with calls to __ffshi2() from
	libgcc. The implementation of ffs() in newlib calls __builtin_ffs()
	what causes infinite recursion and finally a stack overflow.

2025-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR other/119052
	* input.cc (check_line): Don't call sscanf on non-null terminated
	buffer, instead copy line.length () bytes from line.get_buffer ()
	to a local buffer, null terminate it and call sscanf on that.
	Formatting fix.
	(test_replacement): Just allocate maxline * 5 rather than maxline * 15
	bytes for the file.  Formatting fix.

2025-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR jit/117047
	* acinclude.m4 (gcc_CHECK_ATTRIBUTE_ALIAS): New.
	* configure.ac: Add gcc_CHECK_ATTRIBUTE_ALIAS.
	* ggc.h (ggc_internal_alloc): Remove ATTRIBUTE_MALLOC from
	overload with finalizer pointer.  Call ggc_internal_alloc_no_dtor
	in inline overload without finalizer pointer.
	(ggc_internal_alloc_no_dtor): Declare.
	(ggc_internal_cleared_alloc): Remove ATTRIBUTE_MALLOC from
	overload with finalizer pointer.  Call
	ggc_internal_cleared_alloc_no_dtor in inline overload without
	finalizer pointer.
	(ggc_internal_cleared_alloc_no_dtor): Declare.
	(ggc_alloc): Call ggc_internal_alloc_no_dtor if no finalization
	is needed.
	(ggc_alloc_no_dtor): Call ggc_internal_alloc_no_dtor.
	(ggc_cleared_alloc): Call ggc_internal_cleared_alloc_no_dtor if no
	finalization is needed.
	(ggc_vec_alloc): Call ggc_internal_alloc_no_dtor if no finalization
	is needed.
	(ggc_cleared_vec_alloc): Call ggc_internal_cleared_alloc_no_dtor if no
	finalization is needed.
	* ggc-page.cc (ggc_internal_alloc): If HAVE_ATTRIBUTE_ALIAS, turn
	overload with finalizer into alias to ggc_internal_alloc_ and
	rename it to ...
	(ggc_internal_alloc_): ... this, make it extern "C".
	(ggc_internal_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS,
	otherwise new noinline wrapper.
	* ggc-common.cc (ggc_internal_cleared_alloc): If HAVE_ATTRIBUTE_ALIAS,
	turn overload with finalizer into alias to ggc_internal_alloc_ and
	rename it to ...
	(ggc_internal_cleared_alloc_): ... this, make it extern "C".
	(ggc_internal_cleared_alloc_no_dtor): New alias if
	HAVE_ATTRIBUTE_ALIAS, otherwise new noinline wrapper.
	* ggc-none.cc (ggc_internal_alloc): If HAVE_ATTRIBUTE_ALIAS, turn
	overload with finalizer into alias to ggc_internal_alloc_ and
	rename it to ...
	(ggc_internal_alloc_): ... this, make it extern "C".
	(ggc_internal_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS,
	otherwise new wrapper.
	(ggc_internal_cleared_alloc): If HAVE_ATTRIBUTE_ALIAS, turn overload
	with finalizer into alias to ggc_internal_alloc_ and rename it to ...
	(ggc_internal_cleared_alloc_): ... this, make it extern "C".
	(ggc_internal_cleared_alloc_no_dtor): New alias if
	HAVE_ATTRIBUTE_ALIAS, otherwise new wrapper.
	* genmatch.cc (ggc_internal_cleared_alloc, ggc_free): Formatting fix.
	(ggc_internal_cleared_alloc_no_dtor): Define.
	* config.in: Regenerate.
	* configure: Regenerate.

2025-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/115871
	* omp-simd-clone.cc (simd_clone_adjust): For SIMD_CLONE_ARG_TYPE_MASK
	and sc->mask_mode not VOIDmode, set elem_type to the characteristic
	type rather than boolean_type_node.

2025-03-01  Jan Dubiec  <jdx@o2.pl>

	PR target/109189
	* config/h8300/h8300.cc (h8300_print_operand): Replace %ld format
	strings with HOST_WIDE_INT_PRINT_DEC macro in order to silence
	-Wformat warnings when building on Windows/MinGW64.

2025-02-28  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118243
	* ipa-sra.cc (pull_accesses_from_callee): New parameters
	caller_ipcp_ts and param_idx.  Check that scalar pulled accesses would
	not clash with a known IPA-CP aggregate constant.
	(param_splitting_across_edge): Pass IPA-CP transformation summary and
	caller parameter index to pull_accesses_from_callee.

2025-02-28  Richard Biener  <rguenther@suse.de>

	PR ipa/111245
	* ipa-modref.cc (modref_access_analysis::analyze_store): Do
	not guard the check of whether the stmt could throw by
	cfun->can_throw_non_call_exceptions.

2025-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/117712
	* expr.cc (force_operand): Handle {,UNSIGNED_}FIX with
	FIX operand using expand_fix on the inner FIX operand.

2025-02-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87984
	* tree-ssa-dom.cc (dom_opt_dom_walker::optimize_stmt): Do
	not perform redundant store elimination to hard register
	variables.
	* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
	Likewise.

2025-02-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/66279
	* gimplify.cc (gimplify_asm_expr): Copy TREE_PURPOSE before
	rewriting it for "+" processing.

2025-02-28  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P):
	Moved to ...
	* config/i386/i386.cc (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P):
	Here.

2025-02-27  Pan Li  <pan2.li@intel.com>

	PR target/118931
	* config/riscv/riscv-v.cc (expand_const_vector): Add overflow to
	smode check and clean up highest bits if overflow.

2025-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/119030
	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Fix a pasto,
	ll_unsignedp -> rl_unsignedp.

2025-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/118860
	* input.h (file_cache::tune): No longer static.  Rename argument
	from num_file_slots_ to num_file_slots.  Formatting fix.
	(file_cache::num_file_slots): Renamed to ...
	(file_cache::m_num_file_slots): ... this.  No longer static.
	* input.cc (file_cache_slot::tune): Change return type from void to
	size_t, return previous file_cache_slot::line_record_size value.
	Formatting fixes.
	(file_cache::tune): Rename argument from num_file_slots_ to
	num_file_slots.  Set m_num_file_slots rather than num_file_slots.
	If m_num_file_slots or file_cache_slot::line_record_size changes,
	delete[] m_file_slots and new it again.
	(file_cache::num_file_slots): Remove definition.
	(file_cache::lookup_file): Use m_num_file_slots rather than
	num_file_slots.
	(file_cache::evicted_cache_tab_entry): Likewise.
	(file_cache::file_cache): Likewise.  Initialize m_num_file_slots
	to 16.
	(file_cache::dump): Use m_num_file_slots rather than num_file_slots.
	(file_cache_slot::get_next_line): Formatting fixes.
	(file_cache_slot::read_line_num): Likewise.
	(get_source_text_between): Likewise.
	* toplev.cc (toplev::main): Call global_dc->get_file_cache ().tune
	rather than file_cache::tune.

2025-02-27  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.h (MAX_FIXED_MODE_SIZE): '#define'.

2025-02-27  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.opt (-mfake-ptx-alloca): New.
	* config/nvptx/nvptx-protos.h (nvptx_output_fake_ptx_alloca):
	Declare.
	* config/nvptx/nvptx.cc (nvptx_output_fake_ptx_alloca): New.
	* config/nvptx/nvptx.md (define_insn "@nvptx_alloca_<mode>")
	[!(TARGET_PTX_7_3 && TARGET_SM52)]: Use it for
	'-mfake-ptx-alloca'.

2025-02-27  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.md (define_expand "allocate_stack")
	[!TARGET_SOFT_STACK]: Move
	'sorry ("dynamic stack allocation not supported");'...
	(define_insn "@nvptx_alloca_<mode>"): ... here.

2025-02-27  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/108369
	* doc/invoke.texi: Add a note to clarify. Adjust some wording.

2025-02-27  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/x86-tune.def
	(X86_TUNE_DEST_FALSE_DEP_FOR_GLC): Add GNR, GNR-D, DMR.
	(X86_TUNE_AVOID_256FMA_CHAINS): Ditto.
	(X86_TUNE_AVX512_MOVE_BY_PIECES): Ditto.
	(X86_TUNE_AVX512_STORE_BY_PIECES): Ditto.

2025-02-27  Jakub Jelinek  <jakub@redhat.com>

	* gimple-range-phi.cc (phi_analyzer::process_phi): Fix comment typo,
	dpoesn;t -> doesn't.

2025-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/116143
	* Makefile.in (EXTRA_BACKEND_OBJS): New variable.
	(BACKEND): Use it before libbackend.a.

2025-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/118819
	* alias.cc (memrefs_conflict_p): Perform arithmetics on c, xsize and
	ysize in poly_offset_int and return -1 if it is not representable in
	poly_int64.

2025-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR c/119001
	* varasm.cc (output_constructor_regular_field): Don't fail
	assertion if next is non-NULL and FIELD_DECL if
	TREE_CODE (local->type) is UNION_TYPE.

2025-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR c/114870
	* ginclude/stddef.h (__STDC_VERSION_STDDEF_H__, unreachable): Don't
	redefine multiple times if stddef.h is first included without __need_*
	defines and later with them.  Move nullptr_t and unreachable and
	__STDC_VERSION_STDDEF_H__ definitions into the same
	defined (__STDC_VERSION__) && __STDC_VERSION__ > 201710L #if block.

2025-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119002
	* config/arm/arm.h (REVERSE_CONDITION): Use CODE - the macro
	argument - in the macro rather than code.

2025-02-26  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR middle-end/119021
	* lra.cc (lra_asm_insn_error): Use lra_invalidate_insn_data
	instead of lra_update_insn_regno_info.
	* lra-assigns.cc (lra_split_hard_reg_for): Restore old code.

2025-02-26  Alexandre Oliva  <oliva@adacore.com>

	* doc/sourcebuild.texi: Add x86 effective target.

2025-02-26  Alexandre Oliva  <oliva@adacore.com>

	* doc/sourcebuild.texi (dg-do-if): Document.

2025-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/116143
	* simple-diagnostic-path.h (simple_diagnostic_path::num_events): Define
	inline.
	(simple_diagnostic_path::num_threads): Likewise.
	* simple-diagnostic-path.cc (simple_diagnostic_path::num_events):
	Remove out of line definition.
	(simple_diagnostic_path::num_threads): Likewise.

2025-02-25  Jason Merrill  <jason@redhat.com>

	* doc/install.texi: 10.5 won't bootstrap with C++98.

2025-02-25  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/115458
	* lra-int.h (LRA_MAX_FAILED_SPLITS): Define and check its value.
	(lra_split_hard_reg_for): Change prototype.
	* lra.cc (lra): Try to split hard reg range several times after a
	failure.
	* lra-assigns.cc (lra_split_hard_reg_for): Add an arg, a flag of
	giving up.  Report asm error and nullify the asm insn depending on
	the arg value.

2025-02-25  Jakub Jelinek  <jakub@redhat.com>

	PR translation/118991
	* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Use %wd
	instead of %" HOST_WIDE_INT_PRINT "d to print a hwi in error.

2025-02-25  Iain Buclaw  <ibuclaw@gdcproject.org>

	PR d/118654
	* config/i386/i386-d.cc (ix86_d_target_versions): Predefine GNU_CET.
	(ix86_d_handle_target_cf_protection): New.
	(ix86_d_register_target_info): Add 'CET' TargetInfo key.

2025-02-24  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/114516
	* config/riscv/riscv-vector-costs.cc (compute_estimated_lmul):
	Add pattern statements to program points.

2025-02-24  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/118950
	* tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Use
	original LHS's type.

2025-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118915
	* tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): For
	highj == NULL_TREE use TYPE_MAX_VALUE (TREE_TYPE (lowj)) rather
	than TYPE_MAX_VALUE (type).

2025-02-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118973
	* tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Calls
	that alter control flow in unpredictable ways need to be
	preserved.

2025-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/118993
	* gimplify.cc (gimplify_scan_omp_clauses): Fix diagnostics typo,
	undfined -> undefined.

2025-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR c/117023
	* builtin-attrs.def (ATTR_NONNULL_IF_NONZERO): New DEF_ATTR_IDENT.
	(ATTR_NOTHROW_NONNULL_IF12_LEAF, ATTR_NOTHROW_NONNULL_IF13_LEAF,
	ATTR_NOTHROW_NONNULL_IF123_LEAF, ATTR_NOTHROW_NONNULL_IF23_LEAF,
	ATTR_NOTHROW_NONNULL_1_IF23_LEAF, ATTR_PURE_NOTHROW_NONNULL_IF12_LEAF,
	ATTR_PURE_NOTHROW_NONNULL_IF13_LEAF,
	ATTR_PURE_NOTHROW_NONNULL_IF123_LEAF,
	ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL_IF12_LEAF,
	ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_IF12_LEAF): New
	DEF_ATTR_TREE_LIST.
	* builtins.def (BUILT_IN_STRNDUP): Use
	ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_IF12_LEAF instead of
	ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_STRNCAT, BUILT_IN_STRNCAT_CHK): Use
	ATTR_NOTHROW_NONNULL_1_IF23_LEAF instead of ATTR_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_BCOPY, BUILT_IN_MEMCPY, BUILT_IN_MEMCPY_CHK,
	BUILT_IN_MEMMOVE, BUILT_IN_MEMMOVE_CHK,  BUILT_IN_STRNCPY,
	BUILT_IN_STRNCPY_CHK): Use ATTR_NOTHROW_NONNULL_IF123_LEAF instead of
	ATTR_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_MEMPCPY, BUILT_IN_MEMPCPY_CHK, BUILT_IN_STPNCPY,
	BUILT_IN_STPNCPY_CHK): Use ATTR_NOTHROW_NONNULL_IF123_LEAF instead of
	ATTR_RETNONNULL_NOTHROW_LEAF.
	(BUILT_IN_BZERO, BUILT_IN_MEMSET, BUILT_IN_MEMSET_CHK): Use
	ATTR_NOTHROW_NONNULL_IF13_LEAF instead of ATTR_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_BCMP, BUILT_IN_MEMCMP, BUILT_IN_STRNCASECMP,
	BUILT_IN_STRNCMP): Use ATTR_PURE_NOTHROW_NONNULL_IF123_LEAF instead of
	ATTR_PURE_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_STRNLEN): Use ATTR_PURE_NOTHROW_NONNULL_IF12_LEAF instead of
	ATTR_PURE_NOTHROW_NONNULL_LEAF.
	(BUILT_IN_MEMCHR): Use ATTR_PURE_NOTHROW_NONNULL_IF13_LEAF instead of
	ATTR_PURE_NOTHROW_NONNULL_LEAF.

2025-02-24  Lino Hsing-Yu Peng  <linopeng@andestech.com>

	* config/riscv/riscv.cc: Set multi push regs bits.

2025-02-22  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/bpf/bpf.md (define_expand "allocate_stack"): Emit
	'sorry, unimplemented: dynamic stack allocation not supported'.
	* config/nvptx/nvptx.md (define_expand "allocate_stack")
	[!TARGET_SOFT_STACK && !(TARGET_PTX_7_3 && TARGET_SM52)]: Likewise.

2025-02-21  H.J. Lu  <hjl.tools@gmail.com>

	* sese.cc (debug_edge): Append a newline.

2025-02-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118954
	* tree-predcom.cc (ref_at_iteration): Make sure to not
	associate the constant offset with DR_BASE_ADDRESS when
	that is an offsetted pointer.

2025-02-20  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-core.h: Add comments making clear that these
	functions implicitly use global_dc.

2025-02-20  David Malcolm  <dmalcolm@redhat.com>

	* libsarifreplay.cc
	(sarif_replayer::make_plain_text_within_result_message): Capture
	which json::string was used.  When reporting on unescaped "{" or
	"}" in SARIF message strings, use that string rather than the
	message object, and refer the user to §3.11.5 ("Messages with
	placeholders") rather than §3.11.11 ("arguments").  Ideally we'd
	place the error at the precise character, but that can't be done
	without reworking json-parsing.cc's lexer::lex_string, which is
	too invasive for stage 4.
	(sarif_replayer::get_plain_text_from_mfms): Capture which
	json::string was used.
	(sarif_replayer::lookup_plain_text_within_result_message):
	Likewise.

2025-02-20  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific, aarch64*-*-*): Drop note for
	Binutils pre 2.24.

2025-02-20  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vec_cmp_float):
	Remove can_invert_p argument and change return type to void.
	* config/aarch64/aarch64.cc (aarch64_expand_sve_vec_cmp_float):
	Likewise.
	* config/aarch64/aarch64-sve.md (vec_cmp<mode><vpred>): Update call
	accordingly.

2025-02-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118521
	* tree-scalar-evolution.cc (final_value_replacement_loop):
	Fold uses of the replaced PHI def.

2025-02-20  Filip Kastl  <fkastl@suse.cz>

	* doc/invoke.texi: Fix typo file-cache-files ->
	file-cache-lines.

2025-02-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/86270
	* tree-outof-ssa.cc (insert_backedge_copies): Pattern
	match a single conflict in a loop condition and adjust
	that avoiding the conflict if possible.

2025-02-20  H.J. Lu  <hjl.tools@gmail.com>

	Revert:
	2025-02-16  H.J. Lu  <hjl.tools@gmail.com>

	PR target/109780
	PR target/109093
	* config/i386/i386.cc (ix86_update_stack_alignment): New.
	(ix86_find_all_reg_use_1): Likewise.
	(ix86_find_all_reg_use): Likewise.
	(ix86_find_max_used_stack_alignment): Also check memory accesses
	from registers defined by stack or frame registers.

2025-02-20  H.J. Lu  <hjl.tools@gmail.com>

	Revert:
	2025-02-17  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.cc (ix86_find_all_reg_use):
	Scan only for SET RTX in PARALLEL.

2025-02-19  David Malcolm  <dmalcolm@redhat.com>

	PR other/118919
	* input.cc (file_cache_slot::m_file_path): Make non-const.
	(file_cache_slot::evict): Free m_file_path.
	(file_cache_slot::create): Store a copy of file_path if non-null.
	(file_cache_slot::~file_cache_slot): Free m_file_path.

2025-02-19  Pan Li  <pan2.li@intel.com>

	PR middle-end/116351
	* tree-vect-loop.cc (vect_verify_loop_lens): Return false if the
	loop_vinfo has relevant mode such as DImode.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lasx.md (UNSPEC_LASX_XVSRARI): Remove.
	(UNSPEC_LASX_XVSRLRI): Remove.
	(lasx_xvsrari_<lsxfmt>): Remove.
	(lasx_xvsrlri_<lsxfmt>): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_VSRARI): Remove.
	(UNSPEC_LSX_VSRLRI): Remove.
	(lsx_vsrari_<lsxfmt>): Remove.
	(lsx_vsrlri_<lsxfmt>): Remove.
	* config/loongarch/simd.md (simd_<optab>_imm_round_<mode>): New
	define_insn.
	(<simd_isa>_<x>v<insn>ri_<simdfmt>): New define_expand.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/simd.md (wvec_half): New define_mode_attr.
	(<su>dot_prod<wvec_half><mode>): New define_expand.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/simd.md (even_odd): New define_int_attr.
	(vec_widen_<su>mult_<even_odd>_<mode>): New define_expand.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/simd.md (LVEC): New define_mode_attr.
	(simdfmt_as_i): Make it same as simdfmt for integer vector
	modes.
	(_f): New define_mode_attr.
	* config/loongarch/lsx.md (lsx_vpickev_b): Remove.
	(lsx_vpickev_h): Remove.
	(lsx_vpickev_w): Remove.
	(lsx_vpickev_w_f): Remove.
	(lsx_vpickod_b): Remove.
	(lsx_vpickod_h): Remove.
	(lsx_vpickod_w): Remove.
	(lsx_vpickev_w_f): Remove.
	(lsx_pick_evod_<mode>): New define_insn.
	(lsx_<x>vpick<ev_od>_<simdfmt_as_i><_f>): New
	define_expand.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lasx.md (UNSPEC_LASX_XVMADDWEV): Remove.
	(UNSPEC_LASX_XVMADDWEV2): Remove.
	(UNSPEC_LASX_XVMADDWEV3): Remove.
	(UNSPEC_LASX_XVMADDWOD): Remove.
	(UNSPEC_LASX_XVMADDWOD2): Remove.
	(UNSPEC_LASX_XVMADDWOD3): Remove.
	(lasx_xvmaddwev_h_b<u>): Remove.
	(lasx_xvmaddwev_w_h<u>): Remove.
	(lasx_xvmaddwev_d_w<u>): Remove.
	(lasx_xvmaddwev_q_d): Remove.
	(lasx_xvmaddwod_h_b<u>): Remove.
	(lasx_xvmaddwod_w_h<u>): Remove.
	(lasx_xvmaddwod_d_w<u>): Remove.
	(lasx_xvmaddwod_q_d): Remove.
	(lasx_xvmaddwev_q_du): Remove.
	(lasx_xvmaddwod_q_du): Remove.
	(lasx_xvmaddwev_h_bu_b): Remove.
	(lasx_xvmaddwev_w_hu_h): Remove.
	(lasx_xvmaddwev_d_wu_w): Remove.
	(lasx_xvmaddwev_q_du_d): Remove.
	(lasx_xvmaddwod_h_bu_b): Remove.
	(lasx_xvmaddwod_w_hu_h): Remove.
	(lasx_xvmaddwod_d_wu_w): Remove.
	(lasx_xvmaddwod_q_du_d): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_VMADDWEV): Remove.
	(UNSPEC_LSX_VMADDWEV2): Remove.
	(UNSPEC_LSX_VMADDWEV3): Remove.
	(UNSPEC_LSX_VMADDWOD): Remove.
	(UNSPEC_LSX_VMADDWOD2): Remove.
	(UNSPEC_LSX_VMADDWOD3): Remove.
	(lsx_vmaddwev_h_b<u>): Remove.
	(lsx_vmaddwev_w_h<u>): Remove.
	(lsx_vmaddwev_d_w<u>): Remove.
	(lsx_vmaddwev_q_d): Remove.
	(lsx_vmaddwod_h_b<u>): Remove.
	(lsx_vmaddwod_w_h<u>): Remove.
	(lsx_vmaddwod_d_w<u>): Remove.
	(lsx_vmaddwod_q_d): Remove.
	(lsx_vmaddwev_q_du): Remove.
	(lsx_vmaddwod_q_du): Remove.
	(lsx_vmaddwev_h_bu_b): Remove.
	(lsx_vmaddwev_w_hu_h): Remove.
	(lsx_vmaddwev_d_wu_w): Remove.
	(lsx_vmaddwev_q_du_d): Remove.
	(lsx_vmaddwod_h_bu_b): Remove.
	(lsx_vmaddwod_w_hu_h): Remove.
	(lsx_vmaddwod_d_wu_w): Remove.
	(lsx_vmaddwod_q_du_d): Remove.
	* config/loongarch/simd.md (simd_maddw_evod_<mode>_<su>):
	New define_insn.
	(<simd_isa>_<x>vmaddw<ev_od>_<simdfmt_w>_<simdfmt><u>): New
	define_expand.
	(simd_maddw_evod_<mode>_hetero): New define_insn.
	(<simd_isa>_<x>vmaddw<ev_od>_<simdfmt_w>_<simdfmt>u_<simdfmt>):
	New define_expand.
	(<simd_isa>_maddw<ev_od>_q_d<u>_punned): New define_expand.
	(<simd_isa>_maddw<ev_od>_q_du_d_punned): New define_expand.
	* config/loongarch/loongarch-builtins.cc
	(CODE_FOR_lsx_vmaddwev_q_d): Define as a macro to override it
	with the punned expand.
	(CODE_FOR_lsx_vmaddwev_q_du): Likewise.
	(CODE_FOR_lsx_vmaddwev_q_du_d): Likewise.
	(CODE_FOR_lsx_vmaddwod_q_d): Likewise.
	(CODE_FOR_lsx_vmaddwod_q_du): Likewise.
	(CODE_FOR_lsx_vmaddwod_q_du_d): Likewise.
	(CODE_FOR_lasx_xvmaddwev_q_d): Likewise.
	(CODE_FOR_lasx_xvmaddwev_q_du): Likewise.
	(CODE_FOR_lasx_xvmaddwev_q_du_d): Likewise.
	(CODE_FOR_lasx_xvmaddwod_q_d): Likewise.
	(CODE_FOR_lasx_xvmaddwod_q_du): Likewise.
	(CODE_FOR_lasx_xvmaddwod_q_du_d): Likewise.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lasx.md (UNSPEC_LASX_XVHADDW_Q_D): Remove.
	(UNSPEC_LASX_XVHSUBW_Q_D): Remove.
	(UNSPEC_LASX_XVHADDW_QU_DU): Remove.
	(UNSPEC_LASX_XVHSUBW_QU_DU): Remove.
	(lasx_xvh<addsub:optab>w_h<u>_b<u>): Remove.
	(lasx_xvh<addsub:optab>w_w<u>_h<u>): Remove.
	(lasx_xvh<addsub:optab>w_d<u>_w<u>): Remove.
	(lasx_xvhaddw_q_d): Remove.
	(lasx_xvhsubw_q_d): Remove.
	(lasx_xvhaddw_qu_du): Remove.
	(lasx_xvhsubw_qu_du): Remove.
	(reduc_plus_scal_v4di): Call gen_lasx_haddw_q_d_punned instead
	of gen_lasx_xvhaddw_q_d.
	(reduc_plus_scal_v8si): Likewise.
	* config/loongarch/lsx.md (UNSPEC_LSX_VHADDW_Q_D): Remove.
	(UNSPEC_ASX_VHSUBW_Q_D): Remove.
	(UNSPEC_ASX_VHADDW_QU_DU): Remove.
	(UNSPEC_ASX_VHSUBW_QU_DU): Remove.
	(lsx_vh<addsub:optab>w_h<u>_b<u>): Remove.
	(lsx_vh<addsub:optab>w_w<u>_h<u>): Remove.
	(lsx_vh<addsub:optab>w_d<u>_w<u>): Remove.
	(lsx_vhaddw_q_d): Remove.
	(lsx_vhsubw_q_d): Remove.
	(lsx_vhaddw_qu_du): Remove.
	(lsx_vhsubw_qu_du): Remove.
	(reduc_plus_scal_v2di): Change the temporary register mode to
	V1TI, and pun the mode calling gen_vec_extractv2didi.
	(reduc_plus_scal_v4si): Change the temporary register mode to
	V1TI.
	* config/loongarch/simd.md (simd_h<optab>w_<mode>_<su>): New
	define_insn.
	(<simd_isa>_<x>vh<optab>w_<simdfmt_w><u>_<simdfmt><u>): New
	define_expand.
	(<simd_isa>_h<optab>w_q<u>_d<u>_punned): New define_expand.
	* config/loongarch/loongarch-builtins.cc
	(CODE_FOR_lsx_vhaddw_q_d): Define as a macro to override with
	punned expand.
	(CODE_FOR_lsx_vhaddw_qu_du): Likewise.
	(CODE_FOR_lsx_vhsubw_q_d): Likewise.
	(CODE_FOR_lsx_vhsubw_qu_du): Likewise.
	(CODE_FOR_lasx_xvhaddw_q_d): Likewise.
	(CODE_FOR_lasx_xvhaddw_qu_du): Likewise.
	(CODE_FOR_lasx_xvhsubw_q_d): Likewise.
	(CODE_FOR_lasx_xvhsubw_qu_du): Likewise.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lasx.md (UNSPEC_LASX_XVADDWEV): Remove.
	(UNSPEC_LASX_XVADDWEV2): Remove.
	(UNSPEC_LASX_XVADDWEV3): Remove.
	(UNSPEC_LASX_XVSUBWEV): Remove.
	(UNSPEC_LASX_XVSUBWEV2): Remove.
	(UNSPEC_LASX_XVMULWEV): Remove.
	(UNSPEC_LASX_XVMULWEV2): Remove.
	(UNSPEC_LASX_XVMULWEV3): Remove.
	(UNSPEC_LASX_XVADDWOD): Remove.
	(UNSPEC_LASX_XVADDWOD2): Remove.
	(UNSPEC_LASX_XVADDWOD3): Remove.
	(UNSPEC_LASX_XVSUBWOD): Remove.
	(UNSPEC_LASX_XVSUBWOD2): Remove.
	(UNSPEC_LASX_XVMULWOD): Remove.
	(UNSPEC_LASX_XVMULWOD2): Remove.
	(UNSPEC_LASX_XVMULWOD3): Remove.
	(lasx_xv<addsubmul:optab>wev_h_b<u>): Remove.
	(lasx_xv<addsubmul:optab>wev_w_h<u>): Remove.
	(lasx_xv<addsubmul:optab>wev_d_w<u>): Remove.
	(lasx_xvaddwev_q_d): Remove.
	(lasx_xvsubwev_q_d): Remove.
	(lasx_xvmulwev_q_d): Remove.
	(lasx_xv<addsubmul:optab>wod_h_b<u>): Remove.
	(lasx_xv<addsubmul:optab>wod_w_h<u>): Remove.
	(lasx_xv<addsubmul:optab>wod_d_w<u>): Remove.
	(lasx_xvaddwod_q_d): Remove.
	(lasx_xvsubwod_q_d): Remove.
	(lasx_xvmulwod_q_d): Remove.
	(lasx_xvaddwev_q_du): Remove.
	(lasx_xvsubwev_q_du): Remove.
	(lasx_xvmulwev_q_du): Remove.
	(lasx_xvaddwod_q_du): Remove.
	(lasx_xvsubwod_q_du): Remove.
	(lasx_xvmulwod_q_du): Remove.
	(lasx_xv<addmul:optab>wev_h_bu_b): Remove.
	(lasx_xv<addmul:optab>wev_w_hu_h): Remove.
	(lasx_xv<addmul:optab>wev_d_wu_w): Remove.
	(lasx_xv<addmul:optab>wod_h_bu_b): Remove.
	(lasx_xv<addmul:optab>wod_w_hu_h): Remove.
	(lasx_xv<addmul:optab>wod_d_wu_w): Remove.
	(lasx_xvaddwev_q_du_d): Remove.
	(lasx_xvsubwev_q_du_d): Remove.
	(lasx_xvmulwev_q_du_d): Remove.
	(lasx_xvaddwod_q_du_d): Remove.
	(lasx_xvsubwod_q_du_d): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_XVADDWEV): Remove.
	(UNSPEC_LSX_VADDWEV2): Remove.
	(UNSPEC_LSX_VADDWEV3): Remove.
	(UNSPEC_LSX_VSUBWEV): Remove.
	(UNSPEC_LSX_VSUBWEV2): Remove.
	(UNSPEC_LSX_VMULWEV): Remove.
	(UNSPEC_LSX_VMULWEV2): Remove.
	(UNSPEC_LSX_VMULWEV3): Remove.
	(UNSPEC_LSX_VADDWOD): Remove.
	(UNSPEC_LSX_VADDWOD2): Remove.
	(UNSPEC_LSX_VADDWOD3): Remove.
	(UNSPEC_LSX_VSUBWOD): Remove.
	(UNSPEC_LSX_VSUBWOD2): Remove.
	(UNSPEC_LSX_VMULWOD): Remove.
	(UNSPEC_LSX_VMULWOD2): Remove.
	(UNSPEC_LSX_VMULWOD3): Remove.
	(lsx_v<addsubmul:optab>wev_h_b<u>): Remove.
	(lsx_v<addsubmul:optab>wev_w_h<u>): Remove.
	(lsx_v<addsubmul:optab>wev_d_w<u>): Remove.
	(lsx_vaddwev_q_d): Remove.
	(lsx_vsubwev_q_d): Remove.
	(lsx_vmulwev_q_d): Remove.
	(lsx_v<addsubmul:optab>wod_h_b<u>): Remove.
	(lsx_v<addsubmul:optab>wod_w_h<u>): Remove.
	(lsx_v<addsubmul:optab>wod_d_w<u>): Remove.
	(lsx_vaddwod_q_d): Remove.
	(lsx_vsubwod_q_d): Remove.
	(lsx_vmulwod_q_d): Remove.
	(lsx_vaddwev_q_du): Remove.
	(lsx_vsubwev_q_du): Remove.
	(lsx_vmulwev_q_du): Remove.
	(lsx_vaddwod_q_du): Remove.
	(lsx_vsubwod_q_du): Remove.
	(lsx_vmulwod_q_du): Remove.
	(lsx_v<addmul:optab>wev_h_bu_b): Remove.
	(lsx_v<addmul:optab>wev_w_hu_h): Remove.
	(lsx_v<addmul:optab>wev_d_wu_w): Remove.
	(lsx_v<addmul:optab>wod_h_bu_b): Remove.
	(lsx_v<addmul:optab>wod_w_hu_h): Remove.
	(lsx_v<addmul:optab>wod_d_wu_w): Remove.
	(lsx_vaddwev_q_du_d): Remove.
	(lsx_vsubwev_q_du_d): Remove.
	(lsx_vmulwev_q_du_d): Remove.
	(lsx_vaddwod_q_du_d): Remove.
	(lsx_vsubwod_q_du_d): Remove.
	(lsx_vmulwod_q_du_d): Remove.
	* config/loongarch/loongarch-modes.def: Add V4TI and V1DI.
	* config/loongarch/loongarch-protos.h
	(loongarch_gen_stepped_int_parallel): New function prototype.
	* config/loongarch/loongarch.cc (loongarch_print_operand):
	Accept 'O' for printing "ev" or "od."
	(loongarch_gen_stepped_int_parallel): Implement.
	* config/loongarch/predicates.md
	(vect_par_cnst_even_or_odd_half): New define_predicate.
	* config/loongarch/simd.md (WVEC_HALF): New define_mode_attr.
	(simdfmt_w): Likewise.
	(zero_one): New define_int_iterator.
	(ev_od): New define_int_attr.
	(simd_<optab>w_evod_<mode:IVEC>_<su>): New define_insn.
	(<simd_isa>_<x>v<optab>w<ev_od>_<simdfmt_w>_<simdfmt><u>): New
	define_expand.
	(simd_<optab>w_evod_<mode>_hetero): New define_insn.
	(<simd_isa>_<x>v<optab>w<ev_od>_<simdfmt_w>_<simdfmt>u_<simdfmt>):
	New define_expand.
	(DIVEC): New define_mode_iterator.
	(<simd_isa>_<optab>w<ev_od>_q_d<u>_punned): New define_expand.
	(<simd_isa>_<optab>w<ev_od>_q_du_d_punned): Likewise.
	* config/loongarch/loongarch-builtins.cc
	(CODE_FOR_lsx_vaddwev_q_d): Define as a macro to override it
	with the punned expand.
	(CODE_FOR_lsx_vaddwev_q_du): Likewise.
	(CODE_FOR_lsx_vsubwev_q_d): Likewise.
	(CODE_FOR_lsx_vsubwev_q_du): Likewise.
	(CODE_FOR_lsx_vmulwev_q_d): Likewise.
	(CODE_FOR_lsx_vmulwev_q_du): Likewise.
	(CODE_FOR_lsx_vaddwod_q_d): Likewise.
	(CODE_FOR_lsx_vaddwod_q_du): Likewise.
	(CODE_FOR_lsx_vsubwod_q_d): Likewise.
	(CODE_FOR_lsx_vsubwod_q_du): Likewise.
	(CODE_FOR_lsx_vmulwod_q_d): Likewise.
	(CODE_FOR_lsx_vmulwod_q_du): Likewise.
	(CODE_FOR_lsx_vaddwev_q_du_d): Likewise.
	(CODE_FOR_lsx_vmulwev_q_du_d): Likewise.
	(CODE_FOR_lsx_vaddwod_q_du_d): Likewise.
	(CODE_FOR_lsx_vmulwod_q_du_d): Likewise.
	(CODE_FOR_lasx_xvaddwev_q_d): Likewise.
	(CODE_FOR_lasx_xvaddwev_q_du): Likewise.
	(CODE_FOR_lasx_xvsubwev_q_d): Likewise.
	(CODE_FOR_lasx_xvsubwev_q_du): Likewise.
	(CODE_FOR_lasx_xvmulwev_q_d): Likewise.
	(CODE_FOR_lasx_xvmulwev_q_du): Likewise.
	(CODE_FOR_lasx_xvaddwod_q_d): Likewise.
	(CODE_FOR_lasx_xvaddwod_q_du): Likewise.
	(CODE_FOR_lasx_xvsubwod_q_d): Likewise.
	(CODE_FOR_lasx_xvsubwod_q_du): Likewise.
	(CODE_FOR_lasx_xvmulwod_q_d): Likewise.
	(CODE_FOR_lasx_xvmulwod_q_du): Likewise.
	(CODE_FOR_lasx_xvaddwev_q_du_d): Likewise.
	(CODE_FOR_lasx_xvmulwev_q_du_d): Likewise.
	(CODE_FOR_lasx_xvaddwod_q_du_d): Likewise.
	(CODE_FOR_lasx_xvmulwod_q_du_d): Likewise.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lsx.md (mov<LSX:mode>): Remove.
	(movmisalign<LSX:mode>): Remove.
	(mov<LSX:mode>_lsx): Remove.
	* config/loongarch/lasx.md (mov<LASX:mode>): Remove.
	(movmisalign<LASX:mode>): Remove.
	(mov<LASX:mode>_lasx): Remove.
	* config/loongarch/loongarch-modes.def (V1TI): Add.
	(V2TI): Mention in the comment.
	* config/loongarch/loongarch.md (mode): Add V1TI and V2TI.
	* config/loongarch/simd.md (ALLVEC_TI): New mode iterator.
	(mov<ALLVEC_TI:mode): New define_expand.
	(movmisalign<ALLVEC_TI:mode>): Likewise.
	(mov<ALLVEC_TI:mode>_simd): New define_insn_and_split.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch-protos.h
	(loongarch_const_vector_vrepli): New function prototype.
	* config/loongarch/loongarch.cc (loongarch_const_vector_vrepli):
	Implement.
	(loongarch_const_insns): Call loongarch_const_vector_vrepli
	instead of loongarch_const_vector_same_int_p.
	(loongarch_split_vector_move_p): Likewise.
	(loongarch_output_move): Use loongarch_const_vector_vrepli to
	pun operend[1] into a better mode if it's a const int vector,
	and decide the suffix of [x]vrepli with the new mode.
	* config/loongarch/constraints.md (YI): Call
	loongarch_const_vector_vrepli instead of
	loongarch_const_vector_same_int_p.

2025-02-19  Xi Ruoyao  <xry111@xry111.site>

	PR target/115478
	* config/loongarch/loongarch.md (any_or_plus): New
	define_code_iterator.
	(bstrins_<mode>_for_ior_mask): Use any_or_plus instead of ior.
	(bytepick_w_<bytepick_imm>): Likewise.
	(bytepick_d_<bytepick_imm>): Likewise.
	(bytepick_d_<bytepick_imm>_rev): Likewise.

2025-02-19  Jeff Law  <jlaw@ventanamicro.com>

	PR middle-end/113525
	* doc/invoke.texi (dump-rtl-sibling): Drop documentation for pass
	removed long ago.
	(dump-rtl-unshare): Likewise.

2025-02-18  Andi Kleen  <ak@gcc.gnu.org>

	* doc/invoke.texi:

2025-02-18  David Malcolm  <dmalcolm@redhat.com>

	* opts-diagnostic.cc (sarif_scheme_handler::make_sink): Put
	properties in alphabetical order.

2025-02-18  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/115703
	* config/riscv/riscv-vsetvl.cc: Use max_sew for calculating the
	new LMUL.

2025-02-18  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/108840
	* late-combine.cc (late_combine::check_register_pressure):
	Take only allocatable registers into account when checking
	the permissiveness of register classes.

2025-02-18  Alex Coplan  <alex.coplan@arm.com>

	PR rtl-optimization/118320
	* pair-fusion.cc (pair_fusion_bb_info::fuse_pair): Tweak wording in dump
	message when punting on invalid use arrays.

2025-02-18  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/tuning_models/generic_armv8_a.h: Updated prefetch
	struct pointer.

2025-02-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98845
	* tree-ssa-tail-merge.cc (stmt_local_def): Consider a
	def with no uses not local.

2025-02-18  Pan Li  <pan2.li@intel.com>

	PR target/118540
	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Report error when cmd xlen is different with target attribute.

2025-02-18  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.opt.urls: Adjust the order for avx10.2
	and avx10.2-512 due to their order change in i386.opt.

2025-02-18  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118805
	* gimple-fold.cc (fold_truth_andor_for_combine): Detect and
	cope with zero-extension in signbit tests.  Reject swapping
	right-compare operands if rsignbit.

2025-02-17  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.cc (ix86_find_all_reg_use):
	Scan only for SET RTX in PARALLEL.

2025-02-17  Uros Bizjak  <ubizjak@gmail.com>

	PR middle-end/118288
	* builtins.cc (expand_builtin_crc_table_based):
	Use gen_int_mode to emit constant integers with MSB set.

2025-02-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118895
	* tree-ssa-sccvn.cc (vn_nary_build_or_lookup_1): Only allow
	CSE if we can verify the result is available.

2025-02-17  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118764
	* config/avr/gen-avr-mmcu-specs.cc (print_mcu)
	[has CVT]: Mention CVT in header comment of generated specs file.

2025-02-17  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.opt.urls: Regenetated.

2025-02-17  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX10_1_UNSET): Adjust macro.
	(OPTION_MASK_ISA2_AVX10_2_256_UNSET): Removed.
	(OPTION_MASK_ISA2_AVX10_2_512_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX10_2_UNSET): New.
	(ix86_handle_option): Remove disable part for avx10.2-256.
	Rename avx10.2-512 switch case to avx10.2 and adjust disable
	part macro.
	* common/config/i386/i386-isas.h: Adjust avx10.2 and
	avx10.2-512.
	* config/i386/driver-i386.cc
	(host_detect_local_cpu): Do not append -mno-avx10.x-256
	for -march=native.
	* config/i386/i386-options.cc
	(ix86_valid_target_attribute_inner_p): Adjust avx10.2 and
	avx10.2-512.
	* config/i386/i386.opt: Reject Negative for mavx10.2-256.
	Alias mavx10.2-512 to mavx10.2. Reject Negative for
	mavx10.2-512.
	* doc/extend.texi: Adjust documentation.
	* doc/sourcebuild.texi: Ditto.

2025-02-17  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX2_UNSET): Change AVX10.1 unset macro.
	(OPTION_MASK_ISA2_AVX10_1_256_UNSET): Removed.
	(OPTION_MASK_ISA2_AVX10_1_512_UNSET): Removed.
	(OPTION_MASK_ISA2_AVX10_1_UNSET): New.
	(ix86_handle_option): Adjust AVX10.1 unset macro.
	* common/config/i386/i386-isas.h: Remove avx10.1.
	* config/i386/i386-options.cc
	(ix86_valid_target_attribute_inner_p): Ditto.
	(ix86_option_override_internal): Adjust warning message.
	* config/i386/i386.opt: Remove mavx10.1.
	* doc/extend.texi: Remove avx10.1 and adjust doc.
	* doc/sourcebuild.texi: Ditto.

2025-02-17  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118815
	* config/i386/i386-options.cc (ix86_option_override_internal):
	Do not check vector size conflict when AVX512 is not explicitly
	set.

2025-02-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/118248
	* config/riscv/riscv-string.cc (riscv_block_move_straight): Only
	allocate REGS buffer if it will be needed.

2025-02-16  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118764
	* config/avr/avr-c.cc (avr_cpu_cpp_builtins)
	[TARGET_CVT]: Define __AVR_CVT__.
	* doc/invoke.texi (AVR Built-in Macros): Document __AVR_CVT__.

2025-02-16  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_result_regno_unused_p): New static function.
	(avr_out_bitop): Only output result bytes that are used.
	(avr_out_plus_1): Same.

2025-02-16  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-protos.h (avr_builtin_supported_p): Remove.
	* config/avr/avr.cc (avr_init_builtins): Don't initialize
	non-available built-ins with NULL_TREE.
	(avr_builtin_supported_p): Move to...
	* config/avr/avr-c.cc: ...here.
	(avr_resolve_overloaded_builtin): Run avr_builtin_supported_p.

2025-02-16  H.J. Lu  <hjl.tools@gmail.com>

	PR target/109780
	PR target/109093
	* config/i386/i386.cc (ix86_update_stack_alignment): New.
	(ix86_find_all_reg_use_1): Likewise.
	(ix86_find_all_reg_use): Likewise.
	(ix86_find_max_used_stack_alignment): Also check memory accesses
	from registers defined by stack or frame registers.

2025-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98028
	* vr-values.cc (check_for_binary_op_overflow): Try to use a known
	relationship betwen op0/op1 to statically determine overflow state.

2025-02-15  Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/autovec-opt.md
	(*single_widen_first_<any_widen_binop:optab><any_extend:su><mode>):
	New combine "bridge" pattern.

2025-02-15  Keith Packard  <keithp@keithp.com>

	* config/rx/rx.md (rx_cmpstrn): Correctly handle len=0 case.

2025-02-15  David Malcolm  <dmalcolm@redhat.com>

	* libsarifreplay.cc (sarif_replayer::handle_result_obj): Call
	handle_fix_object if we see a single-element "fixes" array.
	(sarif_replayer::handle_fix_object): New.
	(sarif_replayer::handle_artifact_change_object): New.

2025-02-15  David Malcolm  <dmalcolm@redhat.com>

	* libsarifreplay.cc (should_add_rule_p): New.
	(sarif_replayer::handle_result_obj): Use it to filter out rules
	that don't make sense.

2025-02-15  David Malcolm  <dmalcolm@redhat.com>

	* libsarifreplay.cc (sarif_replayer::handle_result_obj): Treat any
	relatedLocations without messages as secondary ranges within the
	diagnostic.  Doing so requires stashing the notes until after
	the diagnostic has been finished, so that relatedLocations can be
	walked in one pass.

2025-02-15  David Malcolm  <dmalcolm@redhat.com>

	PR sarif-replay/118881
	* doc/libgdiagnostics/topics/physical-locations.rst: Add
	diagnostic_physical_location_get_file.
	* libgdiagnostics++.h (physical_location::get_file): New wrapper.
	(diagnostic::add_location): Likewise.
	* libgdiagnostics.cc (diagnostic_manager::get_file_by_name): New.
	(diagnostic_physical_location::get_file): New.
	(diagnostic_physical_location_get_file): New.
	* libgdiagnostics.h (diagnostic_physical_location_get_file): New.
	* libgdiagnostics.map (diagnostic_physical_location_get_file): New.
	* libsarifreplay.cc (class annotation): New.
	(add_any_annotations): New.
	(sarif_replayer::handle_result_obj): Collect vectors of
	annotations in the calls to handle_location_object and apply them
	to "err" and to "note" as appropriate.
	(sarif_replayer::handle_thread_flow_location_object): Pass nullptr
	for annotations.
	(sarif_replayer::handle_location_object): Handle §3.28.6
	"annotations" property, using it to populate a new
	"out_annotations" param.

2025-02-15  Thomas Schwinge  <thomas@codesourcery.com>

	* config/nvptx/nvptx.cc (nvptx_record_needed_fndecl): Tag as
	'static'.

2025-02-15  Jin Ma  <jinma@linux.alibaba.com>

	PR target/118872
	* config/riscv/riscv.cc (riscv_fntype_abi): Strengthen the logic
	of the check to avoid missing the error report.

2025-02-14  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118878
	* config/avr/avr.cc (avr_out_plus_1): Don't ICE on result of
	paradoxical reg's register allocation.

2025-02-14  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/94282
	PR target/113331
	* common/config/gcn/gcn-common.cc (gcn_except_unwind_info): 'return UI_TARGET;'.
	* config/gcn/gcn.cc (gcn_asm_init_sections): New function.
	(TARGET_ASM_INIT_SECTIONS): '#define'.

2025-02-14  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/86660
	* common/config/nvptx/nvptx-common.cc (nvptx_except_unwind_info):
	'return UI_TARGET;'.
	* config/nvptx/nvptx.cc (nvptx_assemble_integer): Handle
	'exception_section'.
	(nvptx_output_section_asm_op, nvptx_asm_init_sections): New
	functions.
	(TARGET_ASM_INIT_SECTIONS): '#define'.
	* config/nvptx/nvptx.h (TEXT_SECTION_ASM_OP, DATA_SECTION_ASM_OP):
	Don't '#define'.
	(ASM_OUTPUT_DWARF_DELTA): '#define'.

2025-02-14  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.cc (init_frag): New 'bool active' member.
	(output_init_frag, nvptx_assemble_value, nvptx_assemble_integer)
	(nvptx_output_skip, nvptx_assemble_decl_begin)
	(nvptx_assemble_decl_end): Sanity-check its state.

2025-02-14  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.cc (nvptx_output_skip): Clarify case of
	no or incomplete initializer.

2025-02-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118852
	* tree-vect-slp.cc (vect_analyze_slp): For early-break
	forced-live IVs make sure we create an appropriate
	entry into the SLP graph.

2025-02-14  Jakub Jelinek  <jakub@redhat.com>

	PR debug/118790
	* tree.cc (struct gt_value_expr_mark_data): New type.
	(gt_value_expr_mark_2): Don't call ggc_set_mark, instead check
	ggc_marked_p.  Treat data as gt_value_expr_mark_data * with pset
	in it rather than address of the pset itself and push to be marked
	VAR_DECLs into to_mark vec.
	(gt_value_expr_mark_1): Change argument from hash_set<tree> *
	to gt_value_expr_mark_data * and find pset in it.
	(gt_value_expr_mark): Pass to traverse_noresize address of
	gt_value_expr_mark_data object rather than hash_table<tree> and
	for all entries in the to_mark vector after the traversal call
	gt_ggc_mx.

2025-02-14  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/genopts/loongarch.opt.in: Add
	option '-maddr-reg-reg-cost='.
	* config/loongarch/loongarch-def.cc
	(loongarch_rtx_cost_data::loongarch_rtx_cost_data): Initialize
	addr_reg_reg_cost to 3.
	* config/loongarch/loongarch-opts.cc
	(loongarch_target_option_override): If '-maddr-reg-reg-cost='
	is not used, set it to the initial value.
	* config/loongarch/loongarch-tune.h
	(struct loongarch_rtx_cost_data): Add the member
	addr_reg_reg_cost and its assignment function to the structure
	loongarch_rtx_cost_data.
	* config/loongarch/loongarch.cc (loongarch_address_insns):
	Use la_addr_reg_reg_cost to set the cost of ADDRESS_REG_REG.
	* config/loongarch/loongarch.opt: Regenerate.
	* config/loongarch/loongarch.opt.urls: Regenerate.
	* doc/invoke.texi: Add description of '-maddr-reg-reg-cost='.

2025-02-14  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/118843
	* config/loongarch/loongarch-c.cc
	(loongarch_update_cpp_builtins): Fix macro definition issues.

2025-02-14  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/118828
	* config/loongarch/loongarch-c.cc (loongarch_pragma_target_parse):
	Update the predefined macros.

2025-02-14  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-c.cc (builtin_undef): New macro.
	(loongarch_cpu_cpp_builtins): Split to loongarch_update_cpp_builtins
	and loongarch_define_unconditional_macros.
	(loongarch_def_or_undef): New functions.
	(loongarch_define_unconditional_macros): Likewise.
	(loongarch_update_cpp_builtins): Likewise.

2025-02-14  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-target-attr.cc
	(loongarch_pragma_target_parse): Move to ...
	(loongarch_register_pragmas): Move to ...
	* config/loongarch/loongarch-c.cc
	(loongarch_pragma_target_parse): ... here.
	(loongarch_register_pragmas): ... here.
	* config/loongarch/loongarch-protos.h
	(loongarch_process_target_attr): Function Declaration.

2025-02-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/90579
	* tree-ssa-forwprop.cc (simplify_bitfield_ref): Move to
	match.pd.
	(pass_forwprop::execute): Adjust.
	* match.pd (bit_field_ref (vec_perm ...)): New pattern
	modeled after simplify_bitfield_ref.
	* tree-vect-loop.cc (vect_expand_fold_left): Fold the
	element extract stmt, combining it with the vector def.

2025-02-13  Robin Dapp  <rdapp.gcc@gmail.com>

	PR target/118832
	* config/riscv/riscv-v.cc (expand_const_vector):  Expand as
	vlmax insn during lra.

2025-02-13  Marek Polacek  <polacek@redhat.com>

	PR driver/117739
	* doc/invoke.texi: Tweak wording for -Whardened.
	* gcc.cc (driver_handle_option): If -z lazy or -z norelro was
	specified, don't enable linker hardening.
	(process_command): Don't check warn_hardened.

2025-02-13  Ed Catmur  <ed@catmur.uk>
	    Jason Merrill  <jason@redhat.com>

	PR c++/70536
	* dwarf2out.cc (gen_formal_parameter_pack_die): Add name attr.

2025-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR debug/118790
	* gengtype.cc (write_roots): Remove cache variable, instead break from
	the loop on match and test o for NULL.  If the cache option has
	non-empty string argument, call the specified function with v->name
	as argument before calling gt_cleare_cache on it.
	* tree.cc (gt_value_expr_mark_2, gt_value_expr_mark_1,
	gt_value_expr_mark): New functions.
	(value_expr_for_decl): Use GTY ((cache ("gt_value_expr_mark"))) rather
	than just GTY ((cache)).
	* doc/gty.texi (cache): Document optional argument of cache option.

2025-02-13  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/114522
	* config/arm/arm-builtins.cc (arm_fold_aes_op): New function.
	(arm_general_gimple_fold_builtin): New function.
	* config/arm/arm-builtins.h (arm_general_gimple_fold_builtin): New
	prototype.
	* config/arm/arm.cc (arm_gimple_fold_builtin): Call
	arm_general_gimple_fold_builtin as needed.

2025-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR c++/118822
	PR c++/118833
	* tree-iterator.h (tsi_split_stmt_list): Declare.
	* tree-iterator.cc (tsi_split_stmt_list): New function.

2025-02-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (gcc_cv_ld_eh_frame_ciev3): Remove.
	* configure, config.in: Regenerate.
	* config/sol2.cc (solaris_override_options): Remove.
	* config/sol2.h (SUBTARGET_OVERRIDE_OPTIONS): Remove.
	* config/sol2-protos.h (solaris_override_options): Remove.

2025-02-13  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* doc/install.texi (Specific, *-*-solaris2*): Updates for newer
	Solaris 11.4 SRUs and binutils 2.44.

2025-02-13  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/118835
	* config/s390/s390.cc (s390_valid_shift_count): Reject shift
	count operands which do not trivially fit the scheme of
	address operands.

2025-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118817
	* tree-ssa-sccvn.cc (vn_nary_simplify): Do not process
	CONSTRUCTOR NARY or update from CONSTRUCTOR simplified
	gimple_match_op.

2025-02-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/102150
	* loop-invariant.cc (find_invariant_insn): Treat inline-asm similar to
	trapping instruction and only move them if always executed.

2025-02-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/102150
	* ifcvt.cc (cheap_bb_rtx_cost_p): Return false if the insn
	has an inline-asm in it.

2025-02-12  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt.urls: Add -mcall-main.

2025-02-12  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118806
	* config/avr/avr.opt (-mcall-main): New option and...
	(avropt_call_main): ...variable.
	* config/avr/avr.cc (avr_no_call_main_p): New variable.
	(avr_insert_attributes) [-mno-call-main, main]: Add attributes
	noreturn and section(".init9") to main.  Set avr_no_call_main_p.
	(avr_file_end) [avr_no_call_main_p]: Define symbol __call_main.
	* doc/invoke.texi (AVR Options) <-mno-call-main>: Document.
	<-mnodevicelib>: Extend explanation.

2025-02-12  Alex Coplan  <alex.coplan@arm.com>

	PR tree-optimization/117790
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Set profile counts for {main,alt}_loop_exit_block.

2025-02-12  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/vector.md: vncvt substitute vnsrl.
	vnsrl with x0 replace with immediate 0.
	vneg substitute vrsub.

2025-02-12  Jin Ma  <jinma@linux.alibaba.com>

	PR target/118601
	* config/riscv/riscv-string.cc (expand_block_move): Check with new
	constraint 'vl' instead of 'K'.
	(expand_vec_setmem): Likewise.
	(expand_vec_cmpmem): Likewise.
	* config/riscv/riscv-v.cc (force_vector_length_operand): Likewise.
	(expand_load_store): Likewise.
	(expand_strided_load): Likewise.
	(expand_strided_store): Likewise.
	(expand_lanes_load_store): Likewise.

2025-02-12  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/install.texi: Add missing comma after @xref to fix warning.

2025-02-12  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi: Fix a bunch of typos and other writing bugs.
	* doc/invoke.texi: Likewise.

2025-02-12  Sandra Loosemore  <sloosemore@baylibre.com>

	* Makefile.in (TEXI_GCCINT_FILES): Remove interface.texi.
	* doc/gccint.texi (Top): Remove menu entry for the "interface" node,
	and include of interface.texi.
	* doc/interface.texi: Delete.

2025-02-12  Yangyu Chen  <cyy@cyyself.name>

	* config/riscv/riscv-feature-bits.h (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop.
	(struct riscv_vendor_feature_bits): Drop.

2025-02-11  Jeff Law  <jlaw@ventanamicro.com>

	PR target/115478
	* config/aarch64/iterators.md (any_or_plus): New code iterator.
	* config/aarch64/aarch64.md (extr<mode>5_insn): Use any_or_plus.
	(extr<mode>5_insn_alt, extrsi5_insn_uxtw): Likewise.
	(extrsi5_insn_uxtw_alt, extrsi5_insn_di): Likewise.

2025-02-11  Jason Merrill  <jason@redhat.com>

	PR c++/188574
	* doc/invoke.texi: Adjust -frange-for-ext-temps documentation.

2025-02-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def
	(SSVE_FP8FMA): Adjust formatting.
	(FP8DOT4): Replace FP8FMA dependency with FP8.
	(SSVE_FP8DOT4): Replace SSVE_FP8FMA dependency with SME2+FP8.
	(FP8DOT2): Replace FP8DOT4 dependency with FP8.
	(SSVE_FP8DOT2): Replace SSVE_FP8DOT4 dependency with SME2+FP8.

2025-02-11  Sandra Loosemore  <sloosemore@baylibre.com>

	* omp-general.cc (omp_check_context_selector): Change
	metadirective_p argument to a 3-way flag.  Add extra check for
	OMP_CTX_BEGIN_DECLARE_VARIANT.
	* omp-general.h (enum omp_ctx_directive): New.
	(omp_check_context_selector): Adjust declaration.

2025-02-11  Sandra Loosemore  <sloosemore@baylibre.com>

	* omp-general.cc (omp_context_selector_props_compare): Handle
	arbitrary expressions in the "user" and "device_num" selectors.
	(omp_context_selector_set_compare): Detect mismatch when one
	selector specifies a score and the other doesn't.

2025-02-11  Martin Jambor  <mjambor@suse.cz>

	PR lto/118125
	* ipa-fnsummary.cc (redirect_to_unreachable): Add checking assert
	that the builtin_unreachable decl has attribute cold.

2025-02-11  David Malcolm  <dmalcolm@redhat.com>

	PR sarif-replay/118792
	* libsarifreplay.cc (sarif_replayer::handle_region_object): Fix
	off-by-one in handling of endColumn property so that the code
	matches the comment and the SARIF spec (§3.30.8).

2025-02-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118817
	* tree-ssa-pre.cc (fully_constant_expression): Fold into
	the single caller.
	(phi_translate_1): Refactor folded in fully_constant_expression.
	* tree-ssa-sccvn.cc (vn_nary_simplify): Update the NARY with
	the simplified expression.

2025-02-11  H.J. Lu  <hjl.tools@gmail.com>

	PR target/118825
	* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Replace x with
	SYM.

2025-02-11  YunQiang Su  <syq@debian.org>

	* config.gcc: Add mips*64*-linux-muslabi64 triple support.

2025-02-11  Jie Mei  <jie.mei@oss.cipunited.com>
	    Xi Ruoyao  <xry111@xry111.site>

	* config/mips/i6400.md (i6400_fpu_minmax): Include
	fclass type.
	(i6400_fpu_fadd): Include frint type.
	* config/mips/mips.cc (AVAIL_NON_MIPS16): Add an entry
	for __builtin_mipsr6_xxx.
	(MIPSR6_BUILTIN_PURE): Same as above.
	(CODE_FOR_mipsr6_min_a_s, CODE_FOR_mipsr6_min_a_d)
	(CODE_FOR_mipsr6_max_a_s, CODE_FOR_mipsr6_max_a_d)
	(CODE_FOR_mipsr6_class_s, CODE_FOR_mipsr6_class_d):
	New code_aliasing macros.
	(mips_builtins): Add mips32r6 min_a_s, min_a_d, max_a_s,
	max_a_d, class_s, class_d builtins.
	* config/mips/mips.h (ISA_HAS_FRINT): Define a new macro.
	(ISA_HAS_FCLASS): Same as above.
	* config/mips/mips.md (UNSPEC_FRINT): New unspec.
	(UNSPEC_FCLASS): Same as above.
	(type): Add frint and fclass.
	(fmin_a_<mode>): Generates MINA.fmt instructions.
	(fmax_a_<mode>): Generates MAXA.fmt instructions.
	(rint<mode>2): Generates RINT.fmt instructions.
	(fclass_<mode>): Generates CLASS.fmt instructions.
	* config/mips/p6600.md (p6600_fpu_fadd): Include
	frint type.
	(p6600_fpu_fabs): Include fclass type.

2025-02-11  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118813
	* config/i386/avx512bwintrin.h: Fix wrong __OPTIMIZE__
	wrap.

2025-02-10  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/mkoffload.cc (enum elf_arch_code): Add
	EF_AMDGPU_MACH_AMDGCN_NONE.
	(elf_arch): Use enum elf_arch_code as type.
	(tool_cleanup): Silence warning by removing tailing '.' from error.
	(get_arch_name): Return enum elf_arch_code.
	(check_for_missing_lib): New; print fatal error if the multilib
	is not available but it is for the associate generic ISA.
	(main): Call it.

2025-02-10  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (GCN): Update section about multilibs and
	required LLVM version.

2025-02-10  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118097
	* ipa-cp.cc (ipa_get_jf_arith_result): Adjust comment.
	(ipa_get_jf_pass_through_result): Removed.
	(ipa_value_from_jfunc): Use directly ipa_get_jf_arith_result, do
	not specify operation type but make sure we check and possibly
	convert the result.
	(get_val_across_arith_op): Remove the last parameter, always pass
	NULL_TREE to ipa_get_jf_arith_result in its last argument.
	(propagate_vals_across_arith_jfunc): Do not pass res_type to
	get_val_across_arith_op.
	(propagate_vals_across_pass_through): Add checking assert that
	parm_type is not NULL.

2025-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR target/118623
	* config/i386/i386.md (*bt<mode>): Represent bt as
	compare:CCC of const0_rtx and zero_extract rather than
	zero_extract and const0_rtx.
	(*bt<SWI48:mode>_mask): Likewise.
	(*jcc_bt<mode>): Likewise.  Use LTU and GEU as flags test
	instead of EQ and NE.
	(*jcc_bt<mode>_mask): Likewise.
	(*jcc_bt<SWI48:mode>_mask_1): Likewise.
	(Help combine recognize bt followed by cmov splitter): Likewise.
	(*bt<mode>_setcqi): Likewise.
	(*bt<mode>_setncqi): Likewise.
	(*bt<mode>_setnc<mode>): Likewise.
	(*bt<mode>_setncqi_2): Likewise.
	(*bt<mode>_setc<mode>_mask): Likewise.

2025-02-09  Dario Gjorgjevski  <dario.gjorgjevski@gmail.com>

	PR middle-end/117263
	* genautomata.cc (output_statistics): Avoid set but unnused warnings
	when compiling with NDEBUG.

2025-02-09  Jeff Law  <jlaw@ventanamicro.com>

	PR target/118146
	* config/riscv/riscv.cc (riscv_legitimize_move): Handle subreg
	of vector source better to avoid ICE.

2025-02-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118764
	* doc/invoke.texi (AVR Options): Fix typos.

2025-02-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.md (exception_receiver): 'define_expand'.
	* config/nvptx/nvptx.md (exception_receiver): Likewise.

2025-02-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* doc/sourcebuild.texi (Effective-Target Keywords): Clarify that
	effective-target 'exceptions' and 'exceptions_enabled' are
	orthogonal.

2025-02-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/118776
	* config/i386/sse.md (<code><mode>3_mask): Use VI1248_AVX512VLBW
	iterator rather than VI48_AVX512VL.
	(<mask_codefor><code><mode>3<mask_name>): Rename to ...
	(*avx512bw_<code><mode>3<mask_name>): ... this.  Use
	nonimmediate_operand rather than register_operand predicate and %v
	rather than v constraint for operand 1 and adjust condition to reject
	MEMs in both operand 1 and 2.

2025-02-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/114522
	* config/aarch64/aarch64-builtins.cc (aarch64_fold_aes_op): New function.
	(aarch64_general_gimple_fold_builtin): Call aarch64_fold_aes_op for crypto_aese
	and crypto_aesd.

2025-02-07  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (file_cache::m_line_recent,
	m_line_recent_first, m_line_recent_last): Add.
	(file_cache_slot::evict): Clear new fields.
	(file_cache_slot::create): Clear new fields.
	(file_cache_slot::file_cache_slot): Initialize new fields.
	(file_cache_slot::~file_cache_slot): Release m_line_recent.
	(file_cache_slot::get_next_line): Maintain ring buffer of lines
	in m_line_recent.
	(file_cache_slot::read_line_num): Use m_line_recent to look up
	recent lines quickly.

2025-02-07  Richard Earnshaw  <rearnsha@arm.com>

	PR target/118089
	* config/arm/arm.cc (arm_emit_multi_reg_pop): Restructure.
	Don't emit LDR on thumb2 when POP can be used for smaller code.
	Don't add a CFA adjust note when SP is popped off the stack.

2025-02-07  Richard Earnshaw  <rearnsha@arm.com>

	PR target/118089
	* config/arm/arm.cc (arm_emit_multi_reg_pop): Add a CFA adjust
	note to single-register POP instructions.

2025-02-07  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116244
	* ira-build.cc (create_insn_allocnos): Do not restrict the check for
	subreg uses to allocno creation time.  Do it for all uses.

2025-02-07  Richard Biener  <rguenther@suse.de>

	PR jit/118780
	* system.h: Check INCLUDE_DLFCN_H for including dlfcn.h instead
	of ENABLE_PLUGIN.
	* plugin.cc: Define INCLUDE_DLFCN_H.

2025-02-07  Pan Li  <pan2.li@intel.com>

	PR target/118103
	* config/riscv/riscv.cc (riscv_conditional_register_usage): Add
	the VXRM as the global_regs.

2025-02-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/118771
	* config/aarch64/aarch64.cc (aarch64_split_move): Assert that npieces is
	greater than 0.

2025-02-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115538
	* tree-vectorizer.h (vect_get_slp_scalar_def): Declare.
	* tree-vect-slp.cc (vect_get_slp_scalar_def): New helper.
	* tree-vect-generic.cc (expand_vector_conversion): Adjust.
	* tree-vect-stmts.cc (vectorizable_conversion): For SLP
	correctly look at ranges of the scalar defs of the SLP operand.
	(supportable_indirect_convert_operation): Likewise.

2025-02-07  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn.cc (gcn_hsa_declare_function_name): Update
	'amdhsa.version' output to match used code version.
	* config/gcn/gen-gcn-device-macros.awk: Add a comment to
	crosslink.

2025-02-07  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md
	(*sel<code><GPR:mode>_using_<GPR2:mode>): Rename to ...
	(*sel<code><GPR:mode>_using_<X:mode>): ... here.
	(GPR2): Remove as nothing uses it now.

2025-02-07  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118514
	PR tree-optimization/118706
	* gimple-fold.cc (decode_field_reference): Refuse to consider
	merging out-of-bounds BIT_FIELD_REFs.
	(make_bit_field_load): Drop too-strict assert.
	* tree-eh.cc (bit_field_ref_in_bounds_p): Rename to...
	(access_in_bounds_of_type_p): ... this.  Change interface,
	export.
	(tree_could_trap_p): Adjust.
	* tree-eh.h (access_in_bounds_of_type_p): Declare.

2025-02-07  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-devices.def (GCN_DEVICE): Add gfx9-generic,
	gfx902, gfx904, gfx909, gfx1031, gfx1032, gfx1033, gfx1034,
	gfx1035, gfx1101, gfx1102, gfx1150, gfx1151, gfx1152, and gfx1153.
	Add a currently unused column linking, a specific ISA to a generic
	one (if it exists).
	* config/gcn/gcn-tables.opt: Regenerate
	* doc/invoke.texi (AMD GCN): Add the the new gfc... and the older
	gfx{10-3,11}-generic to -march= as 'experimental'.

2025-02-07  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-devices.def (GCN_DEVICE): Change sramecc for
	gfx906 to 'any'.
	* config/gcn/gcn.cc (GCN_DEVICE): Add tailing ... to #define.

2025-02-07  H.J. Lu  <hjl.tools@gmail.com>

	PR rtl-optimization/111673
	PR rtl-optimization/115932
	PR rtl-optimization/116028
	PR rtl-optimization/117081
	PR rtl-optimization/117082
	PR rtl-optimization/118497
	* ira-color.cc (assign_hard_reg): Call the target hook for the
	callee-saved register cost scale in epilogue and prologue.
	* target.def (ira_callee_saved_register_cost_scale): New target
	hook.
	* targhooks.cc (default_ira_callee_saved_register_cost_scale):
	New.
	* targhooks.h (default_ira_callee_saved_register_cost_scale):
	Likewise.
	* config/i386/i386.cc (ix86_ira_callee_saved_register_cost_scale):
	New.
	(TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE): Likewise.
	* doc/tm.texi: Regenerated.
	* doc/tm.texi.in (TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE):
	New.

2025-02-06  Craig Blackmore  <craig.blackmore@embecosm.com>

	* config/riscv/riscv.md: Move UNSPEC_SSP_SET and UNSPEC_SSP_TEST
	to unspec enum.

2025-02-06  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt.urls: Add mcvt.

2025-02-06  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/118756
	* tree-ssa-loop-ivopts.cc (contain_complex_addr_expr): Remove.

2025-02-06  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118764
	* config/avr/avr.opt (-mcvt): New target option.
	* config/avr/avr-arch.h (AVR_CVT): New enum value.
	* config/avr/avr-mcus.def: Add AVR_CVT flag for devices that
	support it.
	* config/avr/avr.cc (avr_handle_isr_attribute) [TARGET_CVT]: Issue
	an error when a vector number larger that 3 is used.
	* config/avr/gen-avr-mmcu-specs.cc (McuInfo.have_cvt): New property.
	(print_mcu) <*avrlibc_startfile>: Use crt<mcu>-cvt.o depending
	on -mcvt (or issue an error when the device doesn't support a CVT).
	* doc/invoke.texi (AVR Options): Document -mcvt.

2025-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/117506
	* loop-iv.cc (get_biv_step_1): For {ZERO,SIGN}_EXTEND
	of PLUS apply {ZERO,SIGN}_EXTEND to op1.

2025-02-06  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118768
	* config/avr/genmultilib.awk: Parse the AVR_MCU lines in
	a more robust way w.r.t. white spaces.

2025-02-06  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/118561
	* config/loongarch/loongarch-builtins.cc
	(loongarch_expand_builtin_lsx_test_branch):
	NULL_RTX will not be returned when an error is detected.
	(loongarch_expand_builtin): Likewise.

2025-02-06  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/110449
	* tree-ssa-loop-manip.h (insert_iv_increment): Declare.
	* tree-ssa-loop-manip.cc (insert_iv_increment): New function,
	split out from...
	(create_iv): ...here and generalized to gimple_seqs.
	* tree-vect-loop.cc (vectorizable_induction): Use
	standard_iv_increment_position and insert_iv_increment
	to insert the IV increment.

2025-02-06  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/117922
	* fold-mem-offsets.cc (pass_fold_mem_offsets::execute):
	Do nothing for a highly connected CFG.

2025-02-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118749
	* tree-vect-data-refs.cc (vector_alignment_reachable_p): Pass
	in the vectorization factor, when that cannot maintain
	the DRs target alignment do not claim we can reach that
	by peeling.

2025-02-05  Jeff Law  <jlaw@ventanamicro.com>

	* config/bfin/bfin.md (abssi): Disable pattern.

2025-02-05  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/115568
	* lra-remat.cc (create_cands): Check that output reload insn is
	adjacent to given insn.  Update a comment.

2025-02-05  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_insn_cost): Give PARALLELs
	the same cost as the costliest SET.

2025-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/117239
	* cselib.cc (cselib_init): Remove spurious closing paren in
	the #ifdef STACK_ADDRESS_OFFSET specific code.

2025-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/117239
	* cselib.cc: Include predict.h.
	(callmem): Change type from rtx to rtx[2].
	(cselib_preserve_only_values): Use callmem[0] rather than callmem.
	(cselib_invalidate_mem): Optimize and don't try to invalidate
	for the mem_rtx == callmem[1] case MEMs which clearly can't be
	below the stack pointer.
	(cselib_process_insn): Use callmem[0] rather than callmem.
	For const/pure calls also call cselib_invalidate_mem (callmem[1])
	in !ACCUMULATE_OUTGOING_ARGS or cfun->calls_alloca functions.
	(cselib_init): Initialize callmem[0] rather than callmem and also
	initialize callmem[1].

2025-02-05  Richard Earnshaw  <rearnsha@arm.com>

	PR target/118089
	* config/arm/arm.cc (thumb2_expand_return): Use LDM SP!, {PC}
	when optimizing for size, or when there's no performance benefit over
	LDR PC, [SP], #4.
	(arm_expand_epilogue): Likewise.

2025-02-05  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.md (*pop_multiple_with_writeback_and_return): Remove
	constraints.  Don't validate the first transfer register here.

2025-02-05  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.cc (decompose_addr_for_ldm_stm): New function.
	(ldm_stm_operation_p): Rework to clarify logic.  Allow single
	registers to be pushed or popped using LDM/STM.

2025-02-05  Xi Ruoyao  <xry111@xry111.site>

	PR tree-optimization/118727
	* tree-vect-patterns.cc (vect_recog_sad_pattern): Don't call
	vect_look_through_possible_promotion on ABD inputs.

2025-02-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/arm/t-rtems: Add Cortex-M33 multilib.

2025-02-04  Andi Kleen  <ak@gcc.gnu.org>

	* doc/invoke.texi: Document file cache tunables.
	* params.opt: Move auto tuning description to lines.

2025-02-04  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.cc (print_operand): Remove the no longer
	necessary 31-bit and weak symbol handling.
	* config/s390/s390.md (*movdi_64): Do not use @PLT with larl.
	(*movsi_larl): Likewise.
	(main_base_64): Likewise.
	(reload_base_64): Likewise.

2025-02-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/117113
	* gimple-loop-jam.cc (unroll_jam_possible_p): Detect when
	we cannot handle virtual SSA update.

2025-02-04  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116926
	* optabs-query.cc (find_widening_optab_handler_and_mode): Fix
	limit for `vec-mode -> scalar-mode` case.

2025-02-04  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/117611
	* combine.cc (simplify_shift_const_1): Bail if not
	scalar int mode.

2025-02-04  Richard Biener  <rguenther@suse.de>

	PR lto/113207
	* ipa-free-lang-data.cc (free_lang_data_in_type): First drop
	const/volatile qualifiers from function argument types,
	then build a simplified type.

2025-02-03  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*sibcall_pop_memory):
	Disable for TARGET_INDIRECT_BRANCH_REGISTER
	* config/i386/predicates.md (call_insn_operand): Enable when
	"satisfies_constraint_Bw (op)" is true, instead of open-coding
	constraint here.
	(sibcall_insn_operand): Ditto with "satisfies_constraint_Bs (op)"

2025-02-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_choose_vector_init_constant):
	New function, split out from...
	(aarch64_expand_vector_init_fallback): ...here.  Use a bit-
	reversed increment to find a constant index.  Add support for
	stepped constants.

2025-02-03  John David Anglin  <danglin@gcc.gnu.org>

	PR rtl-optimization/117248
	* config/pa/predicates.md (r25_operand): New predicate.
	(r26_operand): Likewise.
	* config/pa/pa.md: Use match_operand for r25 and r26 hard
	register operands in mult, div, udiv, mod and umod millicode
	patterns.

2025-02-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118717
	* tree-ssa-phiopt.cc (cond_if_else_store_replacement_1):
	Do not common stores referencing abnormal SSA names.
	* tree-ssa-sink.cc (sink_common_stores_to_bb): Likewise.

2025-02-03  Andi Kleen  <ak@gcc.gnu.org>

	* input.cc (check_line): New.
	(test_replacement): New function to test line caching.
	(input_cc_tests): Call test_replacement

2025-02-03  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (file_cache_slot::get_next_line): Implement
	dynamic sizing of m_line_record based on input length.
	* params.opt: (param_file_cache_lines): Set to 0 to size
	dynamically.

2025-02-03  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (total_lines_num): Remove.
	(file_cache_slot::evict): Ditto.
	(file_cache_slot::create): Ditto.
	(file_cache_slot::set_content): Ditto.
	(file_cache_slot::file_cache_slot): Ditto.
	(file_cache_slot::dump): Ditto.

2025-02-03  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (file_cache_slot::get_next_line): Use new algorithm
	to maintain
	(file_cache_slot::read_line_num): Use binary search for lookup.

2025-02-03  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (file_cache::tune): New function.
	* input.h (class file_cache): Make tunables non const.
	* params.opt: Add new tunables.
	* toplev.cc (toplev::main): Initialize input buffer context
	tunables.

2025-02-02  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/117411
	* doc/gm2.texi (Exception handling): New section.
	(The ISO system module): Add description of COFF_T.
	(Assembler language): Tidy up last sentance.

2025-02-02  Lewis Hyatt  <lhyatt@gmail.com>

	PR middle-end/115913
	* optc-save-gen.awk (cl_optimization_compare): Skip options with
	CL_WARNING flag.

2025-02-01  H.J. Lu  <hjl.tools@gmail.com>

	PR target/118713
	* config/i386/i386-expand.cc (ix86_expand_call): Change "if
	(TARGET_X32 ...)" back to "else if (TARGET_X32 ...)".

2025-02-01  H.J. Lu  <hjl.tools@gmail.com>

	PR target/118713
	* config/i386/constraints.md (Bs): Always disable if
	TARGET_INDIRECT_BRANCH_REGISTER is true.
	(Bw): Likewise.
	* config/i386/i386-expand.cc (ix86_expand_call): Force indirect
	call via register for x32 GOT slot call if
	TARGET_INDIRECT_BRANCH_REGISTER is true.
	* config/i386/i386-protos.h (ix86_nopic_noplt_attribute_p): New.
	* config/i386/i386.cc (ix86_nopic_noplt_attribute_p): Make it
	global.
	* config/i386/i386.md (*call_got_x32): Disable indirect call via
	memory for TARGET_INDIRECT_BRANCH_REGISTER.
	(*call_value_got_x32): Likewise.
	(*sibcall_value_pop_memory): Likewise.
	* config/i386/predicates.md (constant_call_address_operand):
	Return false if both TARGET_INDIRECT_BRANCH_REGISTER and
	ix86_nopic_noplt_attribute_p are true.

2025-02-01  David Malcolm  <dmalcolm@redhat.com>

	* libsarifreplay.cc (sarif_replayer::handle_run_obj): Pass run to
	handle_result_obj.
	(sarif_replayer::handle_result_obj): Add run_obj param and pass it
	to handle_location_object and handle_thread_flow_object.
	(sarif_replayer::handle_thread_flow_object): Add run_obj param and
	pass it to handle_thread_flow_location_object.
	(sarif_replayer::handle_thread_flow_location_object): Add run_obj
	param and pass it to handle_location_object.
	(sarif_replayer::handle_location_object): Add run_obj param and
	pass it to handle_logical_location_object.
	(sarif_replayer::handle_logical_location_object): Add run_obj
	param.  If the run_obj is non-null and has "logicalLocations",
	then use these "cached" logical locations if we see an "index"
	property, as per §3.33.3

2025-02-01  Jeff Law  <jlaw@ventanamicro.com>

	PR tree-optimization/114277
	* match.pd (a * (a || b) -> a): New pattern.
	(a * !(a || b) -> 0): Likewise.

2025-01-31  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/117432
	* ipa-icf-gimple.cc (func_checker::compare_asm_inputs_outputs):
	Also return_false if operands have incompatible types.
	(func_checker::compare_gimple_call): Check fntype1 vs. fntype2
	compatibility for all non-internal calls and assume fntype1 and
	fntype2 are non-NULL for those.  For calls to non-prototyped
	calls or for stdarg_p functions after the last named argument (if any)
	check type compatibility of call arguments.

2025-01-31  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/116234
	* lra-constraints.cc (multiple_insn_refs_p): New function.
	(curr_insn_transform): Use it.

2025-01-31  Richard Biener  <rguenther@suse.de>

	PR debug/100530
	* dwarf2out.cc (modified_type_die): Do not claim we handle
	address-space qualification with dwarf_qual_info[].

2025-01-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118689
	PR modula2/115032
	* tree-ssa-loop-niter.cc (build_cltz_expr): Return NULL_TREE if fn is
	NULL and use_ifn is false.

2025-01-31  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_analyze_loop_operations): Only
	call vectorizable_lc_phi when not PURE_SLP.
	(vectorizable_reduction): Do not claim having handled
	the inner loop LC PHI for outer loop vectorization.

2025-01-30  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/builtins.def (STRLEN_FLASH, STRLEN_FLASHX)
	(STRLEN_MEMX): New DEF_BUILTIN's.
	* config/avr/avr.cc (avr_ftype_strlen): New static function.
	(avr_builtin_supported_p): New built-ins are not for AVR_TINY.
	(avr_init_builtins) <strlen_flash_node, strlen_flashx_node,
	strlen_memx_node>: Provide new fntypes.
	(avr_fold_builtin) [AVR_BUILTIN_STRLEN_FLASH]
	[AVR_BUILTIN_STRLEN_FLASHX, AVR_BUILTIN_STRLEN_MEMX]: Fold if
	possible.
	* doc/extend.texi (AVR Built-in Functions): Document
	__builtin_avr_strlen_flash, __builtin_avr_strlen_flashx,
	__builtin_avr_strlen_memx.

2025-01-30  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/builtins.def (AVR_FIRST_C_ONLY_BUILTIN_ID): New macro.
	* config/avr/avr-protos.h (avr_builtin_supported_p): New.
	* config/avr/avr.cc (avr_builtin_supported_p): New function.
	(avr_init_builtins): Only provide a built-in when it is supported.
	* config/avr/avr-c.cc (avr_cpu_cpp_builtins): Only define the
	__BUILTIN_AVR_<NAME> build-in defines when the associated built-in
	function is supported.
	* doc/extend.texi (AVR Built-in Functions): Add a note that
	following built-ins are supported for only for GNU-C.

2025-01-30  Jakub Jelinek  <jakub@redhat.com>
	    Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/118696
	* config/s390/vector.md (*vec_cmpgt<mode><mode>_nocc_emu,
	*vec_cmpgtu<mode><mode>_nocc_emu): Duplicate the first rather than
	second V2DImode element.

2025-01-30  Richard Biener  <rguenther@suse.de>

	PR middle-end/118695
	* expr.cc (expand_expr_real_1): When expanding a MEM_REF
	to a non-MEM by committing it to a stack temporary make
	sure to handle misaligned accesses correctly.

2025-01-30  Tobias Burnus  <tburnus@baylibre.com>

	* gimplify.cc (gimplify_call_expr): For OpenMP's append_args clause
	processed by 'omp dispatch', update for internal-representation
	changes; fix handling of hidden arguments, add some comments and
	handle Fortran's value dummy and optional/pointer/allocatable actual
	args.

2025-01-30  Richard Biener  <rguenther@suse.de>

	PR middle-end/118692
	* expr.cc (expand_expr_real_1): When expanding a MEM_REF
	as BIT_FIELD_REF avoid large offsets for accesses not
	overlapping the base object.

2025-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114052
	* tree-ssa-loop-niter.cc (maybe_lower_iteration_bound): Check
	for infinite subloops we might not exit.

2025-01-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/118320
	* pair-fusion.cc (pair_fusion_bb_info::fuse_pair): Commonize
	the merge of input_uses and return early if it fails.

2025-01-29  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/118010
	PR modula2/118183
	PR modula2/116073
	* doc/gm2.texi (-fm2-file-offset-bits=): Change the default size
	description to CSSIZE_T.
	Add COFF_T to the list of data types exported by SYSTEM.def.

2025-01-29  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/118429
	* pair-fusion.cc (latest_hazard_before): Add an extra parameter
	to say whether the instruction is a load or a store.  If the
	instruction is not a load or store and has memory side effects,
	prevent it from being moved earlier.
	(pair_fusion::find_trailing_add): Update call accordingly.
	(pair_fusion_bb_info::fuse_pair): If the trailng addition had
	a memory side-effect, use a tombstone to preserve it.

2025-01-29  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (*negsi2.libgcc): New insn.

2025-01-29  Yoshinori Sato  <ysato@users.sourceforge.jp>

	* config/rx/constraints.md (Q): Also check that the address
	passes rx_is_restricted_memory-address.

2025-01-29  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118505
	* gimple-ssa-split-paths.cc (poor_ifcvt_pred): Return
	true for trapping statements.

2025-01-29  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-ssa-split-paths.cc (poor_ifcvt_candidate_code): Remove CALL_EXPR handling.

2025-01-29  Martin Jambor  <mjambor@suse.cz>
	    Michal Jireš  <mjires@suse.cz>

	PR tree-optimization/117892
	* tree-ssa-dse.cc (dse_optimize_call): Leave control-altering
	noreturn calls alone.

2025-01-29  Pan Li  <pan2.li@intel.com>

	PR target/117688
	* config/riscv/riscv.cc (riscv_expand_sstrunc): Leverage the helper
	riscv_extend_to_xmode_reg with SIGN_EXTEND.

2025-01-29  Pan Li  <pan2.li@intel.com>

	PR target/117688
	* config/riscv/riscv.cc (riscv_expand_sssub): Leverage the helper
	riscv_extend_to_xmode_reg with SIGN_EXTEND.

2025-01-29  Pan Li  <pan2.li@intel.com>

	PR target/117688
	* config/riscv/riscv.cc (riscv_expand_ssadd): Leverage the helper
	riscv_extend_to_xmode_reg with SIGN_EXTEND.

2025-01-29  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_gen_zero_extend_rtx): Rename from ...
	(riscv_extend_to_xmode_reg): Rename to and add rtx_code for
	zero/sign extend if non-Xmode.
	(riscv_expand_usadd): Leverage the renamed function with ZERO_EXTEND.
	(riscv_expand_ussub): Ditto.

2025-01-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/118684
	* expr.cc (expand_expr_real_1): When creating a stack local
	during expansion of a handled component, when the base is
	a SSA_NAME use its type alignment and avoid calling
	get_object_alignment.

2025-01-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/118684
	* expr.cc (expand_expr_real_1): When expanding a reference
	based on a register and we end up needing a MEM make sure
	that's aligned as the original reference required.

2025-01-28  David Malcolm  <dmalcolm@redhat.com>

	* input.cc (file_cache_slot::dump): Show indices within
	m_line_record when dumping entries.

2025-01-28  David Malcolm  <dmalcolm@redhat.com>

	PR other/118675
	* diagnostic-format-sarif.cc: Define INCLUDE_STRING.
	(escape_braces): New.
	(set_string_property_escaping_braces): New.
	(sarif_builder::make_message_object): Escape braces in the "text"
	property.
	(sarif_builder::make_message_object_for_diagram): Likewise, and
	for the "markdown" property.
	(sarif_builder::make_multiformat_message_string): Likewise for the
	"text" property.
	(xelftest::test_message_with_braces): New.
	(selftest::diagnostic_format_sarif_cc_tests): Call it.

2025-01-28  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/117270
	* tree-vect-slp.cc (vectorizable_slp_permutation_1): Make nperms
	account for the number of times that each permutation will be used
	during transformation.

2025-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/112859
	* tree-loop-distribution.cc
	(loop_distribution::pg_add_dependence_edges): Add comment.

2025-01-28  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/118663
	* lra-constraints.cc (invalid_mode_reg_p): Check empty
	reg_class_contents.

2025-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/117424
	* tree-eh.cc (tree_could_trap_p): Verify the base is
	fully contained within a decl.

2025-01-28  Thomas Schwinge  <tschwinge@baylibre.com>

	* tree-pretty-print.cc (dump_omp_clause): Clarify
	'OMP_CLAUSE_MAP_RUNTIME_IMPLICIT_P'.

2025-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/118638
	* combine.cc (make_extraction): Only optimize (mult x 2^n) if len is
	larger than 1.

2025-01-28  Richard Sandiford  <richard.sandiford@arm.com>

	* tree-vect-slp.cc (vectorizable_slp_permutation_1): Remove
	extra newline from dump message.

2025-01-28  Jeff Law  <jlaw@ventanamicro.com>

	PR target/114085
	* config/h8300/constraints.md (U): No longer accept REGs.
	* config/h8300/logical.md (andqi3_2): Use "rU" rather than "U".
	(andqi3_2_clobber_flags, andqi3_1, <code>qi3_1): Likewise.
	* config/h8300/testcompare.md (tst_extzv_1_n): Likewise.

2025-01-27  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/117173
	* config/riscv/riscv-v.cc (shuffle_generic_patterns): Only
	support single-source permutes by default.
	* config/riscv/riscv.opt: New param "riscv-two-source-permutes".

2025-01-27  John David Anglin  <danglin@gcc.gnu.org>

	PR c++/116524
	* configure.ac: Check for munmap and msync.
	* configure: Regenerate.
	* config.in: Regenerate.

2025-01-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118653
	* tree-vect-loop.cc (vectorizable_live_operation): Also allow
	out-of-loop debug uses.

2025-01-27  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/118662
	* combine.cc (try_combine): When re-materializing a load
	from an extended reg by a lowpart subreg make sure we're
	not dealing with vector or complex modes.

2025-01-27  Richard Biener  <rguenther@suse.de>

	PR middle-end/118643
	* expr.cc (expand_expr_real_1): Avoid falling back to BIT_FIELD_REF
	expansion for negative offset.

2025-01-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/112859
	PR tree-optimization/115347
	* tree-loop-distribution.cc
	(loop_distribution::pg_add_dependence_edges): For a zero
	distance vector still make sure to not have an inner
	loop with zero distance.

2025-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118637
	* match.pd: Canonicalize unsigned division by power of two to
	right shift.

2025-01-27  Soumya AR  <soumyaa@nvidia.com>

	PR target/118490
	* match.pd: Added ! to verify that log/exp (CST) can be constant folded.

2025-01-26  Ilya Leoshkevich  <iii@linux.ibm.com>

	* asan.cc (asan_emit_stack_protection): Always zero the flag
	unless it is cleared by the __asan_stack_free_N() libcall.

2025-01-26  Pan Li  <pan2.li@intel.com>

	PR target/118103
	* config/riscv/riscv.cc (riscv_conditional_register_usage): Add
	the FRM as the global_regs.

2025-01-25  Andi Kleen  <ak@gcc.gnu.org>

	PR preprocessor/118168
	* input.cc (file_cache_slot::m_error): New field.
	(file_cache_slot::create): Clear m_error.
	(file_cache_slot::file_cache_slot): Clear m_error.
	(file_cache_slot::read_data): Set m_error on error.
	(file_cache_slot::get_next_line): Use m_error instead of ferror.

2025-01-25  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116256
	* config/riscv/riscv.md (mvconst_internal): Reject single bit
	constants.
	* config/riscv/riscv.cc (riscv_gen_zero_extend_rtx): Improve
	handling constants.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V9_5A): Add CPA.
	* config/aarch64/aarch64-option-extensions.def (CPA): New.
	* doc/invoke.texi: Document +cpa.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* doc/invoke.texi: Add +wfxt and +xs to armv9.2-a

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V9_5A): New.
	* doc/invoke.texi: Document armv9.5-a option.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc: Assert that CRYPTO
	bit is not set.
	* config/aarch64/aarch64-feature-deps.h
	(info<FEAT>.explicit_on): Unset CRYPTO bit.
	(cpu_##CORE_IDENT): Ditto.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_rewrite_selected_cpu): Refactor and inline into...
	(aarch64_rewrite_mcpu): this.
	* config/aarch64/aarch64-protos.h
	(aarch64_rewrite_selected_cpu): Delete.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_get_arch_string_for_assembler): New.
	(aarch64_rewrite_march): New.
	(aarch64_rewrite_selected_cpu): Call new function.
	* config/aarch64/aarch64-elf.h (ASM_SPEC): Remove identity mapping.
	* config/aarch64/aarch64-protos.h
	(aarch64_get_arch_string_for_assembler): New.
	* config/aarch64/aarch64.cc
	(aarch64_declare_function_name): Call new function.
	(aarch64_start_file): Ditto.
	* config/aarch64/aarch64.h
	(EXTRA_SPEC_FUNCTIONS): Use new macro name.
	(MCPU_TO_MARCH_SPEC): Rename to...
	(MARCH_REWRITE_SPEC): ...this, and extend the spec rule.
	(aarch64_rewrite_march): New declaration.
	(MCPU_TO_MARCH_SPEC_FUNCTIONS): Rename to...
	(AARCH64_BASE_SPEC_FUNCTIONS): ...this, and add new function.
	(ASM_CPU_SPEC): Use new macro name.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_get_all_extension_candidates): Inline into...
	(aarch64_print_hint_for_extensions): ...this.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_get_all_extension_candidates): Move within file.
	(aarch64_print_hint_candidates): Move from aarch64.cc.
	(aarch64_print_hint_for_extensions): Ditto.
	(aarch64_print_hint_for_arch): Ditto.
	(aarch64_print_hint_for_core): Ditto.
	(enum aarch_parse_opt_result): Ditto.
	(aarch64_parse_arch): Ditto.
	(aarch64_parse_cpu): Ditto.
	(aarch64_parse_tune): Ditto.
	(aarch64_validate_march): Ditto.
	(aarch64_validate_mcpu): Ditto.
	(aarch64_validate_mtune): Ditto.
	* config/aarch64/aarch64-protos.h
	(aarch64_rewrite_selected_cpu): Move within file.
	(aarch64_print_hint_for_extensions): Share function prototype.
	(aarch64_print_hint_for_arch): Ditto.
	(aarch64_print_hint_for_core): Ditto.
	(enum aarch_parse_opt_result): Ditto.
	(aarch64_validate_march): Ditto.
	(aarch64_validate_mcpu): Ditto.
	(aarch64_validate_mtune): Ditto.
	(aarch64_get_all_extension_candidates): Unshare prototype.
	* config/aarch64/aarch64.cc
	(aarch64_parse_arch): Move to aarch64-common.cc.
	(aarch64_parse_cpu): Ditto.
	(aarch64_parse_tune): Ditto.
	(aarch64_print_hint_candidates): Ditto.
	(aarch64_print_hint_for_core): Ditto.
	(aarch64_print_hint_for_arch): Ditto.
	(aarch64_print_hint_for_extensions): Ditto.
	(aarch64_validate_mcpu): Ditto.
	(aarch64_validate_march): Ditto.
	(aarch64_validate_mtune): Ditto.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_print_hint_candidates): New helper function.
	(aarch64_print_hint_for_core_or_arch): Inline into callers.
	(aarch64_print_hint_for_core): Inline callee and use new helper.
	(aarch64_print_hint_for_arch): Ditto.
	(aarch64_print_hint_for_extensions): Use new helper.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_print_hint_for_extensions): Receive string as a char *.
	(aarch64_parse_arch): Don't return a const struct processor *.
	(aarch64_parse_cpu): Ditto.
	(aarch64_parse_tune): Ditto.
	(aarch64_validate_mtune): Ditto.
	(aarch64_validate_mcpu): Ditto, and use temporary variables for
	march/mcpu cross-check.
	(aarch64_validate_march): Ditto.
	(aarch64_override_options): Adjust for changed parameter types.
	(aarch64_handle_attr_arch): Ditto.
	(aarch64_handle_attr_cpu): Ditto.
	(aarch64_handle_attr_tune): Ditto.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(struct aarch64_option_extension): Rename to..
	(struct aarch64_extension_info): ...this.
	(all_extensions): Update type name.
	(struct arch_to_arch_name): Rename to...
	(struct aarch64_arch_info): ...this, and rename name field.
	(all_architectures): Update type names, and move before...
	(struct processor_name_to_arch): ...this. Rename to...
	(struct aarch64_processor_info): ...this, rename name field and
	add cpu field.
	(all_cores): Update type name, and set new field.
	(aarch64_parse_extension): Update names.
	(aarch64_get_all_extension_candidates): Ditto.
	(aarch64_rewrite_selected_cpu): Ditto.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(all_cores): Remove explicit generic entry.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-opts.h
	(enum aarch64_processor): Rename to...
	(enum aarch64_cpu): ...this, and rename the entries.
	* config/aarch64/aarch64.cc
	(aarch64_type): Rename type and initial value.
	(struct processor): Rename member types.
	(all_architectures): Rename enum members.
	(all_cores): Ditto.
	(aarch64_get_tune_cpu): Rename type and enum member.
	* config/aarch64/aarch64.h (enum target_cpus): Remove.
	(TARGET_CPU_DEFAULT): Rename default value.
	(aarch64_tune): Rename type.
	* config/aarch64/aarch64.opt:
	(selected_tune): Rename type and default value.

2025-01-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc (aarch64_override_options): Compare
	returned feature masks directly.

2025-01-24  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/118497
	* ira-int.h (target_ira_int): Add x_ira_hard_regno_nrefs.
	(ira_hard_regno_nrefs): New macro.
	* ira.cc (setup_hard_regno_aclass): Remove unused code.  Modify
	the comment.
	(setup_hard_regno_nrefs): New function.
	(ira): Call it.
	* ira-color.cc (calculate_saved_nregs): Check
	ira_hard_regno_nrefs.

2025-01-24  yxj-github-437  <2457369732@qq.com>

	* config/aarch64/aarch64.cc (aarch64_build_builtin_va_list): Mark
	__builtin_va_list as TREE_PUBLIC.
	* config/arm/arm.cc (arm_build_builtin_va_list): Likewise.

2025-01-24  David Malcolm  <dmalcolm@redhat.com>

	PR sarif-replay/117670
	* Makefile.in (SARIF_REPLAY_INSTALL_NAME): New.
	(install-libgdiagnostics): Use it,and exeext, rather than just
	sarif-replay.

2025-01-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116010
	* tree-data-ref.cc (contains_ssa_ref_p_1): New function.
	(contains_ssa_ref_p): Likewise.
	(dr_may_alias_p): Avoid treating unanalyzed base parts without
	SSA reference conservatively.

2025-01-24  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.h (S390_TDC_POSITIVE_ZERO): Remove.
	(S390_TDC_NEGATIVE_ZERO): Remove.
	(S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER): Remove.
	(S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER): Remove.
	(S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER): Remove.
	(S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER): Remove.
	(S390_TDC_POSITIVE_INFINITY): Remove.
	(S390_TDC_NEGATIVE_INFINITY): Remove.
	(S390_TDC_POSITIVE_QUIET_NAN): Remove.
	(S390_TDC_NEGATIVE_QUIET_NAN): Remove.
	(S390_TDC_POSITIVE_SIGNALING_NAN): Remove.
	(S390_TDC_NEGATIVE_SIGNALING_NAN): Remove.
	(S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER): Remove.
	(S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER): Remove.
	(S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER): Remove.
	(S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER): Remove.
	(S390_TDC_SIGNBIT_SET): Remove.
	(S390_TDC_INFINITY): Remove.
	* config/s390/s390.md (signbit<mode>2<tf_fpr>): Merge this one
	(isinf<mode>2<tf_fpr>): and this one into
	(<TDC_CLASS:tdc_insn><mode>2<tf_fpr>): new expander.
	(isnormal<mode>2<tf_fpr>): New BFP expander.
	(isnormal<mode>2): New DFP expander.
	* config/s390/vector.md (signbittf2_vr): Merge this one
	(isinftf2_vr): and this one into
	(<tdc_insn>tf2_vr): new expander.
	(signbittf2): Merge this one
	(isinftf2): and this one into
	(<tdc_insn>tf2): new expander.

2025-01-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118634
	* tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely):
	Dump the number of estimated eliminated insns.

2025-01-24  Saurabh Jha  <saurabh.jha@arm.com>

	* config/aarch64/aarch64-sve2.md:
	(*aarch64_pred_faminmax_fused): Fix to use the correct flags.
	* config/aarch64/aarch64.h
	(TARGET_SVE_FAMINMAX): Remove.
	* config/aarch64/iterators.md: Fix iterators so that famax and
	famin use correct flags.

2025-01-24  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118572
	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Compare as
	unsigned the variables whose extension bits are masked out.

2025-01-24  Alexandre Oliva  <oliva@adacore.com>

	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Document
	reversep's absence of effects on range tests.  Don't reject
	reversep mismatches before trying compare swapping.

2025-01-24  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118514
	* tree-eh.cc (bit_field_ref_in_bounds_p): New.
	(tree_could_trap_p) <BIT_FIELD_REF>: Call it.
	* gimple-fold.cc (make_bit_field_load): Check trapping status
	of replacement load against original load.

2025-01-23  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa32-regs.h (ADDITIONAL_REGISTER_NAMES): Change
	register 86 name to "%fr31L".

2025-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118628
	* tree-vect-stmts.cc (vectorizable_store, vectorizable_load):
	Initialize offvar to NULL_TREE.

2025-01-23  Georg-Johann Lay  <avr@gjlay.de>

	PR tree-optimization/118012
	PR tree-optimization/118360
	* config/avr/avr.opt (-mpr118012): New undocumented option.
	* config/avr/avr-protos.h (avr_out_sextr)
	(avr_emit_skip_pixop, avr_emit_skip_clear): New protos.
	* config/avr/avr.cc (avr_adjust_insn_length)
	[case ADJUST_LEN_SEXTR]: Handle case.
	(avr_rtx_costs_1) [NEG]: Costs for NEG (ZERO_EXTEND (ZERO_EXTRACT)).
	[MULT && avropt_pr118012]: Costs for MULT (x AND 1).
	(avr_out_sextr, avr_emit_skip_pixop, avr_emit_skip_clear): New
	functions.
	* config/avr/avr.md [avropt_pr118012]: Add combine patterns with
	that condition that try to work around PR118012.
	(adjust_len) <sextr>: Add insn attr value.
	(pixop): New code iterator.
	(mulsi3) [avropt_pr118012 && !AVR_TINY]: Allow these in insn condition.

2025-01-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/118562
	* rtl-ssa/blocks.cc (function_info::replace_phi): When converting
	to a degenerate phi, make sure to remove all uses of the previous
	inputs.

2025-01-23  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-tuning-flags.def
	(AARCH64_EXTRA_TUNE_CHEAP_FPMR_WRITE): New tuning flag.
	* config/aarch64/aarch64.h (TARGET_CHEAP_FPMR_WRITE): New macro.
	* config/aarch64/aarch64.md: Split moves into FPMR into a test
	and branch around.
	(aarch64_write_fpmr): New pattern.

2025-01-23  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_memory_move_cost): Account
	for the cost of moving in and out of GENERAL_SYSREGS.

2025-01-23  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.md (*mov<SHORT:mode>_aarch64)
	(*movsi_aarch64, *movdi_aarch64): Allow the source of an MSR
	to be zero.

2025-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118605
	* tree-assume.cc (assume_query::m_parm_list): Change type
	from bitmap & to bitmap.

2025-01-23  Tejas Belagod  <tejas.belagod@arm.com>

	* omp-low.cc (use_pointer_for_field): Use pointer if the OMP data
	structure's field type is a poly-int.

2025-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114877
	* builtins.cc (fold_builtin_frexp): Handle rvc_nan and rvc_inf cases
	like rvc_zero, return passed in arg and set *exp = 0.

2025-01-23  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	'alarm'.

2025-01-23  Georg-Johann Lay  <avr@gjlay.de>

	PR target/117726
	* config/avr/avr.cc (avr_ld_regno_p): New function.
	(ashlsi3_out) [case 25,26,27,28,29,30]: Handle and tweak.
	(lshrsi3_out): Same.
	(avr_rtx_costs_1) [SImode, ASHIFT, LSHIFTRT]: Adjust costs.
	* config/avr/avr.md (ashlsi3, *ashlsi3, *ashlsi3_const):
	Add "r,r,C4L" alternative.
	(lshrsi3, *lshrsi3, *lshrsi3_const): Add "r,r,C4R" alternative.
	* config/avr/constraints.md (C4R, C4L): New,

2025-01-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118558
	* tree-vectorizer.h (vect_known_alignment_in_bytes): Pass
	through offset to dr_misalignment.
	* tree-vect-stmts.cc (get_group_load_store_type): Compute
	offset applied for negative stride and use it when querying
	alignment of accesses.
	(vectorizable_load): Likewise.

2025-01-23  Nathaniel Shead  <nathanieloshead@gmail.com>

	PR c++/107741
	* common.opt: Add -fabi-version=20.
	* doc/invoke.texi: Likewise.

2025-01-23  Xi Ruoyao  <xry111@xry111.site>

	PR target/118501
	* config/loongarch/loongarch.md (@xorsign<mode>3): Use
	force_lowpart_subreg.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx10_2-512convertintrin.h:
	Omit "p" for packed for FP8.
	* config/i386/avx10_2convertintrin.h: Ditto.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512satcvtintrin.h: Change intrin and
	builtin name according to new mnemonics.
	* config/i386/avx10_2satcvtintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VCVTBF162IBS): Rename from UNSPEC_VCVTNEBF162IBS.
	(UNSPEC_VCVTBF162IUBS): Rename from UNSPEC_VCVTNEBF162IUBS.
	(UNSPEC_VCVTTBF162IBS): Rename from UNSPEC_VCVTTNEBF162IBS.
	(UNSPEC_VCVTTBF162IUBS): Rename from UNSPEC_VCVTTNEBF162IUBS.
	(UNSPEC_CVTNE_BF16_IBS_ITER): Rename to...
	(UNSPEC_CVT_BF16_IBS_ITER): ...this. Adjust UNSPEC name.
	(sat_cvt_sign_prefix): Adjust UNSPEC name.
	(sat_cvt_trunc_prefix): Ditto.
	(avx10_2_cvt<sat_cvt_trunc_prefix>nebf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
	Rename to...
	(avx10_2_cvt<sat_cvt_trunc_prefix>bf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
	...this. Change instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512convertintrin.h: Change intrin and
	builtin name according to new mnemonics.
	* config/i386/avx10_2convertintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VCVTPH2BF8): Rename from UNSPEC_VCVTNEPH2BF8.
	(UNSPEC_VCVTPH2BF8S): Rename from UNSPEC_VCVTNEPH2BF8S.
	(UNSPEC_VCVTPH2HF8): Rename from UNSPEC_VCVTNEPH2HF8.
	(UNSPEC_VCVTPH2HF8S): Rename from UNSPEC_VCVTNEPH2HF8S.
	(UNSPEC_CONVERTPH2FP8): Rename from UNSPEC_NECONVERTPH2FP8.
	Adjust UNSPEC name.
	(convertph2fp8): Rename from neconvertph2fp8. Adjust
	iterator map.
	(vcvt<neconvertph2fp8>v8hf): Rename to...
	(vcvt<neconvertph2fp8>v8hf): ...this.
	(*vcvt<neconvertph2fp8>v8hf): Rename to...
	(*vcvt<neconvertph2fp8>v8hf): ...this.
	(vcvt<neconvertph2fp8>v8hf_mask): Rename to...
	(vcvt<neconvertph2fp8>v8hf_mask): ...this.
	(*vcvt<neconvertph2fp8>v8hf_mask): Rename to...
	(*vcvt<neconvertph2fp8>v8hf_mask): ...this.
	(vcvt<neconvertph2fp8><mode><mask_name>): Rename to...
	(vcvt<convertph2fp8><mode><mask_name>): ...this.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512convertintrin.h: Change intrin and
	builtin name according to new mnemonics.
	* config/i386/avx10_2convertintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VCVT2PH2BF8): Rename from UNSPEC_VCVTNE2PH2BF8.
	(UNSPEC_VCVT2PH2BF8S): Rename from UNSPEC_VCVTNE2PH2BF8S.
	(UNSPEC_VCVT2PH2HF8): Rename from UNSPEC_VCVTNE2PH2HF8.
	(UNSPEC_VCVT2PH2HF8S): Rename from UNSPEC_VCVTNE2PH2HF8S.
	(UNSPEC_CONVERTFP8_PACK): Rename from UNSPEC_NECONVERTFP8_PACK.
	Adjust UNSPEC name.
	(convertfp8_pack): Rename from neconvertfp8_pack. Adjust
	iterator map.
	(vcvt<neconvertfp8_pack><mode><mask_name>): Rename to...
	(vcvt<convertfp8_pack><mode><mask_name>): ...this.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/i386-expand.cc
	(ix86_expand_fp_compare): Adjust comments.
	(ix86_expand_builtin): Adjust switch case.
	* config/i386/i386.md (cmpibf): Change instruction name output.
	* config/i386/sse.md (UNSPEC_VCOMSBF16): Removed.
	(avx10_2_comisbf16_v8bf): New.
	(avx10_2_comsbf16_v8bf): Removed.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VFPCLASSBF16); Rename from UNSPEC_VFPCLASSPBF16.
	(avx10_2_getexppbf16_<mode><mask_name>): Rename to...
	(avx10_2_getexpbf16_<mode><mask_name>): ...this.
	Change instruction name output.
	(avx10_2_fpclasspbf16_<mode><mask_scalar_merge_name>):
	Rename to...
	(avx10_2_fpclassbf16_<mode><mask_scalar_merge_name>): ...this.
	Change instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VSCALEFBF16): Rename from UNSPEC_VSCALEFPBF16.
	(avx10_2_scalefpbf16_<mode><mask_name>): Rename to...
	(avx10_2_scalefbf16_<mode><mask_name>): ...this.
	Change instruction name output.
	(avx10_2_rsqrtpbf16_<mode><mask_name>): Rename to...
	(avx10_2_rsqrtbf16_<mode><mask_name>): ...this.
	Change instruction name output.
	(avx10_2_sqrtnepbf16_<mode><mask_name>): Rename to...
	(avx10_2_sqrtbf16_<mode><mask_name>): ...this.
	Change instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VRNDSCALEBF16): Rename from UNSPEC_VRNDSCALENEPBF16.
	(UNSPEC_VREDUCEBF16): Rename from UNSPEC_VREDUCENEPBF16.
	(UNSPEC_VGETMANTBF16): Rename from UNSPEC_VGETMANTPBF16.
	(BF16IMMOP): Adjust iterator due to UNSPEC name change.
	(bf16immop): Ditto.
	(avx10_2_<bf16immop>pbf16_<mode><mask_name>): Rename to...
	(avx10_2_<bf16immop>bf16_<mode><mask_name>): ...this. Change
	instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512minmaxintrin.h: Change intrin and
	builtin name according to new mnemonics.
	* config/i386/avx10_2minmaxintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_MINMAXBF16): Rename from UNSPEC_MINMAXNEPBF16.
	(avx10_2_minmaxnepbf16_<mode><mask_name>): Rename to...
	(avx10_2_minmaxbf16_<mode><mask_name>): ...this. Change
	instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(avx10_2_<code>pbf16_<mode><mask_name>): Rename to...
	(avx10_2_<code>bf16_<mode><mask_name>): ...this.
	Change instruction name output.
	(avx10_2_cmppbf16_<mode><mask_scalar_merge_name>): Rename to...
	(avx10_2_cmpbf16_<mode><mask_scalar_merge_name>): ...this.
	Change instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	names according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(avx10_2_fmaddnepbf16_<mode>_maskz): Rename to...
	(avx10_2_fmaddbf16_<mode>_maskz): ...this. Adjust emit_insn.
	(avx10_2_fmaddnepbf16_<mode><sd_maskz_name>): Rename to...
	(avx10_2_fmaddbf16_<mode><sd_maskz_name>): ...this.
	Change instruction name output.
	(avx10_2_fmaddnepbf16_<mode>_mask): Rename to...
	(avx10_2_fmaddbf16_<mode>_mask): ...this.
	Change instruction name output.
	(avx10_2_fmaddnepbf16_<mode>_mask3): Rename to...
	(avx10_2_fmaddbf16_<mode>_mask3): ...this.
	Change instruction name output.
	(avx10_2_fnmaddnepbf16_<mode>_maskz): Rename to...
	(avx10_2_fnmaddbf16_<mode>_maskz): ...this. Adjust emit_insn.
	(avx10_2_fnmaddnepbf16_<mode><sd_maskz_name>): Rename to...
	(avx10_2_fnmaddbf16_<mode><sd_maskz_name>): ...this.
	Change instruction name output.
	(avx10_2_fnmaddnepbf16_<mode>_mask): Rename to...
	(avx10_2_fnmaddbf16_<mode>_mask): ...this.
	Change instruction name output.
	(avx10_2_fnmaddnepbf16_<mode>_mask3): Rename to...
	(avx10_2_fnmaddbf16_<mode>_mask3): ...this.
	Change instruction name output.
	(avx10_2_fmsubnepbf16_<mode>_maskz): Rename to...
	(avx10_2_fmsubbf16_<mode>_maskz): ...this. Adjust emit_insn.
	(avx10_2_fmsubnepbf16_<mode><sd_maskz_name>): Rename to...
	(avx10_2_fmsubbf16_<mode><sd_maskz_name>): ...this.
	Change instruction name output.
	(avx10_2_fmsubnepbf16_<mode>_mask): Rename to...
	(avx10_2_fmsubbf16_<mode>_mask): ...this.
	Change instruction name output.
	(avx10_2_fmsubnepbf16_<mode>_mask3): Rename to...
	(avx10_2_fmsubbf16_<mode>_mask3): ...this.
	Change instruction name output.
	(avx10_2_fnmsubnepbf16_<mode>_maskz): Rename to...
	(avx10_2_fnmsubbf16_<mode>_maskz): ...this. Adjust emit_insn.
	(avx10_2_fnmsubnepbf16_<mode><sd_maskz_name>): Rename to...
	(avx10_2_fnmsubbf16_<mode><sd_maskz_name>): ...this.
	Change instruction name output.
	(avx10_2_fnmsubnepbf16_<mode>_mask): Rename to...
	(avx10_2_fnmsubbf16_<mode>_mask): ...this.
	Change instruction name output.
	(avx10_2_fnmsubnepbf16_<mode>_mask3): Rename to...
	(avx10_2_fnmsubbf16_<mode>_mask3): ...this.
	Change instruction name output.

2025-01-23  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md (div<mode>3): Adjust emit_insn.
	(avx10_2_<insn>nepbf16_<mode><mask_name>): Rename to...
	(avx10_2_<insn>bf16_<mode><mask_name>): ...this. Change
	instruction name output.
	(avx10_2_rcppbf16_<mode><mask_name>): Rename to...
	(avx10_2_rcpbf16_<mode><mask_name>):...this. Change
	instruction name output.

2025-01-22  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc: Fix arch15 machine string which must not
	be empty.

2025-01-22  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.md (aarch64_read_sysregti): Change
	the source predicate to aarch64_reg_or_zero.

2025-01-22  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md
	(<optab>_alsl_reversesi_extended): Add '&' to the destination
	register constraint and append '0' to the first source register
	constraint to indicate the destination register cannot be same
	as the second source register, and change the split condition to
	reload_completed so that the insn will be split only after RA in
	order to obtain allocated registers that satisfy the above
	constraints.

2025-01-21  Jeff Law  <jlaw@ventanamicro.com>

	Revert:
	2024-10-29  yulong  <shiyulong@iscas.ac.cn>

	* config.gcc: Add riscv_cmo.h.
	* config/riscv/riscv_cmo.h: New file.

2025-01-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118483
	* match.pd (`x ==/!= ~x`): Allow for an optional convert
	and use itwise_inverted_equal_p/maybe_bit_not instead of
	directly matching bit_not.

2025-01-21  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_file_end): Fix format string.
	(riscv_lshift_subword): Mark MODE as unused.

2025-01-21  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-passes.cc (avr_emit_shift) [ASHIFT,HImode]:
	Allow offsets 5 and 6 as 3op provided have MUL and a scratch.
	* config/avr/avr.cc (avr_optimize_size_max_p): New function.
	(avr_out_ashlhi3_mul): New function.
	(ashlhi3_out) [case 4, 5, 6]: Better speed for -Os.
	* config/avr/avr.md (isa) <mul, no_mul>: New attr values.
	(*ashlhi3_const): Add alternative for offsets 5 and 6.

2025-01-21  Jin Ma  <jinma@linux.alibaba.com>

	PR target/116593
	* config/riscv/constraints.md (vl): New.
	* config/riscv/thead-vector.md: Replacing rK with rvl.
	* config/riscv/vector.md: Likewise.

2025-01-21  Denis Chertykov  <chertykov@gmail.com>

	* lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Use known_ge
	to compare sizes.

2025-01-21  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116256
	* config/riscv/predicates.md (consecutive_bits_operand): Properly
	handle (const_int 0).

2025-01-21  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64.opt.urls: Regenerate

2025-01-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118569
	* cfgloopmanip.cc (fix_loop_placement): When the loops
	nesting parents changed, mark all blocks to be scanned
	for LC PHI uses.
	(fix_bb_placements): Remove code moved into fix_loop_placement.

2025-01-21  Vladimir Miloserdov  <vladimir.miloserdov@arm.com>

	* config/aarch64/aarch64-c.cc
	(aarch64_update_cpp_builtins): Add new flag TARGET_LUT.
	* config/aarch64/aarch64-sve-builtins-shapes.cc
	(struct luti_base): Shape for lut intrinsics.
	(SHAPE): Specializations for lut shapes for luti2 and luti4..
	* config/aarch64/aarch64-sve-builtins-shapes.h: Declare lut
	intrinsics.
	* config/aarch64/aarch64-sve-builtins-sve2.cc
	(class svluti_lane_impl): Define expand for lut intrinsics.
	(FUNCTION): Define expand for lut intrinsics.
	* config/aarch64/aarch64-sve-builtins-sve2.def
	(REQUIRED_EXTENSIONS): Declare lut intrinsics behind lut flag.
	(svluti2_lane): Define intrinsic behind flag.
	(svluti4_lane): Define intrinsic behind flag.
	* config/aarch64/aarch64-sve-builtins-sve2.h: Declare lut
	intrinsics.
	* config/aarch64/aarch64-sve-builtins.cc
	(TYPES_bh_data): New type for byte and halfword.
	(bh_data): Type array for byte and halfword.
	(h_data): Type array for halfword.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_sve_luti<LUTI_BITS><mode>): Instruction patterns for
	lut intrinsics.
	* config/aarch64/iterators.md: Iterators and attributes for lut
	intrinsics.

2025-01-21  Tamar Christina  <tamar.christina@arm.com>

	PR middle-end/118273
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Use nvectors when
	doing mask registrations.

2025-01-21  Tamar Christina  <tamar.christina@arm.com>

	* config.gcc (aarch64-*-elf): Drop ILP32 from default multilibs.

2025-01-21  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-protos.h
	(loongarch_reset_previous_fndecl):  Add function declaration.
	(loongarch_save_restore_target_globals): Likewise.
	(loongarch_register_pragmas): Likewise.
	* config/loongarch/loongarch-target-attr.cc
	(loongarch_option_valid_attribute_p): Optimize the processing
	of attributes.
	(loongarch_pragma_target_parse): New functions.
	(loongarch_register_pragmas): Likewise.
	* config/loongarch/loongarch.cc
	(loongarch_reset_previous_fndecl): New functions.
	(loongarch_set_current_function): When the old_tree is the same
	as the new_tree, the rules for using registers, etc.,
	are set according to the option values to ensure that the
	pragma can be processed correctly.
	* config/loongarch/loongarch.h (REGISTER_TARGET_PRAGMAS):
	Define macro.
	* doc/extend.texi: Supplemental Documentation.

2025-01-21  Lulu Cheng  <chenglulu@loongson.cn>

	* attr-urls.def: Regenerate.
	* config.gcc: Add loongarch-target-attr.o to extra_objs.
	* config/loongarch/loongarch-protos.h
	(loongarch_option_valid_attribute_p): Function declaration.
	(loongarch_option_override_internal): Likewise.
	* config/loongarch/loongarch.cc
	(loongarch_option_override_internal): Delete the modifications
	to target_option_default_node and target_option_current_node.
	(loongarch_set_current_function): Add annotation information.
	(loongarch_option_override): add assignment operations to
	target_option_default_node and target_option_current_node.
	(TARGET_OPTION_VALID_ATTRIBUTE_P): Define.
	* config/loongarch/t-loongarch: Add compilation of target file
	loongarch-target-attr.o.
	* doc/extend.texi: Add description information of LoongArch
	Function Attributes.
	* config/loongarch/loongarch-target-attr.cc: New file.

2025-01-21  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_process_target_version_attr): Add experimental warning.
	* config/aarch64/aarch64.opt: Add command line option to disable
	warning.
	* doc/invoke.texi: Add documentation for -W[no-]experimental-fmv-target.

2025-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/118560
	* lra-constraints.cc (invalid_mode_reg_p): Exchange args in
	hard_reg_set_subset_p call.

2025-01-20  Jeff Law  <jlaw@ventanamicro.com>

	PR target/114442
	* config/riscv/xiangshan.md: Add missing insn types to a
	new dummy insn reservation.

2025-01-20  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116256
	* config/riscv/riscv.md (reassocating constant addition): Adjust
	condition to avoid creating an unrecognizable insn.

2025-01-20  Denis Chertykov  <chertykov@gmail.com>

	PR rtl-optimization/117868
	* lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Reuse slots
	only without allocated memory or only with equal or smaller registers
	with equal or smaller alignment.
	(lra_spill): Print slot size as width.

2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/118348
	* tree-vectorizer.cc (vec_info::move_dr): Copy
	STMT_VINFO_SIMD_LANE_ACCESS_P.

2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	Revert:
	2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/118384
	* tree-vectorizer.cc (vec_info::move_dr): Copy
	STMT_VINFO_SIMD_LANE_ACCESS_P.

2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/118384
	* tree-vectorizer.cc (vec_info::move_dr): Copy
	STMT_VINFO_SIMD_LANE_ACCESS_P.

2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/118501
	* config/aarch64/aarch64.md (@xorsign<mode>3): Use
	force_lowpart_subreg.

2025-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/118531
	* config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
	(*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>)
	(*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Add missing
	simd requirements.

2025-01-20  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>):
	Change GPR2 to X.
	(*th_cond_mov<GPR:mode>): Likewise.

2025-01-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118077
	PR tree-optimization/117668
	* tree-inline.cc (fold_marked_statements): Purge abnormal edges
	as needed.

2025-01-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/117875
	* tree-vect-slp.cc (vect_build_slp_tree_1): Handle SSA copies.

2025-01-20  Xi Ruoyao  <xry111@xry111.site>

	PR target/115921
	* config/loongarch/loongarch-protos.h
	(loongarch_reassoc_shift_bitwise): New function prototype.
	* config/loongarch/loongarch.cc
	(loongarch_reassoc_shift_bitwise): Implement.
	* config/loongarch/loongarch.md
	(*alslsi3_extend_subreg): New define_insn_and_split.
	(<any_bitwise:optab>_shift_reverse<X:mode>): New
	define_insn_and_split.
	(<any_bitwise:optab>_alsl_reversesi_extended): New
	define_insn_and_split.
	(zero_extend_ashift): Remove as it's just a special case of
	and_shift_reversedi, and it does not make too much sense to
	write "alsl.d rd,rs,r0,shamt" instead of "slli.d rd,rs,shamt".
	(bstrpick_alsl_paired): Remove as it is already done by
	splitting and_shift_reversedi into and + ashift first, then
	late combining the ashift and a further add.

2025-01-20  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/constraints.md (Yy): New define_constriant.
	* config/loongarch/loongarch.cc (loongarch_print_operand):
	For "%M", output the index of bits to be used with
	bstrins/bstrpick.
	* config/loongarch/predicates.md (ins_zero_bitmask_operand):
	Exclude low_bitmask_operand as for low_bitmask_operand it's
	always better to use bstrpick instead of bstrins.
	(and_operand): New define_predicate.
	* config/loongarch/loongarch.md (any_or): New
	define_code_iterator.
	(bitwise_operand): New define_code_attr.
	(*<optab:any_or><mode:GPR>3): New define_insn.
	(*and<mode:GPR>3): New define_insn.
	(<optab:any_bitwise><mode:X>3): New define_expand.
	(and<mode>3_extended): Remove, replaced by the 3rd alternative
	of *and<mode:GPR>3.
	(bstrins_<mode>_for_mask): Remove, replaced by the 4th
	alternative of *and<mode:GPR>3.
	(*<optab:any_bitwise>si3_internal): Remove, already covered by
	the *<optab:any_or><mode:GPR>3 and *and<mode:GPR>3 templates.

2025-01-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118552
	* cfgloopmanip.cc (fix_loop_placement): Properly mark
	exit source blocks as to be scanned for LC SSA update when
	the loops nesting relationship changed.
	(fix_loop_placements): Adjust.
	(fix_bb_placements): Likewise.

2025-01-20  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/t-nvptx (MULTILIB_OPTIONS): Don't add 'mptx=3.1' if
	neither sm_30 nor sm_35 multilib variant is built.

2025-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR c++/118509
	* tree.cc (tree_invariant_p_1): Return true for TARGET_EXPR too.

2025-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118224
	* tree-ssa-dce.cc (is_removable_allocation_p): Multiply a1 by a2
	instead of adding it.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_load_len): Deprecate
	some overloads.
	(s390_vec_store_len): Deprecate some overloads.
	(s390_vec_load_len_r): Add.
	(s390_vec_store_len_r): Add.
	* config/s390/s390-c.cc (s390_vec_load_len_r): Add.
	(s390_vec_store_len_r): Add.
	* config/s390/vecintrin.h (vec_load_len_r): Redefine.
	(vec_store_len_r): Redefine.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def: Add 128-bit variants.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/vector.md (<vec_shifts_name><mode>3): Add 128-bit
	variants.
	* config/s390/vx-builtins.md: Ditto.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def: Add 128-bit variants and remove
	bool variants.
	* config/s390/s390-builtin-types.def: Update accordinly.
	* config/s390/s390.md: Emulate min/max for GPR.
	* config/s390/vector.md: Add min/max patterns and emulate in
	case of no VXE3.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_abs_s128): Add.
	(s390_vlpq): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/vector.md (abs<mode>2): Emulate w/o VXE3.
	(*abs<mode>2): Add 128-bit variant.
	(*vec_sel0<mode>): Make it a ...
	(vec_sel0<mode>): named pattern.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def: Add 128-bit variants.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.cc (s390_expand_vec_compare_cc): Also
	consider TI modes for vectors.
	* config/s390/vector.md: Enable *vec_cmp et al. for VXE3.
	* config/s390/vx-builtins.md: Ditto.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md (div<mode>3): Add.
	(udiv<mode>3): Add.
	(mod<mode>3): Add.
	(umod<mode>3): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_cntlz): Add 128-bit
	integer overloads.
	(s390_vclzq): Add.
	(s390_vec_cnttz): Add 128-bit integer overloads.
	(s390_vctzq): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.h (CTZ_DEFINED_VALUE_AT_ZERO): Define.
	* config/s390/s390.md (*clzg): New insn.
	(clztidi2): Exploit new insn for target arch15.
	(ctzdi2): New insn.
	* config/s390/vector.md (clz<mode>2): Extend modes including
	128-bit integer.
	(ctz<mode>2): Likewise.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_gen_element_masks_128): Add.
	(s390_vgemb): Add.
	(s390_vgemh): Add.
	(s390_vgemf): Add.
	(s390_vgemg): Add.
	(s390_vgemq): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.md (UNSPEC_VEC_VGEM): Add.
	* config/s390/vecintrin.h (vec_gen_element_masks_8): Define.
	(vec_gen_element_masks_16): Define.
	(vec_gen_element_masks_32): Define.
	(vec_gen_element_masks_64): Define.
	(vec_gen_element_masks_128): Define.
	* config/s390/vx-builtins.md (vgemv16qi): Add.
	(vgem<mode>): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_evaluate): Add.
	(s390_veval): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.md (UNSPEC_VEC_VEVAL): Add.
	* config/s390/vecintrin.h (vec_evaluate): Define.
	* config/s390/vector.md
	(*veval<mode>_<logic_op1:logic_op_stringify><logic_op2:logic_op_stringify>):
	Add.
	(veval<mode>): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_vec_blend): Add.
	(s390_vblendb): Add.
	(s390_vblendh): Add.
	(s390_vblendf): Add.
	(s390_vblendg): Add.
	(s390_vblendq): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.md (UNSPEC_VEC_VBLEND): Add.
	* config/s390/vecintrin.h (vec_blend): Define.
	* config/s390/vx-builtins.md (vblend<mode>): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def (s390_bdepg): Add.
	(s390_bextg): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.md (UNSPEC_BDEPG): Add.
	(UNSPEC_BEXTG): Add.
	(bdepg): Add.
	(bextg): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.md (*lxa<LXAMODE>_index): Add.
	(*lxa<LXAMODE>_displacement_index): Add.
	(*lxa<LXAMODE>_index_base): Add.
	(*lxa<LXAMODE>_displacement_index_base): Add.
	(*lxab_displacement_index_base): Add.
	(*llxa<LXAMODE>_displacement_index): Add.
	(*llxa<LXAMODE>_index_base): Add.
	(*llxa<LXAMODE>_displacement_index_base): Add.
	(*llxab_displacement_index_base): Add.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtins.def: Add new instruction variants.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/vecintrin.h: Add new defines.
	* config/s390/vector.md: Adapt insns for new instruction
	variants.
	* config/s390/vx-builtins.md: Ditto.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390-builtins.def (B_VXE3): Define.
	(B_ARCH15): Define.
	* config/s390/s390-c.cc (s390_resolve_overloaded_builtin):
	Consistency checks for VXE3.
	* config/s390/s390.cc (s390_expand_builtin): Consistency checks
	for VXE3.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390-c.cc (rid_int128): New helper function.
	(s390_macro_to_expand): Deal with `vector __int128`.
	(s390_cpu_cpp_builtins_internal): Bump __VEC__.
	* config/s390/s390.cc (s390_handle_vectorbool_attribute): Add
	128-bit bool zvector.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* common/config/s390/s390-common.cc: Add arch15 processor flags.
	* config.gcc: Add arch15 for options --with-{arch,mtune}.
	* config/s390/driver-native.cc (s390_host_detect_local_cpu):
	Default to arch15.
	* config/s390/s390-opts.h (enum processor_type): Add
	PROCESSOR_ARCH15.
	* config/s390/s390.cc (processor_table,s390_issue_rate,
	s390_get_sched_attrmask,s390_get_unit_mask): Add arch15.
	* config/s390/s390.h (enum processor_flags): Add processor flags
	for VXE3 and ARCH15.
	(TARGET_CPU_VXE3): Define.
	(TARGET_CPU_VXE3_P): Define.
	(TARGET_CPU_ARCH15): Define.
	(TARGET_CPU_ARCH15_P): Define.
	(TARGET_VXE3): Define.
	(TARGET_VXE3_P): Define.
	(TARGET_ARCH15): Define.
	(TARGET_ARCH15_P): Define.
	* config/s390/s390.md: Add VXE3 and ARCH15 to cpu_facility, and
	let attribute "enabled" deal with them.
	* config/s390/s390.opt: Add arch15.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/vecintrin.h: Sort definitions.

2025-01-20  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md: Stay scalar for TOINTVEC/tointvec.

2025-01-20  Kito Cheng  <kito.cheng@sifive.com>

	* config.gcc (riscv*): Install sifive_vector.h.
	* config/riscv/sifive_vector.h: New.

2025-01-20  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/118510
	* config/i386/i386.md (*x86_64_shld_ndd_2): Use register_operand
	for operand[0] and adjust the output template to directly
	generate ndd form shld pattern.
	(*x86_shld_ndd_2): Likewise.
	(*x86_64_shrd_ndd_2): Likewise.
	(*x86_shrd_ndd_2): Likewise.

2025-01-19  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*movdi_internal): Reorder ISA attribute
	by ascending alternative index.

2025-01-19  Mark Wielaard  <mark@klomp.org>

	* config/sparc/sparc.opt.urls: Regenerated.

2025-01-19  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Type compatibility): Move modula2.org link
	to https.

2025-01-19  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/extend.texi (OpenMP): Adjust link to specifications.

2025-01-18  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116308
	* config/riscv/riscv.cc (riscv_lshift_subword): Use gen_lowpart
	rather than simplify_gen_subreg.

2025-01-18  Michal Jires  <mjires@suse.cz>

	* cgraph.cc (symbol_table::create_empty):
	Move uid to symtab_node.
	(test_symbol_table_test): Change expected dump id.
	* cgraph.h (struct cgraph_node):
	Move uid to symtab_node.
	(symbol_table::register_symbol): Likewise.
	* dumpfile.cc (test_capture_of_dump_calls):
	Change expected dump id.
	* ipa-inline.cc (update_caller_keys):
	Use summary id instead of uid.
	(update_callee_keys): Likewise.
	* symtab.cc (symtab_node::get_dump_name):
	Use uid instead of order.

2025-01-18  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/118512
	* config/sparc/sparc-c.cc (sparc_target_macros): Deal with VIS 3B.
	* config/sparc/sparc.cc (dump_target_flag_bits): Likewise.
	(sparc_option_override): Likewise.
	(sparc_vis_init_builtins): Likewise.
	* config/sparc/sparc.md (fpcmp_vis): Replace TARGET_VIS3 with
	TARGET_VIS3B.
	(vec_cmp): Likewise.
	(fpcmpu_vis): Likewise.
	(vec_cmpu): Likewise.
	(vcond_mask_): Likewise.
	* config/sparc/sparc.opt (VIS3B): New target mask.
	* doc/invoke.texi (SPARC options): Document -mvis3b.

2025-01-18  Jin Ma  <jinma@linux.alibaba.com>

	PR target/118357
	* config/riscv/riscv-vsetvl.cc: Function change_vtype_only_p always
	returns false for XTheadVector.

2025-01-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118529
	* tree-vect-stmts.cc (vectorizable_condition): Check the
	shape of the vector and condition vector type are compatible.

2025-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Options): Fix plenk at -msplit-ldst.

2025-01-18  Akram Ahmad  <Akram.Ahmad@arm.com>
	    Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.cc: Expand iterators.
	* config/aarch64/aarch64-simd-builtins.def: Use standard names
	* config/aarch64/aarch64-simd.md: Use standard names, split insn
	definitions on signedness of operator and type of operands.
	* config/aarch64/arm_neon.h: Use standard builtin names.
	* config/aarch64/iterators.md: Add VSDQ_I_QI_HI iterator to
	simplify splitting of insn for unsigned scalar arithmetic.

2025-01-18  Akram Ahmad  <Akram.Ahmad@arm.com>

	* config/aarch64/aarch64-sve.md: Rename insns

2025-01-18  Tamar Christina  <tamar.christina@arm.com>

	Revert:
	2025-01-17  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.cc: Expand iterators.
	* config/aarch64/aarch64-simd-builtins.def: Use standard names
	* config/aarch64/aarch64-simd.md: Use standard names, split insn
	definitions on signedness of operator and type of operands.
	* config/aarch64/arm_neon.h: Use standard builtin names.
	* config/aarch64/iterators.md: Add VSDQ_I_QI_HI iterator to
	simplify splitting of insn for unsigned scalar arithmetic.

2025-01-18  Tamar Christina  <tamar.christina@arm.com>

	Revert:
	2025-01-17  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-sve.md: Rename insns

2025-01-18  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.cc: Remove unused variable.

2025-01-18  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_rtx_costs): Fix the
	cost for (a + b * imm) and (a + (b << imm)) which can be
	implemented with a single alsl instruction.

2025-01-18  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (alslsi3_extend): Add alsl.wu.

2025-01-17  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/118067
	* lra-constraints.cc (invalid_mode_reg_p): New function.
	(curr_insn_transform): Use it to check mode returned by target
	secondary_memory_needed_mode.

2025-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/118511
	* config/s390/s390.cc (print_operand) <case 'p'>: Use
	output_operand_lossage instead of gcc_checking_assert.
	(print_operand) <case 'q'>: Likewise.
	(print_operand) <case 'r'>: Likewise.

2025-01-17  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-sve.md: Rename insns

2025-01-17  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.cc: Expand iterators.
	* config/aarch64/aarch64-simd-builtins.def: Use standard names
	* config/aarch64/aarch64-simd.md: Use standard names, split insn
	definitions on signedness of operator and type of operands.
	* config/aarch64/arm_neon.h: Use standard builtin names.
	* config/aarch64/iterators.md: Add VSDQ_I_QI_HI iterator to
	simplify splitting of insn for unsigned scalar arithmetic.

2025-01-17  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvuxwdp):
	Remove built-in definition.

2025-01-17  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_vperm_8hi,
	__builtin_vsx_vperm_8hi_uns): Remove built-in definitions.

2025-01-17  Carl Love  <cel@linux.ibm.com>

	* doc/extend.texi: Fix spelling mistake in description of the
	vec_sel built-in.  Add documentation of the 128-bit vec_perm
	instance.

2025-01-17  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-c.cc (DEF_BUILTIN): Add ATTRS argument to macro
	definition.
	* config/avr/avr.cc: Same.
	(avr_init_builtins) <attr_const>: New variable that can be used
	as ATTRS argument in DEF_BUILTIN.
	* config/avr/builtins.def (DEF_BUILTIN): Add ATTRS parameter
	to all definitions.

2025-01-17  Georg-Johann Lay  <avr@gjlay.de>

	PR target/118329
	* config/avr/avr-modes.def: Add INT_N (PSI, 24).
	* config/avr/avr.cc (avr_init_builtin_int24)
	<__int24>: Remove definition.
	<__uint24>: Adjust definition to INT_N interface.

2025-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118522
	* match.pd ((FTYPE) N CMP (FTYPE) M): Add convert, as in GENERIC
	integral types with the same precision and sign might actually not
	be compatible types.

2025-01-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92539
	* tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely_1):
	Also try force-evaluation if ivcanon did not yet run.
	(canonicalize_loop_induction_variables):
	When niter was computed constant by force evaluation add a
	canonical IV if we didn't unroll.
	* tree-ssa-loop-niter.cc (loop_niter_by_eval): When we
	don't find a proper PHI try if the exit condition scans
	over a STRING_CST and simulate that.

2025-01-17  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.cc
	(is_zicfilp_p): New function.
	(is_zicfiss_p): New function.
	* config/riscv/riscv-zicfilp.cc: Update.
	* config/riscv/riscv.h: Update.
	* config/riscv/riscv.md: Update.
	* config/riscv/riscv-c.cc: Add CFI predefine marco.

2025-01-17  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.cc
	(riscv_file_end): Add .note.gnu.property.

2025-01-17  Monk Chiang  <monk.chiang@sifive.com>

	* common/config/riscv/riscv-common.cc: Add ZICFILP ISA
	string.
	* config.gcc: Add riscv-zicfilp.o
	* config/riscv/riscv-passes.def (INSERT_PASS_BEFORE):
	Insert landing pad instructions.
	* config/riscv/riscv-protos.h (make_pass_insert_landing_pad):
	Declare.
	* config/riscv/riscv-zicfilp.cc: New file.
	* config/riscv/riscv.cc
	(riscv_trampoline_init): Add landing pad instructions.
	(riscv_legitimize_call_address): Likewise.
	(riscv_output_mi_thunk): Likewise.
	* config/riscv/riscv.h: Update.
	* config/riscv/riscv.md: Add landing pad patterns.
	* config/riscv/riscv.opt (TARGET_ZICFILP): Define.
	* config/riscv/t-riscv: Add build rule for
	riscv-zicfilp.o

2025-01-17  Monk Chiang  <monk.chiang@sifive.com>

	* common/config/riscv/riscv-common.cc: Add ZICFISS ISA string.
	* config/riscv/predicates.md: New predicate x1x5_operand.
	* config/riscv/riscv.cc
	(riscv_expand_prologue): Insert shadow stack instructions.
	(riscv_expand_epilogue): Likewise.
	(riscv_for_each_saved_reg): Assign t0 or ra register for
	sspopchk instruction.
	(need_shadow_stack_push_pop_p): New function. Omit shadow
	stack operation on leaf function.
	* config/riscv/riscv.h
	(need_shadow_stack_push_pop_p): Define.
	* config/riscv/riscv.md: Add shadow stack patterns.
	(save_stack_nonlocal): Add shadow stack instructions for setjump.
	(restore_stack_nonlocal): Add shadow stack instructions for longjump.
	* config/riscv/riscv.opt (TARGET_ZICFISS): Define.

2025-01-16  Tamar Christina  <tamar.christina@arm.com>
	    Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113257
	* config/aarch64/driver-aarch64.cc (get_cpu_from_id, DEFAULT_CPU): New.
	(host_detect_local_cpu): Use it.

2025-01-16  Tamar Christina  <tamar.christina@arm.com>

	PR target/110901
	* config/aarch64/aarch64.h (MCPU_TO_MARCH_SPEC): Don't override if
	march is set.

2025-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/1180167
	* lra-constraints.cc (process_alt_operands): Use operand mode not
	subreg reg mode.  Add and improve debugging prints for updating
	losers.

2025-01-16  Sandra Loosemore  <sloosemore@baylibre.com>

	* omp-general.cc (omp_complete_construct_context): Check
	"omp declare target" attribute, not "omp declare target block".

2025-01-16  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Return
	const0_rtx when there is an error.

2025-01-16  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Use correct
	array size for the loop limit.
	* config/rs6000/rs6000-builtins.def: Fix field size for PMASK operand.

2025-01-16  Liao Shihua  <shihua@iscas.ac.cn>

	* config/riscv/vector.md: New attr set.

2025-01-16  Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/genrvv-type-indexer.cc (expand_floattype): New func.
	(main): New type.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_XFQF_OPS): New def.
	(vint8mf8_t): Ditto.
	(vint8mf4_t): Ditto.
	(vint8mf2_t): Ditto.
	(vint8m1_t): Ditto.
	(vint8m2_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_XFQF_OPS): Ditto.
	(rvv_arg_type_info::get_xfqf_float_type): Ditto.
	* config/riscv/riscv-vector-builtins.def (xfqf_vector): Ditto.
	(xfqf_float): Ditto.
	* config/riscv/riscv-vector-builtins.h
	(struct rvv_arg_type_info): New function prototype.
	* config/riscv/sifive-vector.md: Update iterator.
	* config/riscv/vector-iterators.md: Ditto.

2025-01-16  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR tree-optimization/118487
	* tree-ssa-forwprop.cc (recognise_vec_perm_simplify_seq):
	Ensure that shuffle masks are VECTOR_CSTs.

2025-01-16  Christoph Müllner  <christoph.muellner@vrull.eu>

	* tree-ssa-forwprop.cc (recognise_vec_perm_simplify_seq):
	Eliminate redundant calls to to_constant().

2025-01-16  Richard Biener  <rguenther@suse.de>
	    Mikael Morin  <mikael@gcc.gnu.org>

	PR tree-optimization/115494
	* tree-ssa-pre.cc (phi_translate_1): Always generate a
	representative for translated dependent expressions.

2025-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118430
	* tree-ssa-propagate.cc (may_propagate_copy): Return false if dest
	is lhs of an [[gnu::musttail]] call.
	(substitute_and_fold_dom_walker::before_dom_children): Formatting fix.

2025-01-16  Jakub Jelinek  <jakub@redhat.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/118430
	* tree-tailcall.cc: Include gimple-range.h, alloc-pool.h, sreal.h,
	symbol-summary.h, ipa-cp.h and ipa-prop.h.
	(find_tail_calls): If ass_var is NULL and ret_var is not, check if
	IPA-VRP has not found singleton return range for it.  In that case,
	don't punt if ret_var is the only value in that range.  Adjust the
	maybe_error_musttail message otherwise to diagnose different value
	being returned from the caller and callee rather than using return
	slot.  Formatting fixes.

2025-01-16  Jakub Jelinek  <jakub@redhat.com>

	* doc/extend.texi (Using Assembly Language with C): Add Asm constexprs
	to @menu.
	(Basic Asm): Move @node asm constexprs before Asm Labels, rename to
	Asm constexprs, change wording so that it is clearer that the constant
	expression actually must not return a string literal, just some specific
	container and other wording tweaks.  Only talk about top-level for basic
	asms in this @node, move restrictions on top-level extended asms to ...
	(Extended Asm): ... here.

2025-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/118400
	* vec.h (vec<T, va_heap, vl_ptr>::release): Call m_vec->truncate (0)
	instead of clearing m_vec->m_vecpfx.m_num.

2025-01-16  liuhongt  <hongtao.liu@intel.com>

	PR target/118489
	* config/i386/sse.md (VF1_AVX512BW): Fix typo.

2025-01-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115895
	* tree-vect-stmts.cc (get_group_load_store_type): When we
	might overrun because the group size is not a multiple of the
	vector size we cannot use loop masking since that does not
	implement the required load shortening.

2025-01-16  Keith Packard  <keithp@keithp.com>

	* config/lm32/lm32.cc: Add several #includes.
	(va_list_type): New.
	(lm32_build_va_list): New function.
	(lm32_builtin_va_start): Likewise.
	(lm32_sd_gimplify_va_arg_expr): Likewise.
	(lm32_gimplify_va_arg_expr): Likewise.

2025-01-16  Keith Packard  <keithp@keithp.com>

	* config/lm32/lm32.cc (setup_incoming_varargs): Adjust the
	conditionals so that pretend_size is always computed, even
	if no_rtl is set.

2025-01-16  Keith Packard  <keithp@keithp.com>

	* config/lm32/lm32.cc (lm32_setup_incoming_varargs): Skip last
	named parameter when preparing to flush registers with unnamed
	arguments to th stack.

2025-01-16  Keith Packard  <keithp@keithp.com>

	* config/lm32/lm32.cc (lm32_function_arg): Pass unnamed
	arguments in registers too, just like named arguments.

2025-01-16  Andi Kleen  <ak@gcc.gnu.org>

	* config/i386/x86-tune-sched-core.cc: Fix incorrect comment.

2025-01-16  Eugene Rozenfeld  <erozen@microsoft.com>

	PR gcov-profile/116743
	* auto-profile.cc (afdo_annotate_cfg): Fix mismatch between the call graph node count
	and the entry block count.

2025-01-15  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/102705
	* match.pd (`(1 >> X) != 0`): Remove pattern.
	(`1 >> x`): New pattern.

2025-01-15  Sam James  <sam@gentoo.org>

	* doc/extend.texi: Cleanup trailing whitespace.

2025-01-15  Sam James  <sam@gentoo.org>

	* doc/extend.texi: Add 'a' for grammar fix.

2025-01-15  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/tuning_models/neoverse512tvb.h (tune_flags): Update.

2025-01-15  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNE_BASE):
	Add AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
	* config/aarch64/tuning_models/ampere1b.h: Remove redundant
	AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
	* config/aarch64/tuning_models/neoversev2.h: Likewise.

2025-01-15  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.cc (aarch64_override_options): Add warning.
	* doc/invoke.texi: Document -mabi=ilp32 as deprecated.

2025-01-15  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/core-builtins.cc (compute_field_expr): Change
	VAR_DECL outcome in switch case.

2025-01-15  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/core-builtins.cc
	(make_gimple_core_safe_access_index): Fix in condition.

2025-01-15  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* btfout.cc (get_btf_kind): Remove static from function definition.
	* config/bpf/btfext-out.cc (bpf_code_reloc_add): Check if CO-RE type
	is not a const or volatile.
	* ctfc.h (btf_dtd_kind): Add prototype for function.

2025-01-15  Tamar Christina  <tamar.christina@arm.com>

	PR middle-end/118472
	* fold-const.cc (operand_compare::operand_equal_p): Fix incorrect
	replacement.

2025-01-15  Richard Biener  <rguenther@suse.de>

	* genmatch.cc (define_dump_logs): Make reverse lookup in
	dbg_line_numbers easier by adding comments with start index
	and cutting number of elements per line to 10.

2025-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/116068
	* cgraphunit.cc (symbol_table::process_new_functions): Call
	bitmap_obstack_initialize (NULL); and bitmap_obstack_release (NULL)
	around processing the functions.

2025-01-15  Kito Cheng  <kito.cheng@sifive.com>

	PR target/118182
	* config/riscv/autovec-opt.md (*widen_reduc_plus_scal_<mode>): Adjust
	argument for expand_reduction.
	(*widen_reduc_plus_scal_<mode>): Ditto.
	(*fold_left_widen_plus_<mode>): Ditto.
	(*mask_len_fold_left_widen_plus_<mode>): Ditto.
	(*cond_widen_reduc_plus_scal_<mode>): Ditto.
	(*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
	(*cond_widen_reduc_plus_scal_<mode>): Ditto.
	* config/riscv/autovec.md (reduc_plus_scal_<mode>): Adjust argument for
	expand_reduction.
	(reduc_smax_scal_<mode>): Ditto.
	(reduc_umax_scal_<mode>): Ditto.
	(reduc_smin_scal_<mode>): Ditto.
	(reduc_umin_scal_<mode>): Ditto.
	(reduc_and_scal_<mode>): Ditto.
	(reduc_ior_scal_<mode>): Ditto.
	(reduc_xor_scal_<mode>): Ditto.
	(reduc_plus_scal_<mode>): Ditto.
	(reduc_smax_scal_<mode>): Ditto.
	(reduc_smin_scal_<mode>): Ditto.
	(reduc_fmax_scal_<mode>): Ditto.
	(reduc_fmin_scal_<mode>): Ditto.
	(fold_left_plus_<mode>): Ditto.
	(mask_len_fold_left_plus_<mode>): Ditto.
	* config/riscv/riscv-v.cc (expand_reduction): Add one more
	argument for reduction code for vl0-safe.
	* config/riscv/riscv-protos.h (expand_reduction): Ditto.
	* config/riscv/vector-iterators.md (unspec): Add _VL0_SAFE variant of
	reduction.
	(ANY_REDUC_VL0_SAFE): New.
	(ANY_WREDUC_VL0_SAFE): Ditto.
	(ANY_FREDUC_VL0_SAFE): Ditto.
	(ANY_FREDUC_SUM_VL0_SAFE): Ditto.
	(ANY_FWREDUC_SUM_VL0_SAFE): Ditto.
	(reduc_op): Add _VL0_SAFE variant of reduction.
	(order) Ditto.
	* config/riscv/vector.md (@pred_<reduc_op><mode>): New.

2025-01-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115777
	* tree-vect-slp.cc (vect_bb_slp_scalar_cost): Do not
	cost a scalar stmt that needs to be preserved.

2025-01-15  Michal Jires  <mjires@suse.cz>

	PR lto/118238
	* lto-wrapper.cc (run_gcc): Remove link() copying.

2025-01-15  Anton Blanchard  <antonb@tenstorrent.com>
	    Jeff Law  <jlaw@ventanamicro.com>

	PR target/118170
	* config/riscv/generic-ooo.md (generic_ooo_float_div_half): New
	reservation.

2025-01-15  Richard Sandiford  <richard.sandiford@arm.com>
	    Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/109592
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
	Simplify nested shifts with subregs.

2025-01-14  anetczuk  <anetczuk@o2.pl>

	* tree-dump.cc (dequeue_and_dump): Handle OBJ_TYPE_REF.

2025-01-14  Alexandre Oliva  <oliva@adacore.com>

	* gimple-fold.cc (decode_field_reference): Rebustify to set
	out parms only when returning non-NULL.
	(fold_truth_andor_for_ifcombine): Bail if
	decode_field_reference returns NULL.  Add complementary assert
	on r_const's not being set when l_const isn't.

2025-01-14  Sandra Loosemore  <sloosemore@baylibre.com>

	* cgraph.cc (symbol_table::create_edge): Don't set
	calls_declare_variant_alt in the caller.
	* cgraph.h (struct cgraph_node): Remove declare_variant_alt
	and calls_declare_variant_alt flags.
	* cgraphclones.cc (cgraph_node::create_clone): Don't copy
	calls_declare_variant_alt bit.
	* gimplify.cc: Remove previously #ifdef-ed out code.
	* ipa-free-lang-data.cc (free_lang_data_in_decl): Adjust code
	referencing declare_variant_alt bit.
	* ipa.cc (symbol_table::remove_unreachable_nodes): Likewise.
	* lto-cgraph.cc (lto_output_node): Remove references to deleted
	bits.
	(output_refs): Adjust code referencing declare_variant_alt bit.
	(input_overwrite_node): Remove references to deleted bits.
	(input_refs): Adjust code referencing declare_variant_alt bit.
	* lto-streamer-out.cc (lto_output): Likewise.
	* lto-streamer.h (omp_lto_output_declare_variant_alt): Delete.
	(omp_lto_input_declare_variant_alt): Delete.
	* omp-expand.cc (expand_omp_target): Use has_omp_variant_constructs
	bit to trigger pass_omp_device_lower instead of
	calls_declare_variant_alt.
	* omp-general.cc (struct omp_declare_variant_entry): Delete.
	(struct omp_declare_variant_base_entry): Delete.
	(struct omp_declare_variant_hasher): Delete.
	(omp_declare_variant_hasher::hash): Delete.
	(omp_declare_variant_hasher::equal): Delete.
	(omp_declare_variants): Delete.
	(omp_declare_variant_alt_hasher): Delete.
	(omp_declare_variant_alt_hasher::hash): Delete.
	(omp_declare_variant_alt_hasher::equal): Delete.
	(omp_declare_variant_alt): Delete.
	(omp_lto_output_declare_variant_alt): Delete.
	(omp_lto_input_declare_variant_alt): Delete.
	(includes): Delete unnecessary include of gt-omp-general.h.
	* omp-offload.cc (execute_omp_device_lower): Remove references
	to deleted bit.
	(pass_omp_device_lower::gate): Likewise.
	* omp-simd-clone.cc (simd_clone_create): Likewise.
	* passes.cc (ipa_write_summaries): Likeise.
	* symtab.cc (symtab_node::get_partitioning_class): Likewise.
	* tree-inline.cc (expand_call_inline): Likewise.
	(tree_function_versioning): Likewise.

2025-01-14  Sandra Loosemore  <sloosemore@baylibre.com>
	    Kwok Cheung Yeung  <kcy@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>
	    Marcel Vollweiler  <marcel@codesourcery.com>

	PR middle-end/114596
	PR middle-end/112779
	PR middle-end/113904
	* Makefile.in (GTFILES): Move omp-general.h earlier; required
	because of moving score_wide_int declaration to that file.
	* cgraph.h (struct cgraph_node): Add has_omp_variant_constructs flag.
	* cgraphclones.cc (cgraph_node::create_clone): Propagate
	has_omp_variant_constructs flag.
	* gimplify.cc (omp_resolved_variant_calls): New.
	(expand_late_variant_directive): New.
	(find_supercontext): New.
	(gimplify_variant_call_expr): New.
	(gimplify_call_expr): Adjust parameters to make fallback available.
	Update processing for "declare variant" substitution.
	(is_gimple_stmt): Add OMP_METADIRECTIVE.
	(omp_construct_selector_matches): Ifdef out unused function.
	(omp_get_construct_context): New.
	(gimplify_omp_dispatch): Replace call to deleted function
	omp_resolve_declare_variant with equivalent logic.
	(expand_omp_metadirective): New.
	(expand_late_variant_directive): New.
	(gimplify_omp_metadirective): New.
	(gimplify_expr): Adjust arguments to gimplify_call_expr.  Add
	cases for OMP_METADIRECTIVE, OMP_NEXT_VARIANT, and
	OMP_TARGET_DEVICE_MATCHES.
	(gimplify_function_tree): Initialize/clean up
	omp_resolved_variant_calls.
	* gimplify.h (omp_construct_selector_matches): Delete declaration.
	(omp_get_construct_context): Declare.
	* lto-cgraph.cc (lto_output_node): Write has_omp_variant_constructs.
	(input_overwrite_node): Read has_omp_variant_constructs.
	* omp-builtins.def (BUILT_IN_OMP_GET_NUM_DEVICES): New.
	* omp-expand.cc (expand_omp_taskreg): Propagate
	has_omp_variant_constructs.
	(expand_omp_target): Likewise.
	* omp-general.cc (omp_maybe_offloaded): Add construct_context
	parameter; use it instead of querying gimplifier state.  Add
	comments.
	(omp_context_name_list_prop): Do not test lang_GNU_Fortran in
	offload compiler, just use the string as-is.
	(expr_uses_parm_decl): New.
	(omp_check_context_selector): Add metadirective_p parameter.
	Remove sorry for target_device selector.  Add additional checks
	specific to metadirective or declare variant.
	(make_omp_metadirective_variant): New.
	(omp_construct_traits_match): New.
	(omp_context_selector_matches): Temporarily ifdef out the previous
	code, and add a new implementation based on the old one with
	different parameters, some unnecessary loops removed, and code
	re-indented.
	(omp_target_device_matches_on_host): New.
	(resolve_omp_target_device_matches): New.
	(omp_construct_simd_compare): Support matching of "simdlen" and
	"aligned" clauses.
	(omp_context_selector_set_compare): Make static.  Adjust call to
	omp_construct_simd_compare.
	(score_wide_int): Move declaration to omp-general.h.
	(omp_selector_is_dynamic): New.
	(omp_device_num_check): New.
	(omp_dynamic_cond): New.
	(omp_context_compute_score): Ifdef out the old version and
	re-implement with different parameters.
	(omp_complete_construct_context): New.
	(omp_resolve_late_declare_variant): Ifdef out.
	(omp_declare_variant_remove_hook): Likewise.
	(omp_resolve_declare_variant): Likewise.
	(sort_variant): New.
	(omp_get_dynamic_candidates): New.
	(omp_declare_variant_candidates): New.
	(omp_metadirective_candidates): New.
	(omp_early_resolve_metadirective): New.
	(omp_resolve_variant_construct): New.
	* omp-general.h (score_wide_int): Moved here from omp-general.cc.
	(struct omp_variant): New.
	(make_omp_metadirective_variant): Declare.
	(omp_construct_traits_to_codes): Delete declaration.
	(omp_check_context_selector): Adjust parameters.
	(omp_context_selector_matches): Likewise.
	(omp_context_selector_set_compare): Delete declaration.
	(omp_resolve_declare_variant): Likewise.
	(omp_declare_variant_candidates): Declare.
	(omp_metadirective_candidates): Declare.
	(omp_get_dynamic_candidates): Declare.
	(omp_early_resolve_metadirective): Declare.
	(omp_resolve_variant_construct): Declare.
	(omp_dynamic_cond): Declare.
	* omp-offload.cc (resolve_omp_variant_cookies): New.
	(execute_omp_device_lower): Call the above function to resolve
	variant directives.  Remove call to omp_resolve_declare_variant.
	(pass_omp_device_lower::gate): Check has_omp_variant_construct bit.
	* omp-simd-clone.cc (simd_clone_create): Propagate
	has_omp_variant_constructs bit.
	* tree-inline.cc (expand_call_inline): Likewise.
	(tree_function_versioning): Likewise.

2025-01-14  Sandra Loosemore  <sloosemore@baylibre.com>
	    Kwok Cheung Yeung  <kcy@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>

	* doc/generic.texi (OpenMP): Document OMP_METADIRECTIVE,
	OMP_NEXT_VARIANT, and OMP_TARGET_DEVICE_MATCHES.
	* fold-const.cc (operand_compare::hash_operand): Ignore
	the new nodes.
	* gimple-expr.cc (is_gimple_val): Allow OMP_NEXT_VARIANT
	and OMP_TARGET_DEVICE_MATCHES.
	* gimple.cc (get_gimple_rhs_num_ops): OMP_NEXT_VARIANT and
	OMP_TARGET_DEVICE_MATCHES are both GIMPLE_SINGLE_RHS.
	* tree-cfg.cc (tree_node_can_be_shared): Allow sharing of
	OMP_NEXT_VARIANT.
	* tree-inline.cc (remap_gimple_op_r): Ignore subtrees of
	OMP_NEXT_VARIANT.
	* tree-pretty-print.cc (dump_generic_node): Handle OMP_METADIRECTIVE,
	OMP_NEXT_VARIANT, and OMP_TARGET_DEVICE_MATCHES.
	* tree-ssa-operands.cc (operands_scanner::get_expr_operands):
	Ignore operands of OMP_NEXT_VARIANT and OMP_TARGET_DEVICE_MATCHES.
	* tree.def (OMP_METADIRECTIVE): New.
	(OMP_NEXT_VARIANT): New.
	(OMP_TARGET_DEVICE_MATCHES): New.
	* tree.h (OMP_METADIRECTIVE_VARIANTS): New.
	(OMP_METADIRECTIVE_VARIANT_SELECTOR): New.
	(OMP_METADIRECTIVE_VARIANT_DIRECTIVE): New.
	(OMP_METADIRECTIVE_VARIANT_BODY): New.
	(OMP_NEXT_VARIANT_INDEX): New.
	(OMP_NEXT_VARIANT_STATE): New.
	(OMP_TARGET_DEVICE_MATCHES_SELECTOR): New.
	(OMP_TARGET_DEVICE_MATCHES_PROPERTIES): New.

2025-01-14  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118456
	* gimple-fold.cc (decode_field_reference): Punt if shifting
	after changing signedness.
	(fold_truth_andor_for_ifcombine): Check extension bits in
	constants before clipping.

2025-01-14  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/118154
	* config/riscv/riscv-vsetvl.cc (MAX_LMUL): New define.
	(pre_vsetvl::earliest_fuse_vsetvl_info): Use.
	(pre_vsetvl::pre_global_vsetvl_info): New predicate with equal
	ratio.
	* config/riscv/riscv-vsetvl.def: Use.

2025-01-14  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/118140
	* gimple-match-exports.cc (maybe_resimplify_conditional_op): Add
	COND_EXPR when we simplified to a scalar gimple value but still
	have an else value.

2025-01-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118405
	* tree-vect-stmts.cc (vectorizable_load): When we fall back
	to scalar loads make sure we properly convert to vector(1) T
	when there was only a single vector element.

2025-01-14  Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Shift in Xmode.

2025-01-14  Jiufu Guo  <guojiufu@linux.ibm.com>

	PR target/116030
	* config/rs6000/vsx.md (vsx_stxvd2x4_le_const_<mode>): Add clobber
	and guard with !altivec_indexed_or_indirect_operand.

2025-01-14  Robin Dapp  <rdapp.gcc@gmail.com>

	PR target/117682
	* config/riscv/riscv-v.cc (expand_const_vector): Fall back to
	merging if either step is negative.

2025-01-13  Xi Ruoyao  <xry111@xry111.site>

	PR target/115921
	* config/riscv/riscv.md (<optab>_shift_reverse): Remove
	check for TARGET_ZBA.

2025-01-13  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/118418
	* simplify-rtx.cc (simplify_context::simplify_relational_operation_1):
	Take STORE_FLAG_VALUE into account when handling signed comparisons
	of comparison results.

2025-01-13  Xi Ruoyao  <xry111@xry111.site>

	PR target/115921
	* config/riscv/riscv.md (<optab>_shift_reverse): Only check
	popcount_hwi if !TARGET_ZBS.

2025-01-13  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv-vsetvl.cc (demand_system::use_max_sew): Also
	set the ratio for PREV.

2025-01-13  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.cc (riscv_register_move_cost): Remove buggy
	check.

2025-01-13  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Change
	1UL/1ULL to HOST_WIDE_INT_1U.

2025-01-13  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/107455
	* postreload.cc (reload_cse_regs_1): Take advantage of conditional
	equivalences.

2025-01-13  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118409
	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Apply the
	signbit mask to the right-hand XOR operand too.

2025-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/115910
	* expr.cc (expand_expr_divmod): Prefix the TDF_DETAILS note with
	";; " and add a space before (needed tie breaker).  Formatting fixes.

2025-01-13  Richard Biener  <rguenther@suse.de>
	    Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	PR tree-optimization/117119
	* tree-data-ref.cc (initialize_matrix_A): Check whether
	an INTEGER_CST fits in HWI, otherwise return chrec_dont_know.

2025-01-13  Michal Jires  <mjires@suse.cz>

	PR lto/118181
	* lto-ltrans-cache.cc (ltrans_file_cache::create_item):
	Pass checksum by reference.
	* lto-ltrans-cache.h: Likewise.

2025-01-13  Michal Jires  <mjires@suse.cz>

	* lockfile.cc (LOCKFILE_USE_FCNTL): New.
	(lockfile::lock_write): Use LOCKFILE_USE_FCNTL.
	(lockfile::try_lock_write): Use LOCKFILE_USE_FCNTL.
	(lockfile::lock_read): Use LOCKFILE_USE_FCNTL.
	(lockfile::unlock): Use LOCKFILE_USE_FCNTL.
	(lockfile::lockfile_supported): Use LOCKFILE_USE_FCNTL.

2025-01-13  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
	Refactor to avoid redundant TARGET_AVX512BW in many places.

2025-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/117997
	PR middle-end/118415
	* expr.cc (assemble_crc_table): Make static, remove id argument,
	use output_constant_def.  Emit note if -fdump-rtl-expand-details
	about which table has been emitted.
	(generate_crc_table): Make static, adjust assemble_crc_table
	caller, call it always.
	(calculate_table_based_CRC): Make static.
	* internal-fn.cc (expand_crc_optab_fn): Emit note if
	-fdump-rtl-expand-details about using optab for crc.  Formatting fix.

2025-01-12  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha.cc (alpha_expand_block_move): Use a HImode
	subreg of a DImode register to hold data from an aligned HImode
	load.

2025-01-12  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha.cc (alpha_expand_block_move): Merge loaded
	data from pairs of SImode registers into single DImode registers
	if to be used with unaligned stores.

2025-01-12  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha.cc (alpha_option_override): Ignore CPU
	flags corresponding to features the enabling or disabling of
	which has been requested with an individual feature option.

2025-01-12  Maciej W. Rozycki  <macro@orcam.me.uk>

	PR middle-end/64242
	* config/alpha/alpha.md (`builtin_longjmp'): Restore frame
	pointer last.  Add frame clobber and schedule blockage.

2025-01-12  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/alpha/alpha.md (builtin_longjmp): Add memory clobbers.

2025-01-12  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp): Release saved_stmts
	vector.
	(vect_build_slp_tree_2): Release new_oprnds_info when not
	used.
	(vect_analyze_slp): Release root_stmts when gcond SLP
	build fails.

2025-01-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/118411
	* final.cc (get_attr_length_1): Handle asm for CALL_INSN
	and JUMP_INSNs.

2025-01-11  mengqinggang  <mengqinggang@loongson.cn>

	* config/loongarch/lasx.md: Use new loongarch_output_move.
	* config/loongarch/loongarch-protos.h (loongarch_output_move):
	Change parameters from (rtx, rtx) to (rtx *).
	* config/loongarch/loongarch.cc (loongarch_output_move):
	Generate final immediate for lu12i.w and lu52i.d.
	* config/loongarch/loongarch.md:
	Generate final immediate for lu32i.d and lu52i.d.
	* config/loongarch/lsx.md: Use new loongarch_output_move.

2025-01-11  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/88575
	* vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Query
	relation between op0 and op1 and utilize it.
	(simplify_using_ranges::simplify): Do not eliminate float checks.

2025-01-10  Alex Coplan  <alex.coplan@arm.com>

	PR tree-optimization/118211
	PR tree-optimization/116126
	* tree-vect-loop.cc (vect_compute_single_scalar_iteration_cost):
	Don't skip over gconds.

2025-01-10  Alex Coplan  <alex.coplan@arm.com>

	PR tree-optimization/118211
	PR tree-optimization/116126
	* tree-vect-loop-manip.cc (vect_do_peeling): Adjust skip_vector
	condition to only omit the edge if we're versioning for
	alignment.

2025-01-10  Tamar Christina  <Tamar.Christina@arm.com>
	    Alex Coplan  <alex.coplan@arm.com>

	PR tree-optimization/118211
	PR tree-optimization/116126
	* tree-vect-loop-manip.cc (vect_do_peeling): Update immediate
	dominators of nodes that were dominated by the prolog skip block
	after inserting vector skip edge.  Initialize prolog variable to
	NULL to avoid bogus -Wmaybe-uninitialized during bootstrap.

2025-01-10  Alex Coplan  <alex.coplan@arm.com>

	PR tree-optimization/118211
	PR tree-optimization/116126
	* tree-vect-loop-manip.cc (vect_do_peeling): Avoid emitting an
	epilogue guard for inverted early-exit loops.

2025-01-10  Alex Coplan  <alex.coplan@arm.com>
	    Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/118211
	PR tree-optimization/116126
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	Set need_peeling_for_alignment flag on read DRs instead of
	failing vectorization.  Punt on gathers.
	(dr_misalignment): Handle non-constant target alignments.
	(vect_compute_data_ref_alignment): If need_peeling_for_alignment
	flag is set on the DR, then override the target alignment chosen
	by the preferred_vector_alignment hook to choose a safe
	alignment.
	(vect_supportable_dr_alignment): Override
	support_vector_misalignment hook if need_peeling_for_alignment
	is set on the DR: in this case we must return
	dr_unaligned_unsupported in order to force peeling.
	* tree-vect-loop-manip.cc (vect_do_peeling): Allow prolog
	peeling by a compile-time non-constant amount.
	* tree-vectorizer.h (dr_vec_info): Add new flag
	need_peeling_for_alignment.

2025-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Fix cortex-x4 parts
	num.

2025-01-10  Richard Biener  <rguenther@suse.de>

	* df-core.cc (rest_of_handle_df_finish): Release dflow for
	problems without free function (like LR).
	* gimple-crc-optimization.cc (crc_optimization::loop_may_calculate_crc):
	Release loop_bbs on all exits.
	* tree-vectorizer.h (supportable_indirect_convert_operation): Change.
	* tree-vect-generic.cc (expand_vector_conversion): Adjust.
	* tree-vect-stmts.cc (vectorizable_conversion): Use auto_vec for
	converts.
	(supportable_indirect_convert_operation): Get a reference to
	the output vector of converts.

2025-01-10  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/118332
	* config/arm/arm-mve-builtins.cc (wrap_type_in_struct): Delete.
	(register_type_decl): Delete.
	(register_builtin_tuple_types): Use
	lang_hooks.types.simulate_record_decl.

2025-01-10  Richard Biener  <rguenther@suse.de>

	* gcse.cc (pass_hardreg_pre::gate): Wrap possibly unused
	fun argument.

2025-01-10  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/117467
	PR rtl-optimization/117934
	* ext-dce.cc (ext_dce_execute): Do nothing if a memory
	allocation estimate exceeds what is allowed by
	--param max-gcse-memory.

2025-01-10  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-protos.h (s390_emit_compare): Add mode
	parameter for the resulting RTX.
	* config/s390/s390.cc (s390_emit_compare): Dito.
	(s390_emit_compare_and_swap): Change.
	(s390_expand_vec_strlen): Change.
	(s390_expand_cs_hqi): Change.
	(s390_expand_split_stack_prologue): Change.
	* config/s390/s390.md (*add<mode>3_carry1_cc): Renamed to ...
	(add<mode>3_carry1_cc): this and in order to use the
	corresponding gen function, encode CC mode into pattern.
	(*sub<mode>3_borrow_cc): Renamed to ...
	(sub<mode>3_borrow_cc): this and in order to use the
	corresponding gen function, encode CC mode into pattern.
	(*add<mode>3_alc_carry1_cc): Renamed to ...
	(add<mode>3_alc_carry1_cc): this and in order to use the
	corresponding gen function, encode CC mode into pattern.
	(sub<mode>3_slb_borrow1_cc): New.
	(uaddc<mode>5): New.
	(usubc<mode>5): New.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* doc/passes.texi: Document hardreg PRE pass.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.h (HARDREG_PRE_REGNOS): New macro.
	* gcse.cc (doing_hardreg_pre_p): New global variable.
	(do_load_motion): New boolean check.
	(current_hardreg_regno): New global variable.
	(compute_local_properties): Unset transp for hardreg clobbers.
	(prune_hardreg_uses): New function.
	(want_to_gcse_p): Use different checks for hardreg PRE.
	(oprs_unchanged_p): Disable load motion for hardreg PRE pass.
	(hash_scan_set): For hardreg PRE, skip non-hardreg sets and
	check for hardreg clobbers.
	(record_last_mem_set_info): Skip for hardreg PRE.
	(compute_pre_data): Prune hardreg uses from transp bitmap.
	(pre_expr_reaches_here_p_work): Add sentence to comment.
	(insert_insn_start_basic_block): New functions.
	(pre_edge_insert): Don't add hardreg sets to predecessor block.
	(pre_delete): Use hardreg for the reaching reg.
	(reset_hardreg_debug_uses): New function.
	(pre_gcse): For hardreg PRE, reset debug uses and don't insert
	copies.
	(one_pre_gcse_pass): Disable load motion for hardreg PRE.
	(execute_hardreg_pre): New.
	(class pass_hardreg_pre): New.
	(pass_hardreg_pre::gate): New.
	(make_pass_hardreg_pre): New.
	* passes.def (pass_hardreg_pre): New pass.
	* tree-pass.h (make_pass_hardreg_pre): New.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* multiple_target.cc
	(redirect_to_specific_clone): Assert that "target" attribute is
	used for FMV before checking it.
	(ipa_target_clone): Skip redirect_to_specific_clone on some
	targets.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* doc/invoke.texi: Add new AArch64 flags.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_7A): Add XS.
	* config/aarch64/aarch64-option-extensions.def (XS): New flag.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_7A): Add WFXT.
	* config/aarch64/aarch64-option-extensions.def (WFXT): New flag.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_4A): Add RCPC2.
	* config/aarch64/aarch64-option-extensions.def
	(RCPC2): New flag.
	(RCPC3): Add RCPC2 dependency.
	* config/aarch64/aarch64.h (TARGET_RCPC2): Use new flag.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_5A): Add FLAGM2.
	* config/aarch64/aarch64-option-extensions.def (FLAGM2): New flag.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_5A): Add FRINTTS
	* config/aarch64/aarch64-option-extensions.def (FRINTTS): New flag.
	* config/aarch64/aarch64.h (TARGET_FRINT): Use new flag.
	* config/aarch64/arm_acle.h: Use new flag for frintts intrinsics.
	* config/aarch64/arm_neon.h: Ditto.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_3A): Add JSCVT.
	* config/aarch64/aarch64-option-extensions.def (JSCVT): New flag.
	* config/aarch64/aarch64.h (TARGET_JSCVT): Use new flag.
	* config/aarch64/arm_acle.h: Use new flag for jscvt intrinsics.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def (V8_3A): Add FCMA.
	* config/aarch64/aarch64-option-extensions.def (FCMA): New flag.
	(SVE): Add FCMA dependency.
	* config/aarch64/aarch64.h (TARGET_COMPLEX): Use new flag.
	* config/aarch64/arm_neon.h: Use new flag for fcma intrinsics.

2025-01-10  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_expand_epilogue): Use TARGET_PAUTH.
	* config/aarch64/aarch64.md: Update comment.

2025-01-10  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/117186
	* rtl.h (simplify_context::simplify_logical_relational_operation): Add
	an invert0_p parameter.
	* simplify-rtx.cc (unsigned_comparison_to_mask): New function.
	(mask_to_unsigned_comparison): Likewise.
	(comparison_code_valid_for_mode): Delete.
	(simplify_context::simplify_logical_relational_operation): Add
	an invert0_p parameter.  Handle AND and XOR.  Handle unsigned
	comparisons.  Handle always-false results.  Ignore the low bit
	of the mask if the operands are always ordered and remove the
	then-redundant check of comparison_code_valid_for_mode.  Check
	for side-effects in the operands before simplifying them away.
	(simplify_context::simplify_binary_operation_1): Remove
	simplification of (compare (gt ...) (lt ...)) and instead...
	(simplify_context::simplify_relational_operation_1): ...handle
	comparisons of comparisons here.
	(test_comparisons): New function.
	(test_scalar_ops): Call it.

2025-01-10  Alexandre Oliva  <oliva@adacore.com>

	* gimple-fold.cc (decode_field_reference): Drop misuses of
	uniform_integer_cst_p.
	(fold_truth_andor_for_ifcombine): Likewise.

2025-01-10  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118344
	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Fix typo in
	rr_and_mask's type adjustment test.

2025-01-10  Alexandre Oliva  <oliva@adacore.com>

	* gimple-fold.cc (decode_field_reference): Add xor_pand_mask.
	Propagate pand_mask to the right-hand xor operand.  Don't
	require the right-hand xor operand to be a constant.
	(fold_truth_andor_for_ifcombine): Pass right-hand mask when
	appropriate.

2025-01-10  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/118206
	* gimple-fold.cc (decode_field_reference): Account for upper
	bits dropped by narrowing conversions whether before or after
	a right shift.
	(fold_truth_andor_for_ifcombine): Fold masks, compares, and
	combined results.

2025-01-10  Alexandre Oliva  <oliva@adacore.com>

	* gimple-fold.cc (fold_truth_andor_for_ifcombine): Limit
	boundary choice by word size as well.  Try aligned double-word
	loads as a last resort.

2025-01-10  Martin Jambor  <mjambor@suse.cz>

	PR ipa/118138
	* ipa-cp.cc (ipacp_value_safe_for_type): Return the appropriate
	type instead of a bool, accept NULL_TREE VALUEs.
	(propagate_vals_across_arith_jfunc): Use the new returned value of
	ipacp_value_safe_for_type.
	(propagate_vals_across_ancestor): Likewise.
	(propagate_scalar_across_jump_function): Likewise.

2025-01-10  chenxiaolong  <chenxiaolong@loongson.cn>
	    Deng Jianbo  <dengjianbo@loongson.cn>.

	* config/loongarch/loongarch.cc
	(loongarch_builtin_vectorization_cost): Modify the
	construction cost of the vec_construct vector.

2025-01-09  Tamar Christina  <tamar.christina@arm.com>

	PR target/118188
	* config/aarch64/aarch64.cc (aarch64_vector_costs::count_ops): Adjust
	throughput of emulated gather and scatters.

2025-01-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/118017
	* lra-constraints.cc (inherit_reload_reg): Check reg class on uniformity.

2025-01-09  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/118362
	* config/s390/s390.cc (s390_constant_via_vgbm_p): Allow at most
	16-byte vectors.

2025-01-09  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/118131
	* config/arm/arm.h (VALID_MVE_STRUCT_MODE): Accept TI, OI and XI
	modes again.

2025-01-09  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/65181
	* config/nvptx/nvptx.cc (nvptx_get_drap_rtx): Handle
	'!TARGET_SOFT_STACK'.
	* config/nvptx/nvptx.md (define_c_enum "unspec"): Add
	'UNSPEC_STACKSAVE', 'UNSPEC_STACKRESTORE'.
	(define_expand "allocate_stack", define_expand "save_stack_block")
	(define_expand "save_stack_block"): Handle '!TARGET_SOFT_STACK',
	PTX 'alloca'.
	(define_insn "@nvptx_alloca_<mode>")
	(define_insn "@nvptx_stacksave_<mode>")
	(define_insn "@nvptx_stackrestore_<mode>"): New.
	* doc/invoke.texi (Nvidia PTX Options): Update '-msoft-stack',
	'-mno-soft-stack'.
	* doc/sourcebuild.texi (nvptx-specific attributes): Document
	'nvptx_runtime_alloca_ptx'.
	(Add Options): Document 'nvptx_alloca_ptx'.

2025-01-09  Richard Biener  <rguenther@suse.de>

	* cfgloopmanip.cc (duplicate_loop_body_to_header_edge): When
	copying to the header edge first redirect the entry to the
	new loop and then the exit to the old to avoid PHI node
	re-allocation.

2025-01-09  H.J. Lu  <hjl.tools@gmail.com>

	PR rtl-optimization/118266
	* ree.cc (add_removable_extension): Skip extension on fixed
	register.

2025-01-09  Jakub Jelinek  <jakub@redhat.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/117927
	* tree-pass.h (PROP_last_full_fold): Define.
	* passes.def: Add last= parameters to pass_forwprop.
	* tree-ssa-forwprop.cc (pass_forwprop): Add last_p non-static
	data member and initialize it in the ctor.
	(pass_forwprop::set_pass_param): New method.
	(pass_forwprop::execute): Set PROP_last_full_fold in curr_properties
	at the start if last_p.
	* match.pd (a rrotate (32-b) -> a lrotate b): Only optimize either
	if @2 is known not to be equal to prec or if during/after last
	forwprop the subtraction has single use and prec is power of two; in
	that case transform it into orotate by masked count.

2025-01-09  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h (get_intel_cpu): Remove 0x00.

2025-01-09  xuli  <xuli1@eswincomputing.com>

	* config/riscv/riscv-vector-builtins.cc (function_builder::add_unique_function):
	Only register overloaded intrinsic for g++.
	Only insert non_overloaded_function_table for gcc.
	(function_builder::add_overloaded_function): Only register overloaded intrinsic for gcc.
	(handle_pragma_vector): Only initialize non_overloaded_function_table for gcc.

2025-01-09  Tobias Burnus  <tburnus@baylibre.com>

	* builtin-types.def (BT_FN_PTRMODE_PTR_INT_PTR): Add.
	* gimplify.cc (gimplify_call_expr): Add error for multiple
	list items to the OpenMP interop clause if no device clause;
	continue instead of restarting after append_args handling.
	(gimplify_omp_dispatch): Extract device number from the
	single interop-clause list item.
	* omp-builtins.def (BUILT_IN_OMP_GET_INTEROP_INT): Add.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/65181
	* config/nvptx/nvptx.cc (default_ptx_version_option): For
	'-march=sm_52' and higher, default at least to '-mptx=7.3'.
	* doc/invoke.texi (Nvidia PTX Options): Update '-mptx=[...]'.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx-opts.h (enum ptx_version): Add
	'PTX_VERSION_7_3'.
	* config/nvptx/nvptx.cc (ptx_version_to_string)
	(ptx_version_to_number): Adjust.
	* config/nvptx/nvptx.h (TARGET_PTX_7_3): New.
	* config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue'
	'7.3' for 'PTX_VERSION_7_3'.
	* doc/invoke.texi (Nvidia PTX Options): Document '-mptx=7.3'.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	'nvptx_softstack'.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/65181
	* config/nvptx/nvptx.h (STACK_SAVEAREA_MODE): '#define'.
	* config/nvptx/nvptx.md [!TARGET_SOFT_STACK]
	(save_stack_function): 'define_expand'.
	(restore_stack_function): Handle '!TARGET_SOFT_STACK'.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/65181
	* config/nvptx/nvptx.md [!TARGET_SOFT_STACK] (save_stack_block):
	'define_expand'.

2025-01-08  Thiago Jung Bauermann  <thiago.bauermann@linaro.org>

	* configure.ac: Fix check for HAVE_GAS_SHF_MERGE on Arm targets.
	* configure: Regenerate.

2025-01-08  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/107102
	* config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall): Only
	reject calls with different PCSes if the callee clobbers register
	state that the caller must preserve.

2025-01-08  Tobias Burnus  <tburnus@baylibre.com>

	* gimplify.cc (gimplify_call_expr): Disable variant function's
	append_args in 'omp dispatch' when invoking the variant directly
	and not through the base function.

2025-01-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* doc/invoke.texi (Nvidia PTX Options): Update '-march-map=sm_50'.

2025-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/117979
	* tree-ssa-dce.cc (make_forwarders_with_degenerate_phis):
	Properly update the irreducible region state.

2025-01-08  Jakub Jelinek  <jakub@redhat.com>

	* dwarf2out.cc (break_out_comdat_types): Copy over
	DW_AT_language_{name,version} if present.
	(output_skeleton_debug_sections): Remove also
	DW_AT_language_{name,version}.
	(gen_compile_unit_die): For C17, C23, C2Y, C++17, C++20, C++23
	and C++26 emit for -gdwarf-5 -gno-strict-dwarf also
	DW_AT_language_{name,version} attributes.

2025-01-08  Richard Biener  <rguenther@suse.de>

	PR middle-end/118325
	* tree-nested.cc (convert_nl_goto_reference): Assign proper
	context to generated artificial label.

2025-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118269
	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Use the correct stmt for the REDUC_GROUP_FIRST_ELEMENT lookup.

2025-01-08  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/118332
	* config/arm/arm-mve-builtins.cc (wrap_type_in_struct): Use 'val'
	instead of '__val'.

2025-01-08  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/amxavx512intrin.h
	(_tile_cvtrowps2pbf16h_internal): Rename to...
	(_tile_cvtrowps2bf16h_internal): ...this.
	(_tile_cvtrowps2pbf16hi_internal): Rename to...
	(_tile_cvtrowps2bf16hi_internal): ...this.
	(_tile_cvtrowps2pbf16l_internal): Rename to...
	(_tile_cvtrowps2bf16l_internal): ...this.
	(_tile_cvtrowps2pbf16li_internal): Rename to...
	(_tile_cvtrowps2bf16li_internal): ...this.
	(_tile_cvtrowps2pbf16h): Rename to...
	(_tile_cvtrowps2bf16h): ...this.
	(_tile_cvtrowps2pbf16hi): Rename to...
	(_tile_cvtrowps2bf16hi): ...this.
	(_tile_cvtrowps2pbf16l): Rename to...
	(_tile_cvtrowps2bf16l): ...this.
	(_tile_cvtrowps2pbf16li): Rename to...
	(_tile_cvtrowps2bf16li): ...this.

2025-01-08  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.cc (ix86_noce_max_ifcvt_seq_cost): Adjust
	cost with ix86_tune_cost->br_mispredict_scale.
	* config/i386/i386.h (processor_costs): Add br_mispredict_scale.
	* config/i386/x86-tune-costs.h: Add new br_mispredict_scale to
	all processor_costs, in which icelake_cost/alderlake_cost
	with value COSTS_N_INSNS (2) + 3 and other processor with value
	COSTS_N_INSNS (2).

2025-01-07  Pan Li  <pan2.li@intel.com>

	* match.pd: Update comments for sat_* pattern.

2025-01-07  Pan Li  <pan2.li@intel.com>

	* match.pd: Extract saturated value match for signed SAT_*.

2025-01-07  Pan Li  <pan2.li@intel.com>

	* match.pd: Refactor sorts of signed SAT_TRUNC match patterns

2025-01-07  Pan Li  <pan2.li@intel.com>

	* match.pd: Refactor sorts of signed SAT_SUB match patterns.

2025-01-07  Vineet Gupta  <vineetg@rivosinc.com>
	    Pan Li  <pan2.li@intel.com>

	PR target/117722
	* config/riscv/autovec.md: Add uabd expander.

2025-01-07  Tsung Chun Lin  <tclin914@gmail.com>

	* expr.cc (widest_fixed_size_mode_for_size): Prefer scalar modes
	over vector modes in more cases.

2025-01-07  Andreas Schwab  <schwab@suse.de>

	PR target/118137
	* config/riscv/sync.md ("lrsc_atomic_exchange<mode>"): Apply mask
	to shifted value.

2025-01-07  Jeff Law  <jlaw@ventanamicro.com>

	* config/ft32/ft32.md (casesi expander): Force operands[2] into
	a register if it's not a suitable rimm operand.

2025-01-07  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* common/config/aarch64/aarch64-common.cc: Switch off fschedule_insns.

2025-01-07  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.md (movhf_aarch64): Use aarch64_valid_fp_move.
	(movsf_aarch64): Likewise.
	(movdf_aarch64): Likewise.
	* config/aarch64/aarch64.cc (aarch64_valid_fp_move): New function.
	* config/aarch64/aarch64-protos.h (aarch64_valid_fp_move): Likewise.

2025-01-07  Paul-Antoine Arras  <parras@baylibre.com>

	* gimplify.cc (gimplify_call_expr): Create variable
	variant_substituted_p to control whether adjust_args applies.

2025-01-07  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/114932
	* tree-ssa-loop-ivopts.cc (alloc_iv): Perform affine unsigned fold.

2025-01-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/105769
	* cfgexpand.cc (vars_ssa_cache::operator()): For constructors
	walk over the elements.

2025-01-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/117426
	PR middle-end/111422
	* cfgexpand.cc (struct vars_ssa_cache): New class.
	(vars_ssa_cache::vars_ssa_cache): New constructor.
	(vars_ssa_cache::~vars_ssa_cache): New deconstructor.
	(vars_ssa_cache::create): New method.
	(vars_ssa_cache::exists): New method.
	(vars_ssa_cache::add_one): New method.
	(vars_ssa_cache::update): New method.
	(vars_ssa_cache::dump): New method.
	(add_scope_conflicts_2): Factor mostly out to
	vars_ssa_cache::operator(). New cache argument.
	Walk the bitmap cache for the stack variables addresses.
	(vars_ssa_cache::operator()): New method factored out from
	add_scope_conflicts_2. Rewrite to be a full walk of all operands
	and use a worklist.
	(add_scope_conflicts_1): Add cache new argument for the addr cache.
	Just call add_scope_conflicts_2 for the phi result instead of calling
	for the uses and don't call walk_stmt_load_store_addr_ops for phis.
	Update call to add_scope_conflicts_2 to add cache argument.
	(add_scope_conflicts): Add cache argument and update calls to
	add_scope_conflicts_1.

2025-01-07  Andrew Pinski  <quic_apinski@quicinc.com>

	* cfgexpand.cc (INVALID_STACK_INDEX): New defined.
	(decl_stack_index): New function.
	(visit_op): Use decl_stack_index.
	(visit_conflict): Likewise.
	(add_scope_conflicts_1): Likewise.

2025-01-07  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/118298
	* loop-unroll.cc (decide_unroll_constant_iterations): Honor
	loop->unroll even if the loop is too big for heuristics.

2025-01-07  Deng Jianbo  <dengjianbo@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_output_move):
	Optimize instructions for initializing fp regsiter to zero.

2025-01-07  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/118010
	* doc/gm2.texi (Compiler options): New option
	-fm2-file-offset-bits=.

2025-01-07  Jennifer Schmitz  <jschmitz@nvidia.com>

	* tree-vect-stmts.cc (vectorizable_store): Extend the use of
	n_adjacent_stores to also cover vec_to_scalar operations.
	* config/aarch64/aarch64-tuning-flags.def: Remove
	use_new_vector_costs as tuning option.
	* config/aarch64/aarch64.cc (aarch64_use_new_vector_costs_p):
	Remove.
	(aarch64_vector_costs::add_stmt_cost): Remove use of
	aarch64_use_new_vector_costs_p.
	(aarch64_vector_costs::finish_cost): Remove use of
	aarch64_use_new_vector_costs_p.
	* config/aarch64/tuning_models/cortexx925.h: Remove
	AARCH64_EXTRA_TUNE_USE_NEW_VECTOR_COSTS.
	* config/aarch64/tuning_models/fujitsu_monaka.h: Likewise.
	* config/aarch64/tuning_models/generic_armv8_a.h: Likewise.
	* config/aarch64/tuning_models/generic_armv9_a.h: Likewise.
	* config/aarch64/tuning_models/neoverse512tvb.h: Likewise.
	* config/aarch64/tuning_models/neoversen2.h: Likewise.
	* config/aarch64/tuning_models/neoversen3.h: Likewise.
	* config/aarch64/tuning_models/neoversev1.h: Likewise.
	* config/aarch64/tuning_models/neoversev2.h: Likewise.
	* config/aarch64/tuning_models/neoversev3.h: Likewise.
	* config/aarch64/tuning_models/neoversev3ae.h: Likewise.

2025-01-06  Alexandre Oliva  <oliva@adacore.com>

	PR middle-end/118006
	* cfgexpand.cc (expand_gimple_basic_block): Do not emit
	pending stack adjustments after a barrier.

2025-01-06  Akram Ahmad  <Akram.Ahmad@arm.com>

	* config/aarch64/aarch64-simd.md: (*aarch64_trunc_concat)
	new insn definition.

2025-01-06  Fangrui Song  <maskray@gcc.gnu.org>

	PR gcov-profile/96092
	* coverage.cc (coverage_init): Remap getpwd().

2025-01-06  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve-builtins-base.cc
	(svmul_impl::fold): Wrap code for folding to svneg in lambda
	function and pass to gimple_folder::convert_and_fold to enable
	the transform for unsigned types.
	* config/aarch64/aarch64-sve-builtins.cc
	(gimple_folder::convert_and_fold): New function that converts
	operands to target type before calling callback function, adding the
	necessary conversion statements.
	(gimple_folder::redirect_call): Set fntype of redirected call.
	(get_vector_type): Move from here to aarch64-sve-builtins.h.
	* config/aarch64/aarch64-sve-builtins.h
	(gimple_folder::convert_and_fold): Declare function.
	(get_vector_type): Move here as inline function.

2025-01-06  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.cc (ipcp_print_widest_int): New function.
	(ipcp_store_vr_results): Use it.
	(ipcp_bits_lattice::print): Likewise.  Fix formatting.

2025-01-06  Mark Wielaard  <mark@klomp.org>

	PR tree-optimization/118032
	* tree-switch-conversion.cc (jump_table_cluster::find_jump_tables):
	Remove param_switch_lower_slow_alg_max_cases check.

2025-01-06  Tamar Christina  <tamar.christina@arm.com>

	PR target/96342
	PR target/118272
	* config/aarch64/aarch64-sve.md (vec_init<mode><Vquad>,
	vec_initvnx16qivnx2qi): New.
	* config/aarch64/aarch64.cc (aarch64_sve_expand_vector_init_subvector):
	Rewrite to support any arbitrary combinations.
	* config/aarch64/iterators.md (SVE_NO2E): Update to use SVE_NO4E
	(SVE_NO2E, Vquad): New.

2025-01-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/118224
	* tree-ssa-dce.cc (is_removable_allocation_p): Don't return true
	for allocations with constant size argument larger than PTRDIFF_MAX
	or for calloc with one of the arguments constant larger than
	PTRDIFF_MAX or their product known constant above PTRDIFF_MAX.
	Fix comment typos, furhter -> further and then -> than.
	* lto-section-in.cc (lto_free_function_in_decl_state_for_node):
	Fix comment typo, furhter -> further.

2025-01-04  Hans-Peter Nilsson  <hp@axis.com>

	* config/mmix/mmix.cc (mmix_asm_output_labelref): Replace '.'
	with '::'.
	* config/mmix/mmix.h (ASM_PN_FORMAT): Define to actual default.

2025-01-03  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/117938
	* rtlanal.cc (rtx_properties::try_to_add_dest): Treat writes
	to the stack pointer as also writing to memory.

2025-01-03  Jakub Jelinek  <jakub@redhat.com>

	PR c++/118275
	* varasm.cc (array_size_for_constructor): Use build_int_cst
	with TREE_TYPE (index) as first argument, instead of bitsize_int.

2025-01-03  Jakub Jelinek  <jakub@redhat.com>

	* tree-ssa-forwprop.cc (check_ctz_array): Use tree_fits_shwi_p instead
	of just TREE_CODE tests for INTEGER_CST.

2025-01-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config.gcc: install a wrapping stdint.h in bpf targets.

2025-01-02  Paul-Antoine Arras  <parras@baylibre.com>

	* gimplify.cc (gimplify_call_expr): Fix handling of need_device_ptr for
	type(c_ptr). Fix handling of nested function calls in a dispatch region.
	(find_ifn_gomp_dispatch): Return the IFN without stripping it.
	(gimplify_omp_dispatch): Keep IFN_GOMP_DISPATCH until
	gimplify_call_expr.

2025-01-02  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (amdgcn-x-amdhsa): Refer to Newlib 4.5.0 for
	the I/O locking fixes.

2025-01-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/118171
	* tree-ssa-pre.cc (create_component_ref_by_pieces_1): Do not
	fold any component ref parts.

2025-01-02  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/118184
	* config/aarch64/aarch64-early-ra.cc (allocno_assignment_is_rmw):
	New function.
	(early_ra::record_insn_defs): Mark the live range information as
	untrustworthy if an assignment would change part of an allocno
	but preserve the rest.

2025-01-02  Jakub Jelinek  <jakub@redhat.com>

	* tree-ssa-forwprop.cc (check_ctz_array): Handle also RAW_DATA_CST
	in the CONSTRUCTOR_ELTS.

2025-01-02  Jakub Jelinek  <jakub@redhat.com>

	* doc/libgdiagnostics/conf.py: Use u'' instead of '' in
	project and copyright initialization.

2025-01-02  Jakub Jelinek  <jakub@redhat.com>

	* gcc.cc (process_command): Update copyright notice dates.
	* gcov-dump.cc (print_version): Ditto.
	* gcov.cc (print_version): Ditto.
	* gcov-tool.cc (print_version): Ditto.
	* gengtype.cc (create_file): Ditto.
	* doc/cpp.texi: Bump @copying's copyright year.
	* doc/cppinternals.texi: Ditto.
	* doc/gcc.texi: Ditto.
	* doc/gccint.texi: Ditto.
	* doc/gcov.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/loongarch.cc
	(loongarch_expand_conditional_move): Add some optimization
	implementations based on noce_try_cmove_arith.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/lasx.md (lasx_xvabsd_s_<lasxfmt>): Remove.
	(<su>abd<mode>3): New insn pattern.
	(lasx_xvabsd_u_<lasxfmt_u>): Remove.
	* config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vabsd_b):
	Rename.
	(CODE_FOR_lsx_vabsd_h): Ditto.
	(CODE_FOR_lsx_vabsd_w): Ditto.
	(CODE_FOR_lsx_vabsd_d): Ditto.
	(CODE_FOR_lsx_vabsd_bu): Ditto.
	(CODE_FOR_lsx_vabsd_hu): Ditto.
	(CODE_FOR_lsx_vabsd_wu): Ditto.
	(CODE_FOR_lsx_vabsd_du): Ditto.
	(CODE_FOR_lasx_xvabsd_b): Ditto.
	(CODE_FOR_lasx_xvabsd_h): Ditto.
	(CODE_FOR_lasx_xvabsd_w): Ditto.
	(CODE_FOR_lasx_xvabsd_d): Ditto.
	(CODE_FOR_lasx_xvabsd_bu): Ditto.
	(CODE_FOR_lasx_xvabsd_hu): Ditto.
	(CODE_FOR_lasx_xvabsd_wu): Ditto.
	(CODE_FOR_lasx_xvabsd_du): Ditto.
	* config/loongarch/loongarch.md (u): Add smax/umax.
	* config/loongarch/lsx.md (SU_MAX): New iterator.
	(su_min): New attr.
	(lsx_vabsd_s_<lsxfmt>): Remove.
	(<su>abd<mode>3): New insn pattern.
	(lsx_vabsd_u_<lsxfmt_u>): Remove.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/lasx.md (vec_unpacks_lo_<mode>): Redefine.
	(vec_unpacku_lo_<mode>): Ditto.
	(lasx_vext2xv_h<u>_b<u>): Replaced by vec_unpack<su>_lo_v32qi.
	(vec_unpack<su>_lo_v32qi): New insn.
	(lasx_vext2xv_w<u>_h<u>): Replaced by vec_unpack<su>_lo_v16hi.
	(vec_unpack<su>_lo_v16qi_internal): New insn, for 128 bits.
	(vec_unpack<su>_lo_v16hi): New insn.
	(lasx_vext2xv_d<u>_w<u>): Replaced by vec_unpack<su>_lo_v8si.
	(vec_unpack<su>_lo_v8hi_internal): New insn, for 128 bits.
	(vec_unpack<su>_lo_v8si): New insn.
	(vec_unpack<su>_lo_v4si_internal): New insn, for 128 bits.
	(vec_packs_float_v4di): New expander.
	(vec_pack_sfix_trunc_v4df): Ditto.
	(vec_unpacks_float_hi_v8si): Ditto.
	(vec_unpacks_float_lo_v8si): Ditto.
	(vec_unpack_sfix_trunc_hi_v8sf): Ditto.
	(vec_unpack_sfix_trunc_lo_v8sf): Ditto.
	* config/loongarch/loongarch-builtins.cc
	(CODE_FOR_lsx_vftintrz_w_d): Rename.
	(CODE_FOR_lsx_vftintrzh_l_s): Ditto.
	(CODE_FOR_lsx_vftintrzl_l_s): Ditto.
	(CODE_FOR_lsx_vffint_s_l): Ditto.
	(CODE_FOR_lsx_vffinth_d_w): Ditto.
	(CODE_FOR_lsx_vffintl_d_w): Ditto.
	(CODE_FOR_lsx_vexth_h_b): Ditto.
	(CODE_FOR_lsx_vexth_w_h): Ditto.
	(CODE_FOR_lsx_vexth_d_w): Ditto.
	(CODE_FOR_lsx_vexth_hu_bu): Ditto.
	(CODE_FOR_lsx_vexth_wu_hu): Ditto.
	(CODE_FOR_lsx_vexth_du_wu): Ditto.
	(CODE_FOR_lsx_vfcvth_d_s): Ditto.
	(CODE_FOR_lsx_vfcvtl_d_s): Ditto.
	(CODE_FOR_lasx_vext2xv_h_b): Ditto.
	(CODE_FOR_lasx_vext2xv_w_h): Ditto.
	(CODE_FOR_lasx_vext2xv_d_w): Ditto.
	(CODE_FOR_lasx_vext2xv_hu_bu): Ditto.
	(CODE_FOR_lasx_vext2xv_wu_hu): Ditto.
	(CODE_FOR_lasx_vext2xv_du_wu): Ditto.
	(loongarch_expand_builtin_insn): Swap source operands in
	CODE_FOR_lsx_vftintrz_w_d and CODE_FOR_lsx_vffint_s_l.
	* config/loongarch/loongarch-protos.h
	(loongarch_expand_vec_unpack): Remove useless parameter high_p.
	* config/loongarch/loongarch.cc (loongarch_expand_vec_unpack):
	Rewrite.
	* config/loongarch/lsx.md (vec_unpacks_hi_v4sf): Redefine.
	(vec_unpacks_lo_v4sf): Ditto.
	(vec_unpacks_hi_<mode>): Ditto.
	(vec_unpacku_hi_<mode>): Ditto.
	(lsx_vfcvth_d_s): Replaced by vec_unpacks_hi_v4sf.
	(lsx_vfcvtl_d_s): Replaced by vec_unpacks_lo_v4sf.
	(lsx_vffint_s_l): Replaced by vec_packs_float_v2di.
	(vec_packs_float_v2di): New insn.
	(lsx_vftintrz_w_d): Replaced by vec_pack_sfix_trunc_v2df.
	(vec_pack_sfix_trunc_v2df): New insn.
	(lsx_vffinth_d_w): Replaced by vec_unpacks_float_hi_v4si.
	(vec_unpacks_float_hi_v4si): New insn.
	(lsx_vffintl_d_w): Replaced by vec_unpacks_float_lo_v4si.
	(vec_unpacks_float_lo_v4si): New insn.
	(lsx_vftintrzh_l_s): Replaced by vec_unpack_sfix_trunc_hi_v4sf.
	(vec_unpack_sfix_trunc_hi_v4sf): New insn.
	(lsx_vftintrzl_l_s): Replaced by vec_unpack_sfix_trunc_lo_v4sf.
	(vec_unpack_sfix_trunc_lo_v4sf): New insn.
	(lsx_vexth_h<u>_b<u>): Replaced by vec_unpack<su>_hi_v16qi.
	(vec_unpack<su>_hi_v16qi): New insn.
	(lsx_vexth_w<u>_h<u>): Replaced by vec_unpack<su>_hi_v8hi.
	(vec_unpack<su>_hi_v8hi): New insn.
	(lsx_vexth_d<u>_w<u>): Replaced by vec_unpack<su>_hi_v4si.
	(vec_unpack<su>_hi_v4si): New insn.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/loongarch.md
	(bytepick_d_<bytepick_imm>_rev): New combiner.
	(bstrpick_alsl_paired): Reorder input operands.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/lasx.md: Remove useless vec_select.
	* config/loongarch/predicates.md: Correct error predicate.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/lasx.md: Fix selector index.

2025-01-02  Guo Jie  <guojie@loongson.cn>

	* config/loongarch/lasx.md: Remove useless code.
	* config/loongarch/lsx.md: Ditto.

2025-01-01  Sam James  <sam@gentoo.org>

	* doc/cpp.texi (Common Predefined Macros): Fix syntax.

2025-01-01  Richard Biener  <rguenther@suse.de>

	PR middle-end/118174
	* tree-outof-ssa.cc (ssa_is_replaceable_p): Exclude tailcalls.

2025-01-01  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/invoke.texi (Option Summary): Put "M32C Options" and
	"Cygwin and MinGW Options" in alphabetical order.  Add
	cross-references.
	(Cygwin and MinGW Options): Likewise move the section to its
	correct alphabetical location.
	* config/lynx.opt.urls: Regenerated.
	* config/mingw/cygming.opt.urls: Regenerated.

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