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* gcc: (gcc).                  The GNU Compiler Collection.
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   This file documents the use and the internals of the GNU compiler.


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File: gcc.info,  Node: RS/6000 and PowerPC Options,  Next: RT Options,  Prev: M88K Options,  Up: Submodel Options

IBM RS/6000 and PowerPC Options
-------------------------------

   These `-m' options are defined for the IBM RS/6000 and PowerPC:
`-mpower'
`-mno-power'
`-mpower2'
`-mno-power2'
`-mpowerpc'
`-mno-powerpc'
`-mpowerpc-gpopt'
`-mno-powerpc-gpopt'
`-mpowerpc-gfxopt'
`-mno-powerpc-gfxopt'
`-mpowerpc64'
`-mno-powerpc64'
     GCC supports two related instruction set architectures for the
     RS/6000 and PowerPC.  The "POWER" instruction set are those
     instructions supported by the `rios' chip set used in the original
     RS/6000 systems and the "PowerPC" instruction set is the
     architecture of the Motorola MPC5xx, MPC6xx, MPC8xx
     microprocessors, and the IBM 4xx microprocessors.

     Neither architecture is a subset of the other.  However there is a
     large common subset of instructions supported by both.  An MQ
     register is included in processors supporting the POWER
     architecture.

     You use these options to specify which instructions are available
     on the processor you are using.  The default value of these
     options is determined when configuring GCC.  Specifying the
     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
     recommend you use the `-mcpu=CPU_TYPE' option rather than the
     options listed above.

     The `-mpower' option allows GCC to generate instructions that are
     found only in the POWER architecture and to use the MQ register.
     Specifying `-mpower2' implies `-power' and also allows GCC to
     generate instructions that are present in the POWER2 architecture
     but not the original POWER architecture.

     The `-mpowerpc' option allows GCC to generate instructions that
     are found only in the 32-bit subset of the PowerPC architecture.
     Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows
     GCC to use the optional PowerPC architecture instructions in the
     General Purpose group, including floating-point square root.
     Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows
     GCC to use the optional PowerPC architecture instructions in the
     Graphics group, including floating-point select.

     The `-mpowerpc64' option allows GCC to generate the additional
     64-bit instructions that are found in the full PowerPC64
     architecture and to treat GPRs as 64-bit, doubleword quantities.
     GCC defaults to `-mno-powerpc64'.

     If you specify both `-mno-power' and `-mno-powerpc', GCC will use
     only the instructions in the common subset of both architectures
     plus some special AIX common-mode calls, and will not use the MQ
     register.  Specifying both `-mpower' and `-mpowerpc' permits GCC
     to use any instruction from either architecture and to allow use
     of the MQ register; specify this for the Motorola MPC601.

`-mnew-mnemonics'
`-mold-mnemonics'
     Select which mnemonics to use in the generated assembler code.
     `-mnew-mnemonics' requests output that uses the assembler mnemonics
     defined for the PowerPC architecture, while `-mold-mnemonics'
     requests the assembler mnemonics defined for the POWER
     architecture.  Instructions defined in only one architecture have
     only one mnemonic; GCC uses that mnemonic irrespective of which of
     these options is specified.

     GCC defaults to the mnemonics appropriate for the architecture in
     use.  Specifying `-mcpu=CPU_TYPE' sometimes overrides the value of
     these option.  Unless you are building a cross-compiler, you
     should normally not specify either `-mnew-mnemonics' or
     `-mold-mnemonics', but should instead accept the default.

`-mcpu=CPU_TYPE'
     Set architecture type, register usage, choice of mnemonics, and
     instruction scheduling parameters for machine type CPU_TYPE.
     Supported values for CPU_TYPE are `rios', `rios1', `rsc', `rios2',
     `rs64a', `601', `602', `603', `603e', `604', `604e', `620', `630',
     `740', `750', `power', `power2', `powerpc', `403', `505', `801',
     `821', `823', and `860' and `common'.  `-mcpu=power',
     `-mcpu=power2', `-mcpu=powerpc', and `-mcpu=powerpc64' specify
     generic POWER, POWER2, pure 32-bit PowerPC (i.e., not MPC601), and
     64-bit PowerPC architecture machine types, with an appropriate,
     generic processor model assumed for scheduling purposes.

     Specifying any of the following options: `-mcpu=rios1',
     `-mcpu=rios2', `-mcpu=rsc', `-mcpu=power', or `-mcpu=power2'
     enables the `-mpower' option and disables the `-mpowerpc' option;
     `-mcpu=601' enables both the `-mpower' and `-mpowerpc' options.
     All of `-mcpu=rs64a', `-mcpu=602', `-mcpu=603', `-mcpu=603e',
     `-mcpu=604', `-mcpu=620', `-mcpu=630', `-mcpu=740', and `-mcpu=750'
     enable the `-mpowerpc' option and disable the `-mpower' option.
     Exactly similarly, all of `-mcpu=403', `-mcpu=505', `-mcpu=821',
     `-mcpu=860' and `-mcpu=powerpc' enable the `-mpowerpc' option and
     disable the `-mpower' option.  `-mcpu=common' disables both the
     `-mpower' and `-mpowerpc' options.

     AIX versions 4 or greater selects `-mcpu=common' by default, so
     that code will operate on all members of the RS/6000 POWER and
     PowerPC families.  In that case, GCC will use only the
     instructions in the common subset of both architectures plus some
     special AIX common-mode calls, and will not use the MQ register.
     GCC assumes a generic processor model for scheduling purposes.

     Specifying any of the options `-mcpu=rios1', `-mcpu=rios2',
     `-mcpu=rsc', `-mcpu=power', or `-mcpu=power2' also disables the
     `new-mnemonics' option.  Specifying `-mcpu=601', `-mcpu=602',
     `-mcpu=603', `-mcpu=603e', `-mcpu=604', `-mcpu=620', `-mcpu=630',
     `-mcpu=403', `-mcpu=505', `-mcpu=821', `-mcpu=860' or
     `-mcpu=powerpc' also enables the `new-mnemonics' option.

     Specifying `-mcpu=403', `-mcpu=821', or `-mcpu=860' also enables
     the `-msoft-float' option.

`-mtune=CPU_TYPE'
     Set the instruction scheduling parameters for machine type
     CPU_TYPE, but do not set the architecture type, register usage,
     choice of mnemonics like `-mcpu=CPU_TYPE' would.  The same values
     for CPU_TYPE are used for `-mtune=CPU_TYPE' as for
     `-mcpu=CPU_TYPE'.  The `-mtune=CPU_TYPE' option overrides the
     `-mcpu=CPU_TYPE' option in terms of instruction scheduling
     parameters.

`-mfull-toc'
`-mno-fp-in-toc'
`-mno-sum-in-toc'
`-mminimal-toc'
     Modify generation of the TOC (Table Of Contents), which is created
     for every executable file.  The `-mfull-toc' option is selected by
     default.  In that case, GCC will allocate at least one TOC entry
     for each unique non-automatic variable reference in your program.
     GCC will also place floating-point constants in the TOC.  However,
     only 16,384 entries are available in the TOC.

     If you receive a linker error message that saying you have
     overflowed the available TOC space, you can reduce the amount of
     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
     options.  `-mno-fp-in-toc' prevents GCC from putting floating-point
     constants in the TOC and `-mno-sum-in-toc' forces GCC to generate
     code to calculate the sum of an address and a constant at run-time
     instead of putting that sum into the TOC.  You may specify one or
     both of these options.  Each causes GCC to produce very slightly
     slower and larger code at the expense of conserving TOC space.

     If you still run out of space in the TOC even when you specify
     both of these options, specify `-mminimal-toc' instead.  This
     option causes GCC to make only one TOC entry for every file.  When
     you specify this option, GCC will produce code that is slower and
     larger but which uses extremely little TOC space.  You may wish to
     use this option only on files that contain less frequently
     executed code.

`-maix64'
`-maix32'
     Enable 64-bit AIX ABI and calling convention: 64-bit pointers,
     64-bit `long' type, and the infrastructure needed to support them.
     Specifying `-maix64' implies `-mpowerpc64' and `-mpowerpc', while
     `-maix32' disables the 64-bit ABI and implies `-mno-powerpc64'.
     GCC defaults to `-maix32'.

`-mxl-call'
`-mno-xl-call'
     On AIX, pass floating-point arguments to prototyped functions
     beyond the register save area (RSA) on the stack in addition to
     argument FPRs.  The AIX calling convention was extended but not
     initially documented to handle an obscure K&R C case of calling a
     function that takes the address of its arguments with fewer
     arguments than declared.  AIX XL compilers access floating point
     arguments which do not fit in the RSA from the stack when a
     subroutine is compiled without optimization.  Because always
     storing floating-point arguments on the stack is inefficient and
     rarely needed, this option is not enabled by default and only is
     necessary when calling subroutines compiled by AIX XL compilers
     without optimization.

`-mthreads'
     Support "AIX Threads".  Link an application written to use
     "pthreads" with special libraries and startup code to enable the
     application to run.

`-mpe'
     Support "IBM RS/6000 SP" "Parallel Environment" (PE).  Link an
     application written to use message passing with special startup
     code to enable the application to run.  The system must have PE
     installed in the standard location (`/usr/lpp/ppe.poe/'), or the
     `specs' file must be overridden with the `-specs=' option to
     specify the appropriate directory location.  The Parallel
     Environment does not support threads, so the `-mpe' option and the
     `-mthreads' option are incompatible.

`-msoft-float'
`-mhard-float'
     Generate code that does not use (uses) the floating-point register
     set.  Software floating point emulation is provided if you use the
     `-msoft-float' option, and pass the option to GCC when linking.

`-mmultiple'
`-mno-multiple'
     Generate code that uses (does not use) the load multiple word
     instructions and the store multiple word instructions.  These
     instructions are generated by default on POWER systems, and not
     generated on PowerPC systems.  Do not use `-mmultiple' on little
     endian PowerPC systems, since those instructions do not work when
     the processor is in little endian mode.  The exceptions are PPC740
     and PPC750 which permit the instructions usage in little endian
     mode.

`-mstring'
`-mno-string'
     Generate code that uses (does not use) the load string instructions
     and the store string word instructions to save multiple registers
     and do small block moves.  These instructions are generated by
     default on POWER systems, and not generated on PowerPC systems.
     Do not use `-mstring' on little endian PowerPC systems, since those
     instructions do not work when the processor is in little endian
     mode.  The exceptions are PPC740 and PPC750 which permit the
     instructions usage in little endian mode.

`-mupdate'
`-mno-update'
     Generate code that uses (does not use) the load or store
     instructions that update the base register to the address of the
     calculated memory location.  These instructions are generated by
     default.  If you use `-mno-update', there is a small window
     between the time that the stack pointer is updated and the address
     of the previous frame is stored, which means code that walks the
     stack frame across interrupts or signals may get corrupted data.

`-mfused-madd'
`-mno-fused-madd'
     Generate code that uses (does not use) the floating point multiply
     and accumulate instructions.  These instructions are generated by
     default if hardware floating is used.

`-mno-bit-align'
`-mbit-align'
     On System V.4 and embedded PowerPC systems do not (do) force
     structures and unions that contain bit-fields to be aligned to the
     base type of the bit-field.

     For example, by default a structure containing nothing but 8
     `unsigned' bit-fields of length 1 would be aligned to a 4 byte
     boundary and have a size of 4 bytes.  By using `-mno-bit-align',
     the structure would be aligned to a 1 byte boundary and be one
     byte in size.

`-mno-strict-align'
`-mstrict-align'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     unaligned memory references will be handled by the system.

`-mrelocatable'
`-mno-relocatable'
     On embedded PowerPC systems generate code that allows (does not
     allow) the program to be relocated to a different address at
     runtime.  If you use `-mrelocatable' on any module, all objects
     linked together must be compiled with `-mrelocatable' or
     `-mrelocatable-lib'.

`-mrelocatable-lib'
`-mno-relocatable-lib'
     On embedded PowerPC systems generate code that allows (does not
     allow) the program to be relocated to a different address at
     runtime.  Modules compiled with `-mrelocatable-lib' can be linked
     with either modules compiled without `-mrelocatable' and
     `-mrelocatable-lib' or with modules compiled with the
     `-mrelocatable' options.

`-mno-toc'
`-mtoc'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     register 2 contains a pointer to a global area pointing to the
     addresses used in the program.

`-mlittle'
`-mlittle-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in little endian mode.  The `-mlittle-endian' option is
     the same as `-mlittle'.

`-mbig'
`-mbig-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in big endian mode.  The `-mbig-endian' option is the
     same as `-mbig'.

`-mcall-sysv'
     On System V.4 and embedded PowerPC systems compile code using
     calling conventions that adheres to the March 1995 draft of the
     System V Application Binary Interface, PowerPC processor
     supplement.  This is the default unless you configured GCC using
     `powerpc-*-eabiaix'.

`-mcall-sysv-eabi'
     Specify both `-mcall-sysv' and `-meabi' options.

`-mcall-sysv-noeabi'
     Specify both `-mcall-sysv' and `-mno-eabi' options.

`-mcall-aix'
     On System V.4 and embedded PowerPC systems compile code using
     calling conventions that are similar to those used on AIX.  This
     is the default if you configured GCC using `powerpc-*-eabiaix'.

`-mcall-solaris'
     On System V.4 and embedded PowerPC systems compile code for the
     Solaris operating system.

`-mcall-linux'
     On System V.4 and embedded PowerPC systems compile code for the
     Linux-based GNU system.

`-mprototype'
`-mno-prototype'
     On System V.4 and embedded PowerPC systems assume that all calls to
     variable argument functions are properly prototyped.  Otherwise,
     the compiler must insert an instruction before every non
     prototyped call to set or clear bit 6 of the condition code
     register (CR) to indicate whether floating point values were
     passed in the floating point registers in case the function takes
     a variable arguments.  With `-mprototype', only calls to
     prototyped variable argument functions will set or clear the bit.

`-msim'
     On embedded PowerPC systems, assume that the startup module is
     called `sim-crt0.o' and that the standard C libraries are
     `libsim.a' and `libc.a'.  This is the default for
     `powerpc-*-eabisim'.  configurations.

`-mmvme'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libmvme.a' and
     `libc.a'.

`-mads'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libads.a' and
     `libc.a'.

`-myellowknife'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libyk.a' and
     `libc.a'.

`-mvxworks'
     On System V.4 and embedded PowerPC systems, specify that you are
     compiling for a VxWorks system.

`-memb'
     On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags
     header to indicate that `eabi' extended relocations are used.

`-meabi'
`-mno-eabi'
     On System V.4 and embedded PowerPC systems do (do not) adhere to
     the Embedded Applications Binary Interface (eabi) which is a set of
     modifications to the System V.4 specifications.  Selecting `-meabi'
     means that the stack is aligned to an 8 byte boundary, a function
     `__eabi' is called to from `main' to set up the eabi environment,
     and the `-msdata' option can use both `r2' and `r13' to point to
     two separate small data areas.  Selecting `-mno-eabi' means that
     the stack is aligned to a 16 byte boundary, do not call an
     initialization function from `main', and the `-msdata' option will
     only use `r13' to point to a single small data area.  The `-meabi'
     option is on by default if you configured GCC using one of the
     `powerpc*-*-eabi*' options.

`-msdata=eabi'
     On System V.4 and embedded PowerPC systems, put small initialized
     `const' global and static data in the `.sdata2' section, which is
     pointed to by register `r2'.  Put small initialized non-`const'
     global and static data in the `.sdata' section, which is pointed
     to by register `r13'.  Put small uninitialized global and static
     data in the `.sbss' section, which is adjacent to the `.sdata'
     section.  The `-msdata=eabi' option is incompatible with the
     `-mrelocatable' option.  The `-msdata=eabi' option also sets the
     `-memb' option.

`-msdata=sysv'
     On System V.4 and embedded PowerPC systems, put small global and
     static data in the `.sdata' section, which is pointed to by
     register `r13'.  Put small uninitialized global and static data in
     the `.sbss' section, which is adjacent to the `.sdata' section.
     The `-msdata=sysv' option is incompatible with the `-mrelocatable'
     option.

`-msdata=default'
`-msdata'
     On System V.4 and embedded PowerPC systems, if `-meabi' is used,
     compile code the same as `-msdata=eabi', otherwise compile code the
     same as `-msdata=sysv'.

`-msdata-data'
     On System V.4 and embedded PowerPC systems, put small global and
     static data in the `.sdata' section.  Put small uninitialized
     global and static data in the `.sbss' section.  Do not use
     register `r13' to address small data however.  This is the default
     behavior unless other `-msdata' options are used.

`-msdata=none'
`-mno-sdata'
     On embedded PowerPC systems, put all initialized global and static
     data in the `.data' section, and all uninitialized data in the
     `.bss' section.

`-G NUM'
     On embedded PowerPC systems, put global and static items less than
     or equal to NUM bytes into the small data or bss sections instead
     of the normal data or bss section.  By default, NUM is 8.  The `-G
     NUM' switch is also passed to the linker.  All modules should be
     compiled with the same `-G NUM' value.

`-mregnames'
`-mno-regnames'
     On System V.4 and embedded PowerPC systems do (do not) emit
     register names in the assembly language output using symbolic
     forms.


File: gcc.info,  Node: RT Options,  Next: MIPS Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options

IBM RT Options
--------------

   These `-m' options are defined for the IBM RT PC:

`-min-line-mul'
     Use an in-line code sequence for integer multiplies.  This is the
     default.

`-mcall-lib-mul'
     Call `lmul$$' for integer multiples.

`-mfull-fp-blocks'
     Generate full-size floating point data blocks, including the
     minimum amount of scratch space recommended by IBM.  This is the
     default.

`-mminimum-fp-blocks'
     Do not include extra scratch space in floating point data blocks.
     This results in smaller code, but slower execution, since scratch
     space must be allocated dynamically.

`-mfp-arg-in-fpregs'
     Use a calling sequence incompatible with the IBM calling
     convention in which floating point arguments are passed in
     floating point registers.  Note that `varargs.h' and `stdarg.h'
     will not work with floating point operands if this option is
     specified.

`-mfp-arg-in-gregs'
     Use the normal calling convention for floating point arguments.
     This is the default.

`-mhc-struct-return'
     Return structures of more than one word in memory, rather than in a
     register.  This provides compatibility with the MetaWare HighC (hc)
     compiler.  Use the option `-fpcc-struct-return' for compatibility
     with the Portable C Compiler (pcc).

`-mnohc-struct-return'
     Return some structures of more than one word in registers, when
     convenient.  This is the default.  For compatibility with the
     IBM-supplied compilers, use the option `-fpcc-struct-return' or the
     option `-mhc-struct-return'.


File: gcc.info,  Node: MIPS Options,  Next: i386 Options,  Prev: RT Options,  Up: Submodel Options

MIPS Options
------------

   These `-m' options are defined for the MIPS family of computers:

`-mcpu=CPU-TYPE'
     Assume the defaults for the machine type CPU-TYPE when scheduling
     instructions.  The choices for CPU-TYPE are `r2000', `r3000',
     `r3900', `r4000', `r4100', `r4300', `r4400', `r4600', `r4650',
     `r5000', `r6000', `r8000', and `orion'.  Additionally, the
     `r2000', `r3000', `r4000', `r5000', and `r6000' can be abbreviated
     as `r2k' (or `r2K'), `r3k', etc.  While picking a specific
     CPU-TYPE will schedule things appropriately for that particular
     chip, the compiler will not generate any code that does not meet
     level 1 of the MIPS ISA (instruction set architecture) without a
     `-mipsX' or `-mabi' switch being used.

`-mips1'
     Issue instructions from level 1 of the MIPS ISA.  This is the
     default.  `r3000' is the default CPU-TYPE at this ISA level.

`-mips2'
     Issue instructions from level 2 of the MIPS ISA (branch likely,
     square root instructions).  `r6000' is the default CPU-TYPE at this
     ISA level.

`-mips3'
     Issue instructions from level 3 of the MIPS ISA (64-bit
     instructions).  `r4000' is the default CPU-TYPE at this ISA level.

`-mips4'
     Issue instructions from level 4 of the MIPS ISA (conditional move,
     prefetch, enhanced FPU instructions).  `r8000' is the default
     CPU-TYPE at this ISA level.

`-mfp32'
     Assume that 32 32-bit floating point registers are available.
     This is the default.

`-mfp64'
     Assume that 32 64-bit floating point registers are available.
     This is the default when the `-mips3' option is used.

`-mgp32'
     Assume that 32 32-bit general purpose registers are available.
     This is the default.

`-mgp64'
     Assume that 32 64-bit general purpose registers are available.
     This is the default when the `-mips3' option is used.

`-mint64'
     Force int and long types to be 64 bits wide.  See `-mlong32' for an
     explanation of the default, and the width of pointers.

`-mlong64'
     Force long types to be 64 bits wide.  See `-mlong32' for an
     explanation of the default, and the width of pointers.

`-mlong32'
     Force long, int, and pointer types to be 32 bits wide.

     If none of `-mlong32', `-mlong64', or `-mint64' are set, the size
     of ints, longs, and pointers depends on the ABI and ISA chosen.
     For `-mabi=32', and `-mabi=n32', ints and longs are 32 bits wide.
     For `-mabi=64', ints are 32 bits, and longs are 64 bits wide.  For
     `-mabi=eabi' and either `-mips1' or `-mips2', ints and longs are
     32 bits wide.  For `-mabi=eabi' and higher ISAs, ints are 32 bits,
     and longs are 64 bits wide.  The width of pointer types is the
     smaller of the width of longs or the width of general purpose
     registers (which in turn depends on the ISA).

`-mabi=32'
`-mabi=o64'
`-mabi=n32'
`-mabi=64'
`-mabi=eabi'
     Generate code for the indicated ABI.  The default instruction
     level is `-mips1' for `32', `-mips3' for `n32', and `-mips4'
     otherwise.  Conversely, with `-mips1' or `-mips2', the default ABI
     is `32'; otherwise, the default ABI is `64'.

`-mmips-as'
     Generate code for the MIPS assembler, and invoke `mips-tfile' to
     add normal debug information.  This is the default for all
     platforms except for the OSF/1 reference platform, using the
     OSF/rose object format.  If the either of the `-gstabs' or
     `-gstabs+' switches are used, the `mips-tfile' program will
     encapsulate the stabs within MIPS ECOFF.

`-mgas'
     Generate code for the GNU assembler.  This is the default on the
     OSF/1 reference platform, using the OSF/rose object format.  Also,
     this is the default if the configure option `--with-gnu-as' is
     used.

`-msplit-addresses'
`-mno-split-addresses'
     Generate code to load the high and low parts of address constants
     separately.  This allows GCC to optimize away redundant loads of
     the high order bits of addresses.  This optimization requires GNU
     as and GNU ld.  This optimization is enabled by default for some
     embedded targets where GNU as and GNU ld are standard.

`-mrnames'
`-mno-rnames'
     The `-mrnames' switch says to output code using the MIPS software
     names for the registers, instead of the hardware names (ie, A0
     instead of $4).  The only known assembler that supports this option
     is the Algorithmics assembler.

`-mgpopt'
`-mno-gpopt'
     The `-mgpopt' switch says to write all of the data declarations
     before the instructions in the text section, this allows the MIPS
     assembler to generate one word memory references instead of using
     two words for short global or static data items.  This is on by
     default if optimization is selected.

`-mstats'
`-mno-stats'
     For each non-inline function processed, the `-mstats' switch
     causes the compiler to emit one line to the standard error file to
     print statistics about the program (number of registers saved,
     stack size, etc.).

`-mmemcpy'
`-mno-memcpy'
     The `-mmemcpy' switch makes all block moves call the appropriate
     string function (`memcpy' or `bcopy') instead of possibly
     generating inline code.

`-mmips-tfile'
`-mno-mips-tfile'
     The `-mno-mips-tfile' switch causes the compiler not postprocess
     the object file with the `mips-tfile' program, after the MIPS
     assembler has generated it to add debug support.  If `mips-tfile'
     is not run, then no local variables will be available to the
     debugger.  In addition, `stage2' and `stage3' objects will have
     the temporary file names passed to the assembler embedded in the
     object file, which means the objects will not compare the same.
     The `-mno-mips-tfile' switch should only be used when there are
     bugs in the `mips-tfile' program that prevents compilation.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GCC.  Normally
     the facilities of the machine's usual C compiler are used, but
     this can't be done directly in cross-compilation.  You must make
     your own arrangements to provide suitable library functions for
     cross-compilation.

`-mhard-float'
     Generate output containing floating point instructions.  This is
     the default if you use the unmodified sources.

`-mabicalls'
`-mno-abicalls'
     Emit (or do not emit) the pseudo operations `.abicalls',
     `.cpload', and `.cprestore' that some System V.4 ports use for
     position independent code.

`-mlong-calls'
`-mno-long-calls'
     Do all calls with the `JALR' instruction, which requires loading
     up a function's address into a register before the call.  You need
     to use this switch, if you call outside of the current 512
     megabyte segment to functions that are not through pointers.

`-mhalf-pic'
`-mno-half-pic'
     Put pointers to extern references into the data section and load
     them up, rather than put the references in the text section.

`-membedded-pic'
`-mno-embedded-pic'
     Generate PIC code suitable for some embedded systems.  All calls
     are made using PC relative address, and all data is addressed
     using the $gp register.  No more than 65536 bytes of global data
     may be used.  This requires GNU as and GNU ld which do most of the
     work.  This currently only works on targets which use ECOFF; it
     does not work with ELF.

`-membedded-data'
`-mno-embedded-data'
     Allocate variables to the read-only data section first if
     possible, then next in the small data section if possible,
     otherwise in data.  This gives slightly slower code than the
     default, but reduces the amount of RAM required when executing,
     and thus may be preferred for some embedded systems.

`-muninit-const-in-rodata'
`-mno-uninit-const-in-rodata'
     When used together with `-membedded-data', it will always store
     uninitialized const variables in the read-only data section.

`-msingle-float'
`-mdouble-float'
     The `-msingle-float' switch tells gcc to assume that the floating
     point coprocessor only supports single precision operations, as on
     the `r4650' chip.  The `-mdouble-float' switch permits gcc to use
     double precision operations.  This is the default.

`-mmad'
`-mno-mad'
     Permit use of the `mad', `madu' and `mul' instructions, as on the
     `r4650' chip.

`-m4650'
     Turns on `-msingle-float', `-mmad', and, at least for now,
     `-mcpu=r4650'.

`-mips16'
`-mno-mips16'
     Enable 16-bit instructions.

`-mentry'
     Use the entry and exit pseudo ops.  This option can only be used
     with `-mips16'.

`-EL'
     Compile code for the processor in little endian mode.  The
     requisite libraries are assumed to exist.

`-EB'
     Compile code for the processor in big endian mode.  The requisite
     libraries are assumed to exist.

`-G NUM'
     Put global and static items less than or equal to NUM bytes into
     the small data or bss sections instead of the normal data or bss
     section.  This allows the assembler to emit one word memory
     reference instructions based on the global pointer (GP or $28),
     instead of the normal two words used.  By default, NUM is 8 when
     the MIPS assembler is used, and 0 when the GNU assembler is used.
     The `-G NUM' switch is also passed to the assembler and linker.
     All modules should be compiled with the same `-G NUM' value.

`-nocpp'
     Tell the MIPS assembler to not run its preprocessor over user
     assembler files (with a `.s' suffix) when assembling them.

`-mfix7000'
     Pass an option to gas which will cause nops to be inserted if the
     read of the destination register of an mfhi or mflo instruction
     occurs in the following two instructions.

`-no-crt0'
     Do not include the default crt0.

   These options are defined by the macro `TARGET_SWITCHES' in the
machine description.  The default for the options is also defined by
that macro, which enables you to change the defaults.


File: gcc.info,  Node: i386 Options,  Next: HPPA Options,  Prev: MIPS Options,  Up: Submodel Options

Intel 386 Options
-----------------

   These `-m' options are defined for the i386 family of computers:

`-mcpu=CPU-TYPE'
     Assume the defaults for the machine type CPU-TYPE when scheduling
     instructions.  The choices for CPU-TYPE are `i386', `i486',
     `i586', `i686', `pentium', `pentiumpro', `k6', and `athlon'

     While picking a specific CPU-TYPE will schedule things
     appropriately for that particular chip, the compiler will not
     generate any code that does not run on the i386 without the
     `-march=CPU-TYPE' option being used.  `i586' is equivalent to
     `pentium' and `i686' is equivalent to `pentiumpro'.  `k6' is the
     AMD chip as opposed to the Intel ones.

`-march=CPU-TYPE'
     Generate instructions for the machine type CPU-TYPE.  The choices
     for CPU-TYPE are the same as for `-mcpu'.  Moreover, specifying
     `-march=CPU-TYPE' implies `-mcpu=CPU-TYPE'.

`-m386'
`-m486'
`-mpentium'
`-mpentiumpro'
     Synonyms for `-mcpu=i386', `-mcpu=i486', `-mcpu=pentium', and
     `-mcpu=pentiumpro' respectively.  These synonyms are deprecated.

`-mintel-syntax'
     Emit assembly using Intel syntax opcodes instead of AT&T syntax.

`-mieee-fp'
`-mno-ieee-fp'
     Control whether or not the compiler uses IEEE floating point
     comparisons.  These handle correctly the case where the result of a
     comparison is unordered.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GCC.  Normally
     the facilities of the machine's usual C compiler are used, but
     this can't be done directly in cross-compilation.  You must make
     your own arrangements to provide suitable library functions for
     cross-compilation.

     On machines where a function returns floating point results in the
     80387 register stack, some floating point opcodes may be emitted
     even if `-msoft-float' is used.

`-mno-fp-ret-in-387'
     Do not use the FPU registers for return values of functions.

     The usual calling convention has functions return values of types
     `float' and `double' in an FPU register, even if there is no FPU.
     The idea is that the operating system should emulate an FPU.

     The option `-mno-fp-ret-in-387' causes such values to be returned
     in ordinary CPU registers instead.

`-mno-fancy-math-387'
     Some 387 emulators do not support the `sin', `cos' and `sqrt'
     instructions for the 387.  Specify this option to avoid generating
     those instructions.  This option is the default on FreeBSD.  As of
     revision 2.6.1, these instructions are not generated unless you
     also use the `-ffast-math' switch.

`-malign-double'
`-mno-align-double'
     Control whether GCC aligns `double', `long double', and `long
     long' variables on a two word boundary or a one word boundary.
     Aligning `double' variables on a two word boundary will produce
     code that runs somewhat faster on a `Pentium' at the expense of
     more memory.

`-m128bit-long-double'
     Control the size of `long double' type. i386 application binary
     interface specify the size to be 12 bytes, while modern
     architectures (Pentium and newer) prefer `long double' aligned to
     8 or 16 byte boundary.  This is impossible to reach with 12 byte
     long doubles in the array accesses.

     *Warning:* if you use the `-m128bit-long-double' switch, the
     structures and arrays containing `long double' will change their
     size as well as function calling convention for function taking
     `long double' will be modified.

`-m96bit-long-double'
     Set the size of `long double' to 96 bits as required by the i386
     application binary interface.  This is the default.

`-msvr3-shlib'
`-mno-svr3-shlib'
     Control whether GCC places uninitialized locals into `bss' or
     `data'.  `-msvr3-shlib' places these locals into `bss'.  These
     options are meaningful only on System V Release 3.

`-mrtd'
     Use a different function-calling convention, in which functions
     that take a fixed number of arguments return with the `ret' NUM
     instruction, which pops their arguments while returning.  This
     saves one instruction in the caller since there is no need to pop
     the arguments there.

     You can specify that an individual function is called with this
     calling sequence with the function attribute `stdcall'.  You can
     also override the `-mrtd' option by using the function attribute
     `cdecl'.  *Note Function Attributes::.

     *Warning:* this calling convention is incompatible with the one
     normally used on Unix, so you cannot use it if you need to call
     libraries compiled with the Unix compiler.

     Also, you must provide function prototypes for all functions that
     take variable numbers of arguments (including `printf'); otherwise
     incorrect code will be generated for calls to those functions.

     In addition, seriously incorrect code will result if you call a
     function with too many arguments.  (Normally, extra arguments are
     harmlessly ignored.)

`-mreg-alloc=REGS'
     Control the default allocation order of integer registers.  The
     string REGS is a series of letters specifying a register.  The
     supported letters are: `a' allocate EAX; `b' allocate EBX; `c'
     allocate ECX; `d' allocate EDX; `S' allocate ESI; `D' allocate
     EDI; `B' allocate EBP.  This option is deprecated and will not be
     supported by future releases of gcc.

`-mregparm=NUM'
     Control how many registers are used to pass integer arguments.  By
     default, no registers are used to pass arguments, and at most 3
     registers can be used.  You can control this behavior for a
     specific function by using the function attribute `regparm'.
     *Note Function Attributes::.

     *Warning:* if you use this switch, and NUM is nonzero, then you
     must build all modules with the same value, including any
     libraries.  This includes the system libraries and startup modules.

`-malign-loops=NUM'
     Align loops to a 2 raised to a NUM byte boundary.  If
     `-malign-loops' is not specified, the default is 2 unless gas 2.8
     (or later) is being used in which case the default is to align the
     loop on a 16 byte boundary if it is less than 8 bytes away.

`-malign-jumps=NUM'
     Align instructions that are only jumped to to a 2 raised to a NUM
     byte boundary.  If `-malign-jumps' is not specified, the default is
     2 if optimizing for a 386, and 4 if optimizing for a 486 unless
     gas 2.8 (or later) is being used in which case the default is to
     align the instruction on a 16 byte boundary if it is less than 8
     bytes away.

`-malign-functions=NUM'
     Align the start of functions to a 2 raised to NUM byte boundary.
     If `-malign-functions' is not specified, the default is 2 if
     optimizing for a 386, and 4 if optimizing for a 486.

`-mpreferred-stack-boundary=NUM'
     Attempt to keep the stack boundary aligned to a 2 raised to NUM
     byte boundary.  If `-mpreferred-stack-boundary' is not specified,
     the default is 4 (16 bytes or 128 bits).

     The stack is required to be aligned on a 4 byte boundary.  On
     Pentium and PentiumPro, `double' and `long double' values should be
     aligned to an 8 byte boundary (see `-malign-double') or suffer
     significant run time performance penalties.  On Pentium III, the
     Streaming SIMD Extension (SSE) data type `__m128' suffers similar
     penalties if it is not 16 byte aligned.

     To ensure proper alignment of this values on the stack, the stack
     boundary must be as aligned as that required by any value stored
     on the stack.  Further, every function must be generated such that
     it keeps the stack aligned.  Thus calling a function compiled with
     a higher preferred stack boundary from a function compiled with a
     lower preferred stack boundary will most likely misalign the
     stack.  It is recommended that libraries that use callbacks always
     use the default setting.

     This extra alignment does consume extra stack space.  Code that is
     sensitive to stack space usage, such as embedded systems and
     operating system kernels, may want to reduce the preferred
     alignment to `-mpreferred-stack-boundary=2'.

`-mpush-args'
`-mno-push-args'
     Use PUSH operations to store outgoing parameters.  This method is
     shorter and usually equally fast as method using SUB/MOV
     operations and is enabled by default.  In some cases disabling it
     may improve performance because of improved scheduling and reduced
     dependencies.

`-maccumulate-outgoing-args'
     If enabled, the maximum amount of space required for outgoing
     arguments will be computed in the function prologue.  This is
     faster on most modern CPUs because of reduced dependencies,
     improved scheduling and reduced stack usage when preferred stack
     boundary is not equal to 2.  The drawback is a notable increase in
     code size.  This switch implies `-mno-push-args'.

`-mthreads'
     Support thread-safe exception handling on `Mingw32'.  Code that
     relies on thread-safe exception handling must compile and link all
     code with the `-mthreads' option.  When compiling, `-mthreads'
     defines `-D_MT'; when linking, it links in a special thread helper
     library `-lmingwthrd' which cleans up per thread exception
     handling data.

`-mno-align-stringops'
     Do not align destination of inlined string operations.  This
     switch reduces code size and improves performance in case the
     destination is already aligned, but gcc don't know about it.

`-minline-all-stringops'
     By default GCC inlines string operations only when destination is
     known to be aligned at least to 4 byte boundary.  This enables
     more inlining, increase code size, but may improve performance of
     code that depends on fast memcpy, strlen and memset for short
     lengths.

`-momit-leaf-frame-pointer'
     Don't keep the frame pointer in a register for leaf functions.
     This avoids the instructions to save, set up and restore frame
     pointers and makes an extra register available in leaf functions.
     The option `-fomit-frame-pointer' removes the frame pointer for
     all functions which might make debugging harder.


File: gcc.info,  Node: HPPA Options,  Next: Intel 960 Options,  Prev: i386 Options,  Up: Submodel Options

HPPA Options
------------

   These `-m' options are defined for the HPPA family of computers:

`-march=ARCHITECTURE-TYPE'
     Generate code for the specified architecture.  The choices for
     ARCHITECTURE-TYPE are `1.0' for PA 1.0, `1.1' for PA 1.1, and
     `2.0' for PA 2.0 processors.  Refer to `/usr/lib/sched.models' on
     an HP-UX system to determine the proper architecture option for
     your machine.  Code compiled for lower numbered architectures will
     run on higher numbered architectures, but not the other way around.

     PA 2.0 support currently requires gas snapshot 19990413 or later.
     The next release of binutils (current is 2.9.1) will probably
     contain PA 2.0 support.

`-mpa-risc-1-0'
`-mpa-risc-1-1'
`-mpa-risc-2-0'
     Synonyms for `-march=1.0', `-march=1.1', and `-march=2.0'
     respectively.

`-mbig-switch'
     Generate code suitable for big switch tables.  Use this option
     only if the assembler/linker complain about out of range branches
     within a switch table.

`-mjump-in-delay'
     Fill delay slots of function calls with unconditional jump
     instructions by modifying the return pointer for the function call
     to be the target of the conditional jump.

`-mdisable-fpregs'
     Prevent floating point registers from being used in any manner.
     This is necessary for compiling kernels which perform lazy context
     switching of floating point registers.  If you use this option and
     attempt to perform floating point operations, the compiler will
     abort.

`-mdisable-indexing'
     Prevent the compiler from using indexing address modes.  This
     avoids some rather obscure problems when compiling MIG generated
     code under MACH.

`-mno-space-regs'
     Generate code that assumes the target has no space registers.
     This allows GCC to generate faster indirect calls and use unscaled
     index address modes.

     Such code is suitable for level 0 PA systems and kernels.

`-mfast-indirect-calls'
     Generate code that assumes calls never cross space boundaries.
     This allows GCC to emit code which performs faster indirect calls.

     This option will not work in the presence of shared libraries or
     nested functions.

`-mlong-load-store'
     Generate 3-instruction load and store sequences as sometimes
     required by the HP-UX 10 linker.  This is equivalent to the `+k'
     option to the HP compilers.

`-mportable-runtime'
     Use the portable calling conventions proposed by HP for ELF
     systems.

`-mgas'
     Enable the use of assembler directives only GAS understands.

`-mschedule=CPU-TYPE'
     Schedule code according to the constraints for the machine type
     CPU-TYPE.  The choices for CPU-TYPE are `700' `7100', `7100LC',
     `7200', and `8000'.  Refer to `/usr/lib/sched.models' on an HP-UX
     system to determine the proper scheduling option for your machine.

`-mlinker-opt'
     Enable the optimization pass in the HPUX linker.  Note this makes
     symbolic debugging impossible.  It also triggers a bug in the HPUX
     8 and HPUX 9 linkers in which they give bogus error messages when
     linking some programs.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not available for all HPPA
     targets.  Normally the facilities of the machine's usual C
     compiler are used, but this cannot be done directly in
     cross-compilation.  You must make your own arrangements to provide
     suitable library functions for cross-compilation.  The embedded
     target `hppa1.1-*-pro' does provide software floating point
     support.

     `-msoft-float' changes the calling convention in the output file;
     therefore, it is only useful if you compile _all_ of a program with
     this option.  In particular, you need to compile `libgcc.a', the
     library that comes with GCC, with `-msoft-float' in order for this
     to work.


File: gcc.info,  Node: Intel 960 Options,  Next: DEC Alpha Options,  Prev: HPPA Options,  Up: Submodel Options

Intel 960 Options
-----------------

   These `-m' options are defined for the Intel 960 implementations:

`-mCPU-TYPE'
     Assume the defaults for the machine type CPU-TYPE for some of the
     other options, including instruction scheduling, floating point
     support, and addressing modes.  The choices for CPU-TYPE are `ka',
     `kb', `mc', `ca', `cf', `sa', and `sb'.  The default is `kb'.

`-mnumerics'
`-msoft-float'
     The `-mnumerics' option indicates that the processor does support
     floating-point instructions.  The `-msoft-float' option indicates
     that floating-point support should not be assumed.

`-mleaf-procedures'
`-mno-leaf-procedures'
     Do (or do not) attempt to alter leaf procedures to be callable
     with the `bal' instruction as well as `call'.  This will result in
     more efficient code for explicit calls when the `bal' instruction
     can be substituted by the assembler or linker, but less efficient
     code in other cases, such as calls via function pointers, or using
     a linker that doesn't support this optimization.

`-mtail-call'
`-mno-tail-call'
     Do (or do not) make additional attempts (beyond those of the
     machine-independent portions of the compiler) to optimize
     tail-recursive calls into branches.  You may not want to do this
     because the detection of cases where this is not valid is not
     totally complete.  The default is `-mno-tail-call'.

`-mcomplex-addr'
`-mno-complex-addr'
     Assume (or do not assume) that the use of a complex addressing
     mode is a win on this implementation of the i960.  Complex
     addressing modes may not be worthwhile on the K-series, but they
     definitely are on the C-series.  The default is currently
     `-mcomplex-addr' for all processors except the CB and CC.

`-mcode-align'
`-mno-code-align'
     Align code to 8-byte boundaries for faster fetching (or don't
     bother).  Currently turned on by default for C-series
     implementations only.

`-mic-compat'
`-mic2.0-compat'
`-mic3.0-compat'
     Enable compatibility with iC960 v2.0 or v3.0.

`-masm-compat'
`-mintel-asm'
     Enable compatibility with the iC960 assembler.

`-mstrict-align'
`-mno-strict-align'
     Do not permit (do permit) unaligned accesses.

`-mold-align'
     Enable structure-alignment compatibility with Intel's gcc release
     version 1.3 (based on gcc 1.37).  This option implies
     `-mstrict-align'.

`-mlong-double-64'
     Implement type `long double' as 64-bit floating point numbers.
     Without the option `long double' is implemented by 80-bit floating
     point numbers.  The only reason we have it because there is no
     128-bit `long double' support in `fp-bit.c' yet.  So it is only
     useful for people using soft-float targets.  Otherwise, we should
     recommend against use of it.

